1 /* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian@popies.net> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * (C) Copyright 2009-2015 7 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu> 8 * esd electronic system design gmbh <www.esd.eu> 9 * 10 * Configuation settings for the esd MEESC board. 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #ifndef __CONFIG_H 16 #define __CONFIG_H 17 18 /* 19 * SoC must be defined first, before hardware.h is included. 20 * In this case SoC is defined in boards.cfg. 21 */ 22 #include <asm/hardware.h> 23 24 /* 25 * Warning: changing CONFIG_SYS_TEXT_BASE requires 26 * adapting the initial boot program. 27 * Since the linker has to swallow that define, we must use a pure 28 * hex number here! 29 */ 30 #define CONFIG_SYS_TEXT_BASE 0x21F00000 31 32 /* 33 * since a number of boards are not being listed in linux 34 * arch/arm/tools/mach-types any more, the mach-types have to be 35 * defined here 36 */ 37 #define MACH_TYPE_MEESC 2165 38 #define MACH_TYPE_ETHERCAN2 2407 39 40 /* ARM asynchronous clock */ 41 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */ 42 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */ 43 44 /* Misc CPU related */ 45 #define CONFIG_SKIP_LOWLEVEL_INIT 46 #define CONFIG_ARCH_CPU_INIT 47 #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ 48 #define CONFIG_SETUP_MEMORY_TAGS 49 #define CONFIG_INITRD_TAG 50 #define CONFIG_SERIAL_TAG 51 #define CONFIG_REVISION_TAG 52 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 53 #define CONFIG_MISC_INIT_R /* Call misc_init_r */ 54 55 #define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */ 56 #define CONFIG_PREBOOT /* enable preboot variable */ 57 58 /* 59 * Hardware drivers 60 */ 61 62 /* general purpose I/O */ 63 #define CONFIG_AT91_GPIO 64 65 /* Console output */ 66 #define CONFIG_ATMEL_USART 67 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 68 #define CONFIG_USART_ID ATMEL_ID_SYS 69 #define CONFIG_BAUDRATE 115200 70 71 /* 72 * BOOTP options 73 */ 74 #define CONFIG_BOOTP_BOOTFILESIZE 75 #define CONFIG_BOOTP_BOOTPATH 76 #define CONFIG_BOOTP_GATEWAY 77 #define CONFIG_BOOTP_HOSTNAME 78 79 /* 80 * Command line configuration. 81 */ 82 83 #ifdef CONFIG_SYS_USE_NANDFLASH 84 #define CONFIG_CMD_NAND 85 #endif 86 87 /* LED */ 88 #define CONFIG_AT91_LED 89 90 /* 91 * SDRAM: 1 bank, min 32, max 128 MB 92 * Initialized before u-boot gets started. 93 */ 94 #define PHYS_SDRAM ATMEL_BASE_CS1 /* 0x20000000 */ 95 #define PHYS_SDRAM_SIZE 0x02000000 /* 32 MByte */ 96 97 #define CONFIG_NR_DRAM_BANKS 1 98 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 99 #define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE 100 101 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) 102 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000) 103 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000) 104 105 /* 106 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 107 * leaving the correct space for initial global data structure above 108 * that address while providing maximum stack area below. 109 */ 110 #define CONFIG_SYS_INIT_SP_ADDR \ 111 (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE) 112 113 /* DataFlash */ 114 #ifdef CONFIG_SYS_USE_DATAFLASH 115 # define CONFIG_ATMEL_DATAFLASH_SPI 116 # define CONFIG_HAS_DATAFLASH 117 # define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 118 # define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 119 # define AT91_SPI_CLK 15000000 120 # define DATAFLASH_TCSS (0x1a << 16) 121 # define DATAFLASH_TCHS (0x1 << 24) 122 #endif 123 124 /* NOR flash is not populated, disable it */ 125 #define CONFIG_SYS_NO_FLASH 126 127 /* NAND flash */ 128 #ifdef CONFIG_CMD_NAND 129 # define CONFIG_NAND_ATMEL 130 # define CONFIG_SYS_MAX_NAND_DEVICE 1 131 # define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* 0x40000000 */ 132 # define CONFIG_SYS_NAND_DBW_8 133 # define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 134 # define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 135 # define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) 136 # define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) 137 #endif 138 139 /* Ethernet */ 140 #define CONFIG_MACB 141 #define CONFIG_RMII 142 #define CONFIG_NET_RETRY_COUNT 20 143 #undef CONFIG_RESET_PHY_R 144 145 /* hw-controller addresses */ 146 #define CONFIG_ET1100_BASE 0x70000000 147 148 #ifdef CONFIG_SYS_USE_DATAFLASH 149 150 /* bootstrap + u-boot + env in dataflash on CS0 */ 151 # define CONFIG_ENV_IS_IN_DATAFLASH 152 # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 153 0x8400) 154 # define CONFIG_ENV_OFFSET 0x4200 155 # define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 156 CONFIG_ENV_OFFSET) 157 # define CONFIG_ENV_SIZE 0x4200 158 159 #elif CONFIG_SYS_USE_NANDFLASH 160 161 /* bootstrap + u-boot + env + linux in nandflash */ 162 # define CONFIG_ENV_IS_IN_NAND 1 163 # define CONFIG_ENV_OFFSET 0xC0000 164 # define CONFIG_ENV_SIZE 0x20000 165 166 #endif 167 168 #define CONFIG_SYS_CBSIZE 512 169 #define CONFIG_SYS_MAXARGS 16 170 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 171 sizeof(CONFIG_SYS_PROMPT) + 16) 172 #define CONFIG_SYS_LONGHELP 173 #define CONFIG_CMDLINE_EDITING 174 #define CONFIG_AUTO_COMPLETE 175 176 /* 177 * Size of malloc() pool 178 */ 179 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ 180 128*1024, 0x1000) 181 182 #endif 183