xref: /rk3399_rockchip-uboot/include/configs/meesc.h (revision ab892a109c58a3cfc18f5e18d0b9bfbc90b2eff2)
133b1d3f4SDaniel Gorsulowski /*
233b1d3f4SDaniel Gorsulowski  * (C) Copyright 2007-2008
3c9e798d3SStelian Pop  * Stelian Pop <stelian@popies.net>
433b1d3f4SDaniel Gorsulowski  * Lead Tech Design <www.leadtechdesign.com>
533b1d3f4SDaniel Gorsulowski  *
60cb77bfaSMatthias Fuchs  * (C) Copyright 2009-2011
733b1d3f4SDaniel Gorsulowski  * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
833b1d3f4SDaniel Gorsulowski  * esd electronic system design gmbh <www.esd.eu>
933b1d3f4SDaniel Gorsulowski  *
1033b1d3f4SDaniel Gorsulowski  * Configuation settings for the esd MEESC board.
1133b1d3f4SDaniel Gorsulowski  *
121a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
1333b1d3f4SDaniel Gorsulowski  */
1433b1d3f4SDaniel Gorsulowski 
1533b1d3f4SDaniel Gorsulowski #ifndef __CONFIG_H
1633b1d3f4SDaniel Gorsulowski #define __CONFIG_H
1733b1d3f4SDaniel Gorsulowski 
180cb77bfaSMatthias Fuchs /*
190cb77bfaSMatthias Fuchs  * SoC must be defined first, before hardware.h is included.
200cb77bfaSMatthias Fuchs  * In this case SoC is defined in boards.cfg.
210cb77bfaSMatthias Fuchs  */
220cb77bfaSMatthias Fuchs #include <asm/hardware.h>
230cb77bfaSMatthias Fuchs 
240cb77bfaSMatthias Fuchs /*
250cb77bfaSMatthias Fuchs  * Warning: changing CONFIG_SYS_TEXT_BASE requires
260cb77bfaSMatthias Fuchs  * adapting the initial boot program.
270cb77bfaSMatthias Fuchs  * Since the linker has to swallow that define, we must use a pure
280cb77bfaSMatthias Fuchs  * hex number here!
290cb77bfaSMatthias Fuchs  */
300cb77bfaSMatthias Fuchs #define CONFIG_SYS_TEXT_BASE		0x20002000
310cb77bfaSMatthias Fuchs 
3218b6ddfdSDaniel Gorsulowski /*
3318b6ddfdSDaniel Gorsulowski  * since a number of boards are not being listed in linux
3418b6ddfdSDaniel Gorsulowski  * arch/arm/tools/mach-types any more, the mach-types have to be
3518b6ddfdSDaniel Gorsulowski  * defined here
3618b6ddfdSDaniel Gorsulowski  */
3718b6ddfdSDaniel Gorsulowski #define MACH_TYPE_MEESC			2165
3818b6ddfdSDaniel Gorsulowski #define MACH_TYPE_ETHERCAN2		2407
3918b6ddfdSDaniel Gorsulowski 
400cb77bfaSMatthias Fuchs /* ARM asynchronous clock */
410cb77bfaSMatthias Fuchs #define CONFIG_SYS_AT91_SLOW_CLOCK	32768	/* 32.768 kHz crystal */
429f07dedeSDaniel Gorsulowski #define CONFIG_SYS_AT91_MAIN_CLOCK	16000000/* 16.0 MHz crystal */
430cb77bfaSMatthias Fuchs 
440cb77bfaSMatthias Fuchs /* Misc CPU related */
450cb77bfaSMatthias Fuchs #define CONFIG_SKIP_LOWLEVEL_INIT
460cb77bfaSMatthias Fuchs #define CONFIG_ARCH_CPU_INIT
470cb77bfaSMatthias Fuchs #define CONFIG_BOARD_EARLY_INIT_F		/* call board_early_init_f() */
480cb77bfaSMatthias Fuchs #define CONFIG_SETUP_MEMORY_TAGS
490cb77bfaSMatthias Fuchs #define CONFIG_INITRD_TAG
500cb77bfaSMatthias Fuchs #define CONFIG_SERIAL_TAG
510cb77bfaSMatthias Fuchs #define CONFIG_REVISION_TAG
520cb77bfaSMatthias Fuchs #define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
530cb77bfaSMatthias Fuchs #define CONFIG_MISC_INIT_R			/* Call misc_init_r */
5433b1d3f4SDaniel Gorsulowski 
550cb77bfaSMatthias Fuchs #define CONFIG_DISPLAY_BOARDINFO		/* call checkboard() */
560cb77bfaSMatthias Fuchs #define CONFIG_DISPLAY_CPUINFO			/* display cpu info and speed */
570cb77bfaSMatthias Fuchs #define CONFIG_PREBOOT				/* enable preboot variable */
5833b1d3f4SDaniel Gorsulowski 
59*ab892a10SDaniel Gorsulowski #define CONFIG_SYS_GENERIC_BOARD
60*ab892a10SDaniel Gorsulowski 
6133b1d3f4SDaniel Gorsulowski /*
6233b1d3f4SDaniel Gorsulowski  * Hardware drivers
6333b1d3f4SDaniel Gorsulowski  */
6433b1d3f4SDaniel Gorsulowski 
650cb77bfaSMatthias Fuchs /* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
660cb77bfaSMatthias Fuchs #define ATMEL_PMC_UHP			AT91SAM926x_PMC_UHP
670cb77bfaSMatthias Fuchs 
680cb77bfaSMatthias Fuchs /* general purpose I/O */
690cb77bfaSMatthias Fuchs #define CONFIG_AT91_GPIO
700cb77bfaSMatthias Fuchs 
7133b1d3f4SDaniel Gorsulowski /* Console output */
720cb77bfaSMatthias Fuchs #define CONFIG_ATMEL_USART
730cb77bfaSMatthias Fuchs #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
740cb77bfaSMatthias Fuchs #define CONFIG_USART_ID			ATMEL_ID_SYS
750cb77bfaSMatthias Fuchs #define CONFIG_BAUDRATE			115200
7633b1d3f4SDaniel Gorsulowski 
7733b1d3f4SDaniel Gorsulowski #define CONFIG_BOOTDELAY		3
780cb77bfaSMatthias Fuchs #define CONFIG_ZERO_BOOTDELAY_CHECK
7933b1d3f4SDaniel Gorsulowski 
8033b1d3f4SDaniel Gorsulowski /*
8133b1d3f4SDaniel Gorsulowski  * BOOTP options
8233b1d3f4SDaniel Gorsulowski  */
830cb77bfaSMatthias Fuchs #define CONFIG_BOOTP_BOOTFILESIZE
840cb77bfaSMatthias Fuchs #define CONFIG_BOOTP_BOOTPATH
850cb77bfaSMatthias Fuchs #define CONFIG_BOOTP_GATEWAY
860cb77bfaSMatthias Fuchs #define CONFIG_BOOTP_HOSTNAME
8733b1d3f4SDaniel Gorsulowski 
8833b1d3f4SDaniel Gorsulowski /*
8933b1d3f4SDaniel Gorsulowski  * Command line configuration.
9033b1d3f4SDaniel Gorsulowski  */
910cb77bfaSMatthias Fuchs #define CONFIG_CMD_PING
920cb77bfaSMatthias Fuchs #define CONFIG_CMD_DHCP
930cb77bfaSMatthias Fuchs #define CONFIG_CMD_NAND
940cb77bfaSMatthias Fuchs #define CONFIG_CMD_USB
9533b1d3f4SDaniel Gorsulowski 
9633b1d3f4SDaniel Gorsulowski /* LED */
970cb77bfaSMatthias Fuchs #define CONFIG_AT91_LED
9833b1d3f4SDaniel Gorsulowski 
990cb77bfaSMatthias Fuchs /*
1000cb77bfaSMatthias Fuchs  * SDRAM: 1 bank, min 32, max 128 MB
1010cb77bfaSMatthias Fuchs  * Initialized before u-boot gets started.
1020cb77bfaSMatthias Fuchs  */
10333b1d3f4SDaniel Gorsulowski #define CONFIG_NR_DRAM_BANKS		1
1040cb77bfaSMatthias Fuchs #define CONFIG_SYS_SDRAM_BASE		0x20000000 /* ATMEL_BASE_CS1 */
1050cb77bfaSMatthias Fuchs #define CONFIG_SYS_SDRAM_SIZE		0x02000000
1060cb77bfaSMatthias Fuchs 
1070cb77bfaSMatthias Fuchs #define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + 0x00100000)
1080cb77bfaSMatthias Fuchs #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x01E00000)
1090cb77bfaSMatthias Fuchs #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x00100000)
1100cb77bfaSMatthias Fuchs 
1110cb77bfaSMatthias Fuchs /*
1120cb77bfaSMatthias Fuchs  * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
1130cb77bfaSMatthias Fuchs  * leaving the correct space for initial global data structure above
1140cb77bfaSMatthias Fuchs  * that address while providing maximum stack area below.
1150cb77bfaSMatthias Fuchs  */
1160cb77bfaSMatthias Fuchs #define CONFIG_SYS_INIT_SP_ADDR \
1170cb77bfaSMatthias Fuchs 	(ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE)
11833b1d3f4SDaniel Gorsulowski 
11933b1d3f4SDaniel Gorsulowski /* DataFlash */
1200cb77bfaSMatthias Fuchs #ifdef CONFIG_SYS_USE_DATAFLASH
12133b1d3f4SDaniel Gorsulowski # define CONFIG_ATMEL_DATAFLASH_SPI
1220cb77bfaSMatthias Fuchs # define CONFIG_HAS_DATAFLASH
12333b1d3f4SDaniel Gorsulowski # define CONFIG_SYS_MAX_DATAFLASH_BANKS		1
12433b1d3f4SDaniel Gorsulowski # define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
12533b1d3f4SDaniel Gorsulowski # define AT91_SPI_CLK				15000000
12633b1d3f4SDaniel Gorsulowski # define DATAFLASH_TCSS				(0x1a << 16)
12733b1d3f4SDaniel Gorsulowski # define DATAFLASH_TCHS				(0x1 << 24)
1280cb77bfaSMatthias Fuchs #endif
12933b1d3f4SDaniel Gorsulowski 
13033b1d3f4SDaniel Gorsulowski /* NOR flash is not populated, disable it */
1310cb77bfaSMatthias Fuchs #define CONFIG_SYS_NO_FLASH
13233b1d3f4SDaniel Gorsulowski 
13333b1d3f4SDaniel Gorsulowski /* NAND flash */
13433b1d3f4SDaniel Gorsulowski #ifdef CONFIG_CMD_NAND
13533b1d3f4SDaniel Gorsulowski # define CONFIG_NAND_ATMEL
13633b1d3f4SDaniel Gorsulowski # define CONFIG_SYS_MAX_NAND_DEVICE		1
1370cb77bfaSMatthias Fuchs # define CONFIG_SYS_NAND_BASE			0x40000000 /* ATMEL_BASE_CS3 */
1380cb77bfaSMatthias Fuchs # define CONFIG_SYS_NAND_DBW_8
13933b1d3f4SDaniel Gorsulowski # define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
14033b1d3f4SDaniel Gorsulowski # define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
141ac45bb16SAndreas Bießmann # define CONFIG_SYS_NAND_ENABLE_PIN		GPIO_PIN_PD(15)
142ac45bb16SAndreas Bießmann # define CONFIG_SYS_NAND_READY_PIN		GPIO_PIN_PA(22)
14333b1d3f4SDaniel Gorsulowski #endif
14433b1d3f4SDaniel Gorsulowski 
14533b1d3f4SDaniel Gorsulowski /* Ethernet */
1460cb77bfaSMatthias Fuchs #define CONFIG_MACB
1470cb77bfaSMatthias Fuchs #define CONFIG_RMII
1480cb77bfaSMatthias Fuchs #define CONFIG_FIT
14933b1d3f4SDaniel Gorsulowski #define CONFIG_NET_RETRY_COUNT			20
15033b1d3f4SDaniel Gorsulowski #undef CONFIG_RESET_PHY_R
15133b1d3f4SDaniel Gorsulowski 
15264037fb4SDaniel Gorsulowski /* USB */
15364037fb4SDaniel Gorsulowski #define CONFIG_USB_ATMEL
154dcd2f1a0SBo Shen #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
1550cb77bfaSMatthias Fuchs #define CONFIG_USB_OHCI_NEW
1560cb77bfaSMatthias Fuchs #define CONFIG_DOS_PARTITION
1570cb77bfaSMatthias Fuchs #define CONFIG_SYS_USB_OHCI_CPU_INIT
15864037fb4SDaniel Gorsulowski #define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00a00000
15964037fb4SDaniel Gorsulowski #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9263"
16064037fb4SDaniel Gorsulowski #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
16133b1d3f4SDaniel Gorsulowski 
16233b1d3f4SDaniel Gorsulowski /* CAN */
1630cb77bfaSMatthias Fuchs #define CONFIG_AT91_CAN
16433b1d3f4SDaniel Gorsulowski 
165a380279bSDaniel Gorsulowski /* hw-controller addresses */
166a380279bSDaniel Gorsulowski #define CONFIG_ET1100_BASE		0x70000000
167a380279bSDaniel Gorsulowski 
1680cb77bfaSMatthias Fuchs #ifdef CONFIG_SYS_USE_DATAFLASH
1690cb77bfaSMatthias Fuchs 
170a380279bSDaniel Gorsulowski /* bootstrap + u-boot + env in dataflash on CS0 */
1710cb77bfaSMatthias Fuchs # define CONFIG_ENV_IS_IN_DATAFLASH
17233b1d3f4SDaniel Gorsulowski # define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
17333b1d3f4SDaniel Gorsulowski 					0x8400)
17433b1d3f4SDaniel Gorsulowski # define CONFIG_ENV_OFFSET		0x4200
17533b1d3f4SDaniel Gorsulowski # define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
17633b1d3f4SDaniel Gorsulowski 					CONFIG_ENV_OFFSET)
17733b1d3f4SDaniel Gorsulowski # define CONFIG_ENV_SIZE		0x4200
17833b1d3f4SDaniel Gorsulowski 
1790cb77bfaSMatthias Fuchs #elif CONFIG_SYS_USE_NANDFLASH
1800cb77bfaSMatthias Fuchs 
1810cb77bfaSMatthias Fuchs /* bootstrap + u-boot + env + linux in nandflash */
1820cb77bfaSMatthias Fuchs # define CONFIG_ENV_IS_IN_NAND		1
1830cb77bfaSMatthias Fuchs # define CONFIG_ENV_OFFSET		0xC0000
1840cb77bfaSMatthias Fuchs # define CONFIG_ENV_SIZE		0x20000
1850cb77bfaSMatthias Fuchs 
1860cb77bfaSMatthias Fuchs #endif
18733b1d3f4SDaniel Gorsulowski 
1880cb77bfaSMatthias Fuchs #define CONFIG_SYS_CBSIZE		512
18933b1d3f4SDaniel Gorsulowski #define CONFIG_SYS_MAXARGS		16
19033b1d3f4SDaniel Gorsulowski #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
19133b1d3f4SDaniel Gorsulowski 					sizeof(CONFIG_SYS_PROMPT) + 16)
1920cb77bfaSMatthias Fuchs #define CONFIG_SYS_LONGHELP
1930cb77bfaSMatthias Fuchs #define CONFIG_CMDLINE_EDITING
19433b1d3f4SDaniel Gorsulowski 
19533b1d3f4SDaniel Gorsulowski /*
19633b1d3f4SDaniel Gorsulowski  * Size of malloc() pool
19733b1d3f4SDaniel Gorsulowski  */
198a380279bSDaniel Gorsulowski #define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + \
199a380279bSDaniel Gorsulowski 					128*1024, 0x1000)
20033b1d3f4SDaniel Gorsulowski 
20133b1d3f4SDaniel Gorsulowski #endif
202