1 /* 2 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #ifndef _MALTA_CONFIG_H 8 #define _MALTA_CONFIG_H 9 10 /* 11 * System configuration 12 */ 13 #define CONFIG_MALTA 14 #define CONFIG_BOARD_EARLY_INIT_F 15 16 #define CONFIG_MEMSIZE_IN_BYTES 17 18 #define CONFIG_PCI_GT64120 19 #define CONFIG_PCI_MSC01 20 #define CONFIG_PCI_PNP 21 #define CONFIG_PCNET 22 #define CONFIG_PCNET_79C973 23 #define PCNET_HAS_PROM 24 25 #define CONFIG_MISC_INIT_R 26 #define CONFIG_RTC_MC146818 27 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 28 29 /* 30 * CPU Configuration 31 */ 32 #define CONFIG_SYS_MHZ 250 /* arbitrary value */ 33 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) 34 35 /* 36 * Memory map 37 */ 38 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 39 40 #ifdef CONFIG_64BIT 41 # define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 42 #else 43 # define CONFIG_SYS_SDRAM_BASE 0x80000000 44 #endif 45 #define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024) 46 47 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 48 49 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000) 50 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) 51 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x00800000) 52 53 #define CONFIG_SYS_MALLOC_LEN (128 * 1024) 54 #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) 55 #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) 56 57 #define CONFIG_SYS_CBSIZE 256 58 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 59 sizeof(CONFIG_SYS_PROMPT) + 16) 60 #define CONFIG_SYS_MAXARGS 16 61 62 #define CONFIG_AUTO_COMPLETE 63 #define CONFIG_CMDLINE_EDITING 64 65 /* 66 * Serial driver 67 */ 68 #define CONFIG_BAUDRATE 115200 69 #define CONFIG_SYS_NS16550_PORT_MAPPED 70 71 /* 72 * Flash configuration 73 */ 74 #ifdef CONFIG_64BIT 75 # define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000 76 #else 77 # define CONFIG_SYS_FLASH_BASE 0xbe000000 78 #endif 79 #define CONFIG_SYS_MAX_FLASH_BANKS 1 80 #define CONFIG_SYS_MAX_FLASH_SECT 128 81 #define CONFIG_SYS_FLASH_CFI 82 #define CONFIG_FLASH_CFI_DRIVER 83 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 84 85 /* 86 * Environment 87 */ 88 #define CONFIG_ENV_IS_IN_FLASH 89 #define CONFIG_ENV_SECT_SIZE 0x20000 90 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 91 #define CONFIG_ENV_ADDR \ 92 (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE) 93 94 /* 95 * IDE/ATA 96 */ 97 #define CONFIG_SYS_IDE_MAXBUS 1 98 #define CONFIG_SYS_IDE_MAXDEVICE 2 99 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS 100 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 101 #define CONFIG_SYS_ATA_DATA_OFFSET 0 102 #define CONFIG_SYS_ATA_REG_OFFSET 0 103 104 /* 105 * Commands 106 */ 107 #define CONFIG_CMD_DATE 108 #define CONFIG_CMD_IDE 109 #define CONFIG_CMD_PCI 110 111 #define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */ 112 113 #endif /* _MALTA_CONFIG_H */ 114