1 /* 2 * Aries M53 configuration 3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __M53EVK_CONFIG_H__ 9 #define __M53EVK_CONFIG_H__ 10 11 #define CONFIG_MXC_GPIO 12 13 #include <asm/arch/imx-regs.h> 14 15 #define CONFIG_REVISION_TAG 16 #define CONFIG_SYS_FSL_CLK 17 18 #define CONFIG_TIMESTAMP /* Print image info with timestamp */ 19 20 /* 21 * U-Boot Commands 22 */ 23 #define CONFIG_FAT_WRITE 24 25 #define CONFIG_CMD_DATE 26 #define CONFIG_CMD_NAND 27 #define CONFIG_CMD_NAND_TRIMFFS 28 #define CONFIG_CMD_SATA 29 30 /* 31 * Memory configurations 32 */ 33 #define CONFIG_NR_DRAM_BANKS 2 34 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 35 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 36 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 37 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 38 #define PHYS_SDRAM_SIZE (gd->ram_size) 39 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 40 #define CONFIG_SYS_MEMTEST_START 0x70000000 41 #define CONFIG_SYS_MEMTEST_END 0x8ff00000 42 43 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 44 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 45 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 46 47 #define CONFIG_SYS_INIT_SP_OFFSET \ 48 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 49 #define CONFIG_SYS_INIT_SP_ADDR \ 50 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 51 52 #define CONFIG_SYS_TEXT_BASE 0x71000000 53 54 /* 55 * U-Boot general configurations 56 */ 57 #define CONFIG_SYS_LONGHELP 58 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 59 #define CONFIG_SYS_PBSIZE \ 60 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 61 /* Print buffer size */ 62 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 63 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 64 /* Boot argument buffer size */ 65 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 66 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 67 68 /* 69 * Serial Driver 70 */ 71 #define CONFIG_MXC_UART 72 #define CONFIG_MXC_UART_BASE UART2_BASE 73 #define CONFIG_CONS_INDEX 1 74 75 /* 76 * MMC Driver 77 */ 78 #ifdef CONFIG_CMD_MMC 79 #define CONFIG_FSL_ESDHC 80 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 81 #define CONFIG_SYS_FSL_ESDHC_NUM 1 82 #endif 83 84 /* 85 * NAND 86 */ 87 #define CONFIG_ENV_SIZE (16 * 1024) 88 #ifdef CONFIG_CMD_NAND 89 #define CONFIG_SYS_MAX_NAND_DEVICE 1 90 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI 91 #define CONFIG_NAND_MXC 92 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI 93 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR 94 #define CONFIG_SYS_NAND_LARGEPAGE 95 #define CONFIG_MXC_NAND_HWECC 96 #define CONFIG_SYS_NAND_USE_FLASH_BBT 97 98 /* Environment is in NAND */ 99 #define CONFIG_ENV_IS_IN_NAND 100 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 101 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 102 #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE) 103 #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */ 104 #define CONFIG_ENV_OFFSET_REDUND \ 105 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) 106 107 #define CONFIG_CMD_UBIFS 108 #define CONFIG_CMD_MTDPARTS 109 #define CONFIG_RBTREE 110 #define CONFIG_LZO 111 #define CONFIG_MTD_DEVICE 112 #define CONFIG_MTD_PARTITIONS 113 #define MTDIDS_DEFAULT "nand0=mxc_nand" 114 #define MTDPARTS_DEFAULT \ 115 "mtdparts=mxc_nand:" \ 116 "1024k(u-boot)," \ 117 "512k(env1)," \ 118 "512k(env2)," \ 119 "14m(boot)," \ 120 "240m(data)," \ 121 "-@2048k(UBI)" 122 #else 123 #define CONFIG_ENV_IS_NOWHERE 124 #endif 125 126 /* 127 * Ethernet on SOC (FEC) 128 */ 129 #ifdef CONFIG_CMD_NET 130 #define CONFIG_FEC_MXC 131 #define IMX_FEC_BASE FEC_BASE_ADDR 132 #define CONFIG_FEC_MXC_PHYADDR 0x0 133 #define CONFIG_MII 134 #define CONFIG_DISCOVER_PHY 135 #define CONFIG_FEC_XCV_TYPE RMII 136 #define CONFIG_PHYLIB 137 #define CONFIG_PHY_MICREL 138 #define CONFIG_ETHPRIME "FEC0" 139 #endif 140 141 /* 142 * I2C 143 */ 144 #ifdef CONFIG_CMD_I2C 145 #define CONFIG_SYS_I2C 146 #define CONFIG_SYS_I2C_MXC 147 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 148 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 149 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 150 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */ 151 #endif 152 153 /* 154 * RTC 155 */ 156 #ifdef CONFIG_CMD_DATE 157 #define CONFIG_RTC_M41T62 158 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 159 #define CONFIG_SYS_M41T11_BASE_YEAR 2000 160 #endif 161 162 /* 163 * USB 164 */ 165 #ifdef CONFIG_CMD_USB 166 #define CONFIG_USB_EHCI 167 #define CONFIG_USB_EHCI_MX5 168 #define CONFIG_USB_HOST_ETHER 169 #define CONFIG_USB_ETHER_ASIX 170 #define CONFIG_USB_ETHER_MCS7830 171 #define CONFIG_USB_ETHER_SMSC95XX 172 #define CONFIG_MXC_USB_PORT 1 173 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 174 #define CONFIG_MXC_USB_FLAGS 0 175 #endif 176 177 /* 178 * SATA 179 */ 180 #ifdef CONFIG_CMD_SATA 181 #define CONFIG_DWC_AHSATA 182 #define CONFIG_SYS_SATA_MAX_DEVICE 1 183 #define CONFIG_DWC_AHSATA_PORT_ID 0 184 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR 185 #define CONFIG_LBA48 186 #define CONFIG_LIBATA 187 #endif 188 189 /* 190 * LCD 191 */ 192 #ifdef CONFIG_VIDEO 193 #define CONFIG_VIDEO_IPUV3 194 #define CONFIG_VIDEO_BMP_RLE8 195 #define CONFIG_VIDEO_BMP_GZIP 196 #define CONFIG_SPLASH_SCREEN 197 #define CONFIG_SPLASHIMAGE_GUARD 198 #define CONFIG_SPLASH_SCREEN_ALIGN 199 #define CONFIG_BMP_16BPP 200 #define CONFIG_VIDEO_LOGO 201 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) 202 #define CONFIG_IPUV3_CLK 200000000 203 #endif 204 205 /* 206 * Boot Linux 207 */ 208 #define CONFIG_CMDLINE_TAG 209 #define CONFIG_INITRD_TAG 210 #define CONFIG_REVISION_TAG 211 #define CONFIG_SETUP_MEMORY_TAGS 212 #define CONFIG_BOOTFILE "fitImage" 213 #define CONFIG_BOOTARGS "console=ttymxc1,115200" 214 #define CONFIG_LOADADDR 0x70800000 215 #define CONFIG_BOOTCOMMAND "run mmc_mmc" 216 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 217 218 /* 219 * NAND SPL 220 */ 221 #define CONFIG_SPL_FRAMEWORK 222 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" 223 #define CONFIG_SPL_BOARD_INIT 224 #define CONFIG_SPL_TEXT_BASE 0x70008000 225 #define CONFIG_SPL_PAD_TO 0x8000 226 #define CONFIG_SPL_STACK 0x70004000 227 228 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO 229 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 230 #define CONFIG_SYS_NAND_OOBSIZE 64 231 #define CONFIG_SYS_NAND_PAGE_COUNT 64 232 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 233 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 234 235 /* 236 * Extra Environments 237 */ 238 #define CONFIG_PREBOOT "run try_bootscript" 239 #define CONFIG_HOSTNAME m53evk 240 241 #define CONFIG_EXTRA_ENV_SETTINGS \ 242 "consdev=ttymxc1\0" \ 243 "baudrate=115200\0" \ 244 "bootscript=boot.scr\0" \ 245 "bootdev=/dev/mmcblk0p1\0" \ 246 "rootdev=/dev/mmcblk0p2\0" \ 247 "netdev=eth0\0" \ 248 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \ 249 "kernel_addr_r=0x72000000\0" \ 250 "addcons=" \ 251 "setenv bootargs ${bootargs} " \ 252 "console=${consdev},${baudrate}\0" \ 253 "addip=" \ 254 "setenv bootargs ${bootargs} " \ 255 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 256 "${netmask}:${hostname}:${netdev}:off\0" \ 257 "addmisc=" \ 258 "setenv bootargs ${bootargs} ${miscargs}\0" \ 259 "adddfltmtd=" \ 260 "if test \"x${mtdparts}\" == \"x\" ; then " \ 261 "mtdparts default ; " \ 262 "fi\0" \ 263 "addmtd=" \ 264 "run adddfltmtd ; " \ 265 "setenv bootargs ${bootargs} ${mtdparts}\0" \ 266 "addargs=run addcons addmtd addmisc\0" \ 267 "mmcload=" \ 268 "mmc rescan ; " \ 269 "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \ 270 "ubiload=" \ 271 "ubi part UBI ; ubifsmount ubi0:rootfs ; " \ 272 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \ 273 "netload=" \ 274 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \ 275 "miscargs=nohlt panic=1\0" \ 276 "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \ 277 "ubiargs=" \ 278 "setenv bootargs ubi.mtd=5 " \ 279 "root=ubi0:rootfs rootfstype=ubifs\0" \ 280 "nfsargs=" \ 281 "setenv bootargs root=/dev/nfs rw " \ 282 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \ 283 "mmc_mmc=" \ 284 "run mmcload mmcargs addargs ; " \ 285 "bootm ${kernel_addr_r}\0" \ 286 "mmc_ubi=" \ 287 "run mmcload ubiargs addargs ; " \ 288 "bootm ${kernel_addr_r}\0" \ 289 "mmc_nfs=" \ 290 "run mmcload nfsargs addip addargs ; " \ 291 "bootm ${kernel_addr_r}\0" \ 292 "ubi_mmc=" \ 293 "run ubiload mmcargs addargs ; " \ 294 "bootm ${kernel_addr_r}\0" \ 295 "ubi_ubi=" \ 296 "run ubiload ubiargs addargs ; " \ 297 "bootm ${kernel_addr_r}\0" \ 298 "ubi_nfs=" \ 299 "run ubiload nfsargs addip addargs ; " \ 300 "bootm ${kernel_addr_r}\0" \ 301 "net_mmc=" \ 302 "run netload mmcargs addargs ; " \ 303 "bootm ${kernel_addr_r}\0" \ 304 "net_ubi=" \ 305 "run netload ubiargs addargs ; " \ 306 "bootm ${kernel_addr_r}\0" \ 307 "net_nfs=" \ 308 "run netload nfsargs addip addargs ; " \ 309 "bootm ${kernel_addr_r}\0" \ 310 "try_bootscript=" \ 311 "mmc rescan;" \ 312 "if test -e mmc 0:1 ${bootscript} ; then " \ 313 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \ 314 "then ; " \ 315 "echo Running bootscript... ; " \ 316 "source ${kernel_addr_r} ; " \ 317 "fi ; " \ 318 "fi\0" 319 320 #endif /* __M53EVK_CONFIG_H__ */ 321