1 /* 2 * DENX M53 configuration 3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __M53EVK_CONFIG_H__ 9 #define __M53EVK_CONFIG_H__ 10 11 #define CONFIG_MX53 12 #define CONFIG_MXC_GPIO 13 14 #include <asm/arch/imx-regs.h> 15 16 #define CONFIG_REVISION_TAG 17 #define CONFIG_SYS_NO_FLASH 18 #define CONFIG_SYS_FSL_CLK 19 20 #define CONFIG_TIMESTAMP /* Print image info with timestamp */ 21 22 /* 23 * U-Boot Commands 24 */ 25 #define CONFIG_FAT_WRITE 26 27 #define CONFIG_CMD_BMP 28 #define CONFIG_CMD_DATE 29 #define CONFIG_CMD_NAND 30 #define CONFIG_CMD_NAND_TRIMFFS 31 #define CONFIG_CMD_SATA 32 33 /* 34 * Memory configurations 35 */ 36 #define CONFIG_NR_DRAM_BANKS 2 37 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 38 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 39 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 40 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 41 #define PHYS_SDRAM_SIZE (gd->ram_size) 42 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 43 #define CONFIG_SYS_MEMTEST_START 0x70000000 44 #define CONFIG_SYS_MEMTEST_END 0x8ff00000 45 46 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 47 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 48 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 49 50 #define CONFIG_SYS_INIT_SP_OFFSET \ 51 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 52 #define CONFIG_SYS_INIT_SP_ADDR \ 53 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 54 55 #define CONFIG_SYS_TEXT_BASE 0x71000000 56 57 /* 58 * U-Boot general configurations 59 */ 60 #define CONFIG_SYS_LONGHELP 61 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 62 #define CONFIG_SYS_PBSIZE \ 63 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 64 /* Print buffer size */ 65 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 66 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 67 /* Boot argument buffer size */ 68 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 69 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 70 71 /* 72 * Serial Driver 73 */ 74 #define CONFIG_MXC_UART 75 #define CONFIG_MXC_UART_BASE UART2_BASE 76 #define CONFIG_CONS_INDEX 1 77 #define CONFIG_BAUDRATE 115200 78 79 /* 80 * MMC Driver 81 */ 82 #ifdef CONFIG_CMD_MMC 83 #define CONFIG_GENERIC_MMC 84 #define CONFIG_FSL_ESDHC 85 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 86 #define CONFIG_SYS_FSL_ESDHC_NUM 1 87 #endif 88 89 /* 90 * NAND 91 */ 92 #define CONFIG_ENV_SIZE (16 * 1024) 93 #ifdef CONFIG_CMD_NAND 94 #define CONFIG_SYS_MAX_NAND_DEVICE 1 95 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI 96 #define CONFIG_NAND_MXC 97 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI 98 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR 99 #define CONFIG_SYS_NAND_LARGEPAGE 100 #define CONFIG_MXC_NAND_HWECC 101 #define CONFIG_SYS_NAND_USE_FLASH_BBT 102 103 /* Environment is in NAND */ 104 #define CONFIG_ENV_IS_IN_NAND 105 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 106 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 107 #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE) 108 #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */ 109 #define CONFIG_ENV_OFFSET_REDUND \ 110 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) 111 112 #define CONFIG_CMD_UBIFS 113 #define CONFIG_CMD_MTDPARTS 114 #define CONFIG_RBTREE 115 #define CONFIG_LZO 116 #define CONFIG_MTD_DEVICE 117 #define CONFIG_MTD_PARTITIONS 118 #define MTDIDS_DEFAULT "nand0=mxc_nand" 119 #define MTDPARTS_DEFAULT \ 120 "mtdparts=mxc_nand:" \ 121 "1024k(u-boot)," \ 122 "512k(env1)," \ 123 "512k(env2)," \ 124 "14m(boot)," \ 125 "240m(data)," \ 126 "-@2048k(UBI)" 127 #else 128 #define CONFIG_ENV_IS_NOWHERE 129 #endif 130 131 /* 132 * Ethernet on SOC (FEC) 133 */ 134 #ifdef CONFIG_CMD_NET 135 #define CONFIG_FEC_MXC 136 #define IMX_FEC_BASE FEC_BASE_ADDR 137 #define CONFIG_FEC_MXC_PHYADDR 0x0 138 #define CONFIG_MII 139 #define CONFIG_DISCOVER_PHY 140 #define CONFIG_FEC_XCV_TYPE RMII 141 #define CONFIG_PHYLIB 142 #define CONFIG_PHY_MICREL 143 #define CONFIG_ETHPRIME "FEC0" 144 #endif 145 146 /* 147 * I2C 148 */ 149 #ifdef CONFIG_CMD_I2C 150 #define CONFIG_SYS_I2C 151 #define CONFIG_SYS_I2C_MXC 152 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 153 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 154 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 155 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */ 156 #endif 157 158 /* 159 * RTC 160 */ 161 #ifdef CONFIG_CMD_DATE 162 #define CONFIG_RTC_M41T62 163 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 164 #define CONFIG_SYS_M41T11_BASE_YEAR 2000 165 #endif 166 167 /* 168 * USB 169 */ 170 #ifdef CONFIG_CMD_USB 171 #define CONFIG_USB_EHCI 172 #define CONFIG_USB_EHCI_MX5 173 #define CONFIG_USB_HOST_ETHER 174 #define CONFIG_USB_ETHER_ASIX 175 #define CONFIG_USB_ETHER_MCS7830 176 #define CONFIG_USB_ETHER_SMSC95XX 177 #define CONFIG_MXC_USB_PORT 1 178 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 179 #define CONFIG_MXC_USB_FLAGS 0 180 #endif 181 182 /* 183 * SATA 184 */ 185 #ifdef CONFIG_CMD_SATA 186 #define CONFIG_DWC_AHSATA 187 #define CONFIG_SYS_SATA_MAX_DEVICE 1 188 #define CONFIG_DWC_AHSATA_PORT_ID 0 189 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR 190 #define CONFIG_LBA48 191 #define CONFIG_LIBATA 192 #endif 193 194 /* 195 * LCD 196 */ 197 #ifdef CONFIG_VIDEO 198 #define CONFIG_VIDEO_IPUV3 199 #define CONFIG_VIDEO_BMP_RLE8 200 #define CONFIG_VIDEO_BMP_GZIP 201 #define CONFIG_SPLASH_SCREEN 202 #define CONFIG_SPLASHIMAGE_GUARD 203 #define CONFIG_SPLASH_SCREEN_ALIGN 204 #define CONFIG_BMP_16BPP 205 #define CONFIG_VIDEO_LOGO 206 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) 207 #define CONFIG_IPUV3_CLK 200000000 208 #endif 209 210 /* 211 * Boot Linux 212 */ 213 #define CONFIG_CMDLINE_TAG 214 #define CONFIG_INITRD_TAG 215 #define CONFIG_REVISION_TAG 216 #define CONFIG_SETUP_MEMORY_TAGS 217 #define CONFIG_BOOTFILE "fitImage" 218 #define CONFIG_BOOTARGS "console=ttymxc1,115200" 219 #define CONFIG_LOADADDR 0x70800000 220 #define CONFIG_BOOTCOMMAND "run mmc_mmc" 221 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 222 223 /* 224 * NAND SPL 225 */ 226 #define CONFIG_SPL_FRAMEWORK 227 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" 228 #define CONFIG_SPL_BOARD_INIT 229 #define CONFIG_SPL_TEXT_BASE 0x70008000 230 #define CONFIG_SPL_PAD_TO 0x8000 231 #define CONFIG_SPL_STACK 0x70004000 232 233 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO 234 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 235 #define CONFIG_SYS_NAND_OOBSIZE 64 236 #define CONFIG_SYS_NAND_PAGE_COUNT 64 237 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 238 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 239 240 /* 241 * Extra Environments 242 */ 243 #define CONFIG_PREBOOT "run try_bootscript" 244 #define CONFIG_HOSTNAME m53evk 245 246 #define CONFIG_EXTRA_ENV_SETTINGS \ 247 "consdev=ttymxc1\0" \ 248 "baudrate=115200\0" \ 249 "bootscript=boot.scr\0" \ 250 "bootdev=/dev/mmcblk0p1\0" \ 251 "rootdev=/dev/mmcblk0p2\0" \ 252 "netdev=eth0\0" \ 253 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \ 254 "kernel_addr_r=0x72000000\0" \ 255 "addcons=" \ 256 "setenv bootargs ${bootargs} " \ 257 "console=${consdev},${baudrate}\0" \ 258 "addip=" \ 259 "setenv bootargs ${bootargs} " \ 260 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 261 "${netmask}:${hostname}:${netdev}:off\0" \ 262 "addmisc=" \ 263 "setenv bootargs ${bootargs} ${miscargs}\0" \ 264 "adddfltmtd=" \ 265 "if test \"x${mtdparts}\" == \"x\" ; then " \ 266 "mtdparts default ; " \ 267 "fi\0" \ 268 "addmtd=" \ 269 "run adddfltmtd ; " \ 270 "setenv bootargs ${bootargs} ${mtdparts}\0" \ 271 "addargs=run addcons addmtd addmisc\0" \ 272 "mmcload=" \ 273 "mmc rescan ; " \ 274 "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \ 275 "ubiload=" \ 276 "ubi part UBI ; ubifsmount ubi0:rootfs ; " \ 277 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \ 278 "netload=" \ 279 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \ 280 "miscargs=nohlt panic=1\0" \ 281 "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \ 282 "ubiargs=" \ 283 "setenv bootargs ubi.mtd=5 " \ 284 "root=ubi0:rootfs rootfstype=ubifs\0" \ 285 "nfsargs=" \ 286 "setenv bootargs root=/dev/nfs rw " \ 287 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \ 288 "mmc_mmc=" \ 289 "run mmcload mmcargs addargs ; " \ 290 "bootm ${kernel_addr_r}\0" \ 291 "mmc_ubi=" \ 292 "run mmcload ubiargs addargs ; " \ 293 "bootm ${kernel_addr_r}\0" \ 294 "mmc_nfs=" \ 295 "run mmcload nfsargs addip addargs ; " \ 296 "bootm ${kernel_addr_r}\0" \ 297 "ubi_mmc=" \ 298 "run ubiload mmcargs addargs ; " \ 299 "bootm ${kernel_addr_r}\0" \ 300 "ubi_ubi=" \ 301 "run ubiload ubiargs addargs ; " \ 302 "bootm ${kernel_addr_r}\0" \ 303 "ubi_nfs=" \ 304 "run ubiload nfsargs addip addargs ; " \ 305 "bootm ${kernel_addr_r}\0" \ 306 "net_mmc=" \ 307 "run netload mmcargs addargs ; " \ 308 "bootm ${kernel_addr_r}\0" \ 309 "net_ubi=" \ 310 "run netload ubiargs addargs ; " \ 311 "bootm ${kernel_addr_r}\0" \ 312 "net_nfs=" \ 313 "run netload nfsargs addip addargs ; " \ 314 "bootm ${kernel_addr_r}\0" \ 315 "try_bootscript=" \ 316 "mmc rescan;" \ 317 "if test -e mmc 0:1 ${bootscript} ; then " \ 318 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \ 319 "then ; " \ 320 "echo Running bootscript... ; " \ 321 "source ${kernel_addr_r} ; " \ 322 "fi ; " \ 323 "fi\0" 324 325 #endif /* __M53EVK_CONFIG_H__ */ 326