1 /* 2 * DENX M53 configuration 3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __M53EVK_CONFIG_H__ 9 #define __M53EVK_CONFIG_H__ 10 11 #define CONFIG_MX53 12 #define CONFIG_MXC_GPIO 13 14 #include <asm/arch/imx-regs.h> 15 16 #define CONFIG_DISPLAY_CPUINFO 17 #define CONFIG_BOARD_EARLY_INIT_F 18 #define CONFIG_REVISION_TAG 19 #define CONFIG_SYS_NO_FLASH 20 #define CONFIG_SYS_FSL_CLK 21 22 #define CONFIG_TIMESTAMP /* Print image info with timestamp */ 23 24 /* 25 * U-Boot Commands 26 */ 27 #define CONFIG_DISPLAY_BOARDINFO 28 #define CONFIG_DOS_PARTITION 29 #define CONFIG_FAT_WRITE 30 31 #define CONFIG_CMD_ASKENV 32 #define CONFIG_CMD_BMP 33 #define CONFIG_CMD_DATE 34 #define CONFIG_CMD_EXT4 35 #define CONFIG_CMD_EXT4_WRITE 36 #define CONFIG_CMD_FAT 37 #define CONFIG_CMD_FS_GENERIC 38 #define CONFIG_CMD_GREPENV 39 #define CONFIG_CMD_MII 40 #define CONFIG_CMD_MMC 41 #define CONFIG_CMD_NAND 42 #define CONFIG_CMD_NAND_TRIMFFS 43 #define CONFIG_CMD_SATA 44 #define CONFIG_VIDEO 45 46 /* 47 * Memory configurations 48 */ 49 #define CONFIG_NR_DRAM_BANKS 2 50 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 51 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 52 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 53 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 54 #define PHYS_SDRAM_SIZE (gd->ram_size) 55 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 56 #define CONFIG_SYS_MEMTEST_START 0x70000000 57 #define CONFIG_SYS_MEMTEST_END 0x8ff00000 58 59 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 60 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 61 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 62 63 #define CONFIG_SYS_INIT_SP_OFFSET \ 64 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 65 #define CONFIG_SYS_INIT_SP_ADDR \ 66 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 67 68 #define CONFIG_SYS_TEXT_BASE 0x71000000 69 70 /* 71 * U-Boot general configurations 72 */ 73 #define CONFIG_SYS_LONGHELP 74 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 75 #define CONFIG_SYS_PBSIZE \ 76 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 77 /* Print buffer size */ 78 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 79 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 80 /* Boot argument buffer size */ 81 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */ 82 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 83 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 84 85 /* 86 * Serial Driver 87 */ 88 #define CONFIG_MXC_UART 89 #define CONFIG_MXC_UART_BASE UART2_BASE 90 #define CONFIG_CONS_INDEX 1 91 #define CONFIG_BAUDRATE 115200 92 93 /* 94 * MMC Driver 95 */ 96 #ifdef CONFIG_CMD_MMC 97 #define CONFIG_MMC 98 #define CONFIG_GENERIC_MMC 99 #define CONFIG_FSL_ESDHC 100 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 101 #define CONFIG_SYS_FSL_ESDHC_NUM 1 102 #endif 103 104 /* 105 * NAND 106 */ 107 #define CONFIG_ENV_SIZE (16 * 1024) 108 #ifdef CONFIG_CMD_NAND 109 #define CONFIG_SYS_MAX_NAND_DEVICE 1 110 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI 111 #define CONFIG_NAND_MXC 112 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI 113 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR 114 #define CONFIG_SYS_NAND_LARGEPAGE 115 #define CONFIG_MXC_NAND_HWECC 116 #define CONFIG_SYS_NAND_USE_FLASH_BBT 117 118 /* Environment is in NAND */ 119 #define CONFIG_ENV_IS_IN_NAND 120 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 121 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 122 #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE) 123 #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */ 124 #define CONFIG_ENV_OFFSET_REDUND \ 125 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) 126 127 #define CONFIG_CMD_UBI 128 #define CONFIG_CMD_UBIFS 129 #define CONFIG_CMD_MTDPARTS 130 #define CONFIG_RBTREE 131 #define CONFIG_LZO 132 #define CONFIG_MTD_DEVICE 133 #define CONFIG_MTD_PARTITIONS 134 #define MTDIDS_DEFAULT "nand0=mxc_nand" 135 #define MTDPARTS_DEFAULT \ 136 "mtdparts=mxc_nand:" \ 137 "1024k(u-boot)," \ 138 "512k(env1)," \ 139 "512k(env2)," \ 140 "14m(boot)," \ 141 "240m(data)," \ 142 "-@2048k(UBI)" 143 #else 144 #define CONFIG_ENV_IS_NOWHERE 145 #endif 146 147 /* 148 * Ethernet on SOC (FEC) 149 */ 150 #ifdef CONFIG_CMD_NET 151 #define CONFIG_FEC_MXC 152 #define IMX_FEC_BASE FEC_BASE_ADDR 153 #define CONFIG_FEC_MXC_PHYADDR 0x0 154 #define CONFIG_MII 155 #define CONFIG_DISCOVER_PHY 156 #define CONFIG_FEC_XCV_TYPE RMII 157 #define CONFIG_PHYLIB 158 #define CONFIG_PHY_MICREL 159 #define CONFIG_ETHPRIME "FEC0" 160 #endif 161 162 /* 163 * I2C 164 */ 165 #ifdef CONFIG_CMD_I2C 166 #define CONFIG_SYS_I2C 167 #define CONFIG_SYS_I2C_MXC 168 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 169 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 170 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 171 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */ 172 #endif 173 174 /* 175 * RTC 176 */ 177 #ifdef CONFIG_CMD_DATE 178 #define CONFIG_RTC_M41T62 179 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 180 #define CONFIG_SYS_M41T11_BASE_YEAR 2000 181 #endif 182 183 /* 184 * USB 185 */ 186 #ifdef CONFIG_CMD_USB 187 #define CONFIG_USB_EHCI 188 #define CONFIG_USB_EHCI_MX5 189 #define CONFIG_USB_STORAGE 190 #define CONFIG_USB_HOST_ETHER 191 #define CONFIG_USB_ETHER_ASIX 192 #define CONFIG_USB_ETHER_MCS7830 193 #define CONFIG_USB_ETHER_SMSC95XX 194 #define CONFIG_MXC_USB_PORT 1 195 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 196 #define CONFIG_MXC_USB_FLAGS 0 197 #endif 198 199 /* 200 * SATA 201 */ 202 #ifdef CONFIG_CMD_SATA 203 #define CONFIG_DWC_AHSATA 204 #define CONFIG_SYS_SATA_MAX_DEVICE 1 205 #define CONFIG_DWC_AHSATA_PORT_ID 0 206 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR 207 #define CONFIG_LBA48 208 #define CONFIG_LIBATA 209 #endif 210 211 /* 212 * LCD 213 */ 214 #ifdef CONFIG_VIDEO 215 #define CONFIG_VIDEO_IPUV3 216 #define CONFIG_CFB_CONSOLE 217 #define CONFIG_VGA_AS_SINGLE_DEVICE 218 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 219 #define CONFIG_VIDEO_BMP_RLE8 220 #define CONFIG_VIDEO_BMP_GZIP 221 #define CONFIG_SPLASH_SCREEN 222 #define CONFIG_SPLASHIMAGE_GUARD 223 #define CONFIG_SPLASH_SCREEN_ALIGN 224 #define CONFIG_BMP_16BPP 225 #define CONFIG_VIDEO_LOGO 226 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) 227 #define CONFIG_IPUV3_CLK 200000000 228 #endif 229 230 /* 231 * Boot Linux 232 */ 233 #define CONFIG_CMDLINE_TAG 234 #define CONFIG_INITRD_TAG 235 #define CONFIG_REVISION_TAG 236 #define CONFIG_SETUP_MEMORY_TAGS 237 #define CONFIG_BOOTDELAY 3 238 #define CONFIG_BOOTFILE "fitImage" 239 #define CONFIG_BOOTARGS "console=ttymxc1,115200" 240 #define CONFIG_LOADADDR 0x70800000 241 #define CONFIG_BOOTCOMMAND "run mmc_mmc" 242 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 243 244 /* 245 * NAND SPL 246 */ 247 #define CONFIG_SPL_FRAMEWORK 248 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" 249 #define CONFIG_SPL_BOARD_INIT 250 #define CONFIG_SPL_TEXT_BASE 0x70008000 251 #define CONFIG_SPL_PAD_TO 0x8000 252 #define CONFIG_SPL_STACK 0x70004000 253 #define CONFIG_SPL_GPIO_SUPPORT 254 #define CONFIG_SPL_LIBCOMMON_SUPPORT 255 #define CONFIG_SPL_LIBGENERIC_SUPPORT 256 #define CONFIG_SPL_NAND_SUPPORT 257 #define CONFIG_SPL_SERIAL_SUPPORT 258 259 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO 260 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 261 #define CONFIG_SYS_NAND_OOBSIZE 64 262 #define CONFIG_SYS_NAND_PAGE_COUNT 64 263 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 264 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 265 266 /* 267 * Extra Environments 268 */ 269 #define CONFIG_PREBOOT "run try_bootscript" 270 #define CONFIG_HOSTNAME m53evk 271 272 #define CONFIG_EXTRA_ENV_SETTINGS \ 273 "consdev=ttymxc1\0" \ 274 "baudrate=115200\0" \ 275 "bootscript=boot.scr\0" \ 276 "bootdev=/dev/mmcblk0p1\0" \ 277 "rootdev=/dev/mmcblk0p2\0" \ 278 "netdev=eth0\0" \ 279 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \ 280 "kernel_addr_r=0x72000000\0" \ 281 "addcons=" \ 282 "setenv bootargs ${bootargs} " \ 283 "console=${consdev},${baudrate}\0" \ 284 "addip=" \ 285 "setenv bootargs ${bootargs} " \ 286 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 287 "${netmask}:${hostname}:${netdev}:off\0" \ 288 "addmisc=" \ 289 "setenv bootargs ${bootargs} ${miscargs}\0" \ 290 "adddfltmtd=" \ 291 "if test \"x${mtdparts}\" == \"x\" ; then " \ 292 "mtdparts default ; " \ 293 "fi\0" \ 294 "addmtd=" \ 295 "run adddfltmtd ; " \ 296 "setenv bootargs ${bootargs} ${mtdparts}\0" \ 297 "addargs=run addcons addmtd addmisc\0" \ 298 "mmcload=" \ 299 "mmc rescan ; " \ 300 "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \ 301 "ubiload=" \ 302 "ubi part UBI ; ubifsmount ubi0:rootfs ; " \ 303 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \ 304 "netload=" \ 305 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \ 306 "miscargs=nohlt panic=1\0" \ 307 "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \ 308 "ubiargs=" \ 309 "setenv bootargs ubi.mtd=5 " \ 310 "root=ubi0:rootfs rootfstype=ubifs\0" \ 311 "nfsargs=" \ 312 "setenv bootargs root=/dev/nfs rw " \ 313 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \ 314 "mmc_mmc=" \ 315 "run mmcload mmcargs addargs ; " \ 316 "bootm ${kernel_addr_r}\0" \ 317 "mmc_ubi=" \ 318 "run mmcload ubiargs addargs ; " \ 319 "bootm ${kernel_addr_r}\0" \ 320 "mmc_nfs=" \ 321 "run mmcload nfsargs addip addargs ; " \ 322 "bootm ${kernel_addr_r}\0" \ 323 "ubi_mmc=" \ 324 "run ubiload mmcargs addargs ; " \ 325 "bootm ${kernel_addr_r}\0" \ 326 "ubi_ubi=" \ 327 "run ubiload ubiargs addargs ; " \ 328 "bootm ${kernel_addr_r}\0" \ 329 "ubi_nfs=" \ 330 "run ubiload nfsargs addip addargs ; " \ 331 "bootm ${kernel_addr_r}\0" \ 332 "net_mmc=" \ 333 "run netload mmcargs addargs ; " \ 334 "bootm ${kernel_addr_r}\0" \ 335 "net_ubi=" \ 336 "run netload ubiargs addargs ; " \ 337 "bootm ${kernel_addr_r}\0" \ 338 "net_nfs=" \ 339 "run netload nfsargs addip addargs ; " \ 340 "bootm ${kernel_addr_r}\0" \ 341 "try_bootscript=" \ 342 "mmc rescan;" \ 343 "if test -e mmc 0:1 ${bootscript} ; then " \ 344 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \ 345 "then ; " \ 346 "echo Running bootscript... ; " \ 347 "source ${kernel_addr_r} ; " \ 348 "fi ; " \ 349 "fi\0" 350 351 #endif /* __M53EVK_CONFIG_H__ */ 352