1 /* 2 * DENX M53 configuration 3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __M53EVK_CONFIG_H__ 9 #define __M53EVK_CONFIG_H__ 10 11 #define CONFIG_MX53 12 #define CONFIG_MXC_GPIO 13 14 #include <asm/arch/imx-regs.h> 15 16 #define CONFIG_BOARD_EARLY_INIT_F 17 #define CONFIG_REVISION_TAG 18 #define CONFIG_SYS_NO_FLASH 19 #define CONFIG_SYS_FSL_CLK 20 21 #define CONFIG_TIMESTAMP /* Print image info with timestamp */ 22 23 /* 24 * U-Boot Commands 25 */ 26 #define CONFIG_DOS_PARTITION 27 #define CONFIG_FAT_WRITE 28 29 #define CONFIG_CMD_BMP 30 #define CONFIG_CMD_DATE 31 #define CONFIG_CMD_NAND 32 #define CONFIG_CMD_NAND_TRIMFFS 33 #define CONFIG_CMD_SATA 34 #define CONFIG_VIDEO 35 36 /* 37 * Memory configurations 38 */ 39 #define CONFIG_NR_DRAM_BANKS 2 40 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 41 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 42 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 43 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 44 #define PHYS_SDRAM_SIZE (gd->ram_size) 45 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 46 #define CONFIG_SYS_MEMTEST_START 0x70000000 47 #define CONFIG_SYS_MEMTEST_END 0x8ff00000 48 49 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 50 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 51 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 52 53 #define CONFIG_SYS_INIT_SP_OFFSET \ 54 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 55 #define CONFIG_SYS_INIT_SP_ADDR \ 56 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 57 58 #define CONFIG_SYS_TEXT_BASE 0x71000000 59 60 /* 61 * U-Boot general configurations 62 */ 63 #define CONFIG_SYS_LONGHELP 64 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 65 #define CONFIG_SYS_PBSIZE \ 66 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 67 /* Print buffer size */ 68 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 69 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 70 /* Boot argument buffer size */ 71 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 72 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 73 74 /* 75 * Serial Driver 76 */ 77 #define CONFIG_MXC_UART 78 #define CONFIG_MXC_UART_BASE UART2_BASE 79 #define CONFIG_CONS_INDEX 1 80 #define CONFIG_BAUDRATE 115200 81 82 /* 83 * MMC Driver 84 */ 85 #ifdef CONFIG_CMD_MMC 86 #define CONFIG_MMC 87 #define CONFIG_GENERIC_MMC 88 #define CONFIG_FSL_ESDHC 89 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 90 #define CONFIG_SYS_FSL_ESDHC_NUM 1 91 #endif 92 93 /* 94 * NAND 95 */ 96 #define CONFIG_ENV_SIZE (16 * 1024) 97 #ifdef CONFIG_CMD_NAND 98 #define CONFIG_SYS_MAX_NAND_DEVICE 1 99 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI 100 #define CONFIG_NAND_MXC 101 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI 102 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR 103 #define CONFIG_SYS_NAND_LARGEPAGE 104 #define CONFIG_MXC_NAND_HWECC 105 #define CONFIG_SYS_NAND_USE_FLASH_BBT 106 107 /* Environment is in NAND */ 108 #define CONFIG_ENV_IS_IN_NAND 109 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 110 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 111 #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE) 112 #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */ 113 #define CONFIG_ENV_OFFSET_REDUND \ 114 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) 115 116 #define CONFIG_CMD_UBIFS 117 #define CONFIG_CMD_MTDPARTS 118 #define CONFIG_RBTREE 119 #define CONFIG_LZO 120 #define CONFIG_MTD_DEVICE 121 #define CONFIG_MTD_PARTITIONS 122 #define MTDIDS_DEFAULT "nand0=mxc_nand" 123 #define MTDPARTS_DEFAULT \ 124 "mtdparts=mxc_nand:" \ 125 "1024k(u-boot)," \ 126 "512k(env1)," \ 127 "512k(env2)," \ 128 "14m(boot)," \ 129 "240m(data)," \ 130 "-@2048k(UBI)" 131 #else 132 #define CONFIG_ENV_IS_NOWHERE 133 #endif 134 135 /* 136 * Ethernet on SOC (FEC) 137 */ 138 #ifdef CONFIG_CMD_NET 139 #define CONFIG_FEC_MXC 140 #define IMX_FEC_BASE FEC_BASE_ADDR 141 #define CONFIG_FEC_MXC_PHYADDR 0x0 142 #define CONFIG_MII 143 #define CONFIG_DISCOVER_PHY 144 #define CONFIG_FEC_XCV_TYPE RMII 145 #define CONFIG_PHYLIB 146 #define CONFIG_PHY_MICREL 147 #define CONFIG_ETHPRIME "FEC0" 148 #endif 149 150 /* 151 * I2C 152 */ 153 #ifdef CONFIG_CMD_I2C 154 #define CONFIG_SYS_I2C 155 #define CONFIG_SYS_I2C_MXC 156 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 157 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 158 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 159 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */ 160 #endif 161 162 /* 163 * RTC 164 */ 165 #ifdef CONFIG_CMD_DATE 166 #define CONFIG_RTC_M41T62 167 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 168 #define CONFIG_SYS_M41T11_BASE_YEAR 2000 169 #endif 170 171 /* 172 * USB 173 */ 174 #ifdef CONFIG_CMD_USB 175 #define CONFIG_USB_EHCI 176 #define CONFIG_USB_EHCI_MX5 177 #define CONFIG_USB_HOST_ETHER 178 #define CONFIG_USB_ETHER_ASIX 179 #define CONFIG_USB_ETHER_MCS7830 180 #define CONFIG_USB_ETHER_SMSC95XX 181 #define CONFIG_MXC_USB_PORT 1 182 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 183 #define CONFIG_MXC_USB_FLAGS 0 184 #endif 185 186 /* 187 * SATA 188 */ 189 #ifdef CONFIG_CMD_SATA 190 #define CONFIG_DWC_AHSATA 191 #define CONFIG_SYS_SATA_MAX_DEVICE 1 192 #define CONFIG_DWC_AHSATA_PORT_ID 0 193 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR 194 #define CONFIG_LBA48 195 #define CONFIG_LIBATA 196 #endif 197 198 /* 199 * LCD 200 */ 201 #ifdef CONFIG_VIDEO 202 #define CONFIG_VIDEO_IPUV3 203 #define CONFIG_CFB_CONSOLE 204 #define CONFIG_VGA_AS_SINGLE_DEVICE 205 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 206 #define CONFIG_VIDEO_BMP_RLE8 207 #define CONFIG_VIDEO_BMP_GZIP 208 #define CONFIG_SPLASH_SCREEN 209 #define CONFIG_SPLASHIMAGE_GUARD 210 #define CONFIG_SPLASH_SCREEN_ALIGN 211 #define CONFIG_BMP_16BPP 212 #define CONFIG_VIDEO_LOGO 213 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) 214 #define CONFIG_IPUV3_CLK 200000000 215 #endif 216 217 /* 218 * Boot Linux 219 */ 220 #define CONFIG_CMDLINE_TAG 221 #define CONFIG_INITRD_TAG 222 #define CONFIG_REVISION_TAG 223 #define CONFIG_SETUP_MEMORY_TAGS 224 #define CONFIG_BOOTFILE "fitImage" 225 #define CONFIG_BOOTARGS "console=ttymxc1,115200" 226 #define CONFIG_LOADADDR 0x70800000 227 #define CONFIG_BOOTCOMMAND "run mmc_mmc" 228 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 229 230 /* 231 * NAND SPL 232 */ 233 #define CONFIG_SPL_FRAMEWORK 234 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" 235 #define CONFIG_SPL_BOARD_INIT 236 #define CONFIG_SPL_TEXT_BASE 0x70008000 237 #define CONFIG_SPL_PAD_TO 0x8000 238 #define CONFIG_SPL_STACK 0x70004000 239 240 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO 241 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 242 #define CONFIG_SYS_NAND_OOBSIZE 64 243 #define CONFIG_SYS_NAND_PAGE_COUNT 64 244 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 245 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 246 247 /* 248 * Extra Environments 249 */ 250 #define CONFIG_PREBOOT "run try_bootscript" 251 #define CONFIG_HOSTNAME m53evk 252 253 #define CONFIG_EXTRA_ENV_SETTINGS \ 254 "consdev=ttymxc1\0" \ 255 "baudrate=115200\0" \ 256 "bootscript=boot.scr\0" \ 257 "bootdev=/dev/mmcblk0p1\0" \ 258 "rootdev=/dev/mmcblk0p2\0" \ 259 "netdev=eth0\0" \ 260 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \ 261 "kernel_addr_r=0x72000000\0" \ 262 "addcons=" \ 263 "setenv bootargs ${bootargs} " \ 264 "console=${consdev},${baudrate}\0" \ 265 "addip=" \ 266 "setenv bootargs ${bootargs} " \ 267 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 268 "${netmask}:${hostname}:${netdev}:off\0" \ 269 "addmisc=" \ 270 "setenv bootargs ${bootargs} ${miscargs}\0" \ 271 "adddfltmtd=" \ 272 "if test \"x${mtdparts}\" == \"x\" ; then " \ 273 "mtdparts default ; " \ 274 "fi\0" \ 275 "addmtd=" \ 276 "run adddfltmtd ; " \ 277 "setenv bootargs ${bootargs} ${mtdparts}\0" \ 278 "addargs=run addcons addmtd addmisc\0" \ 279 "mmcload=" \ 280 "mmc rescan ; " \ 281 "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \ 282 "ubiload=" \ 283 "ubi part UBI ; ubifsmount ubi0:rootfs ; " \ 284 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \ 285 "netload=" \ 286 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \ 287 "miscargs=nohlt panic=1\0" \ 288 "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \ 289 "ubiargs=" \ 290 "setenv bootargs ubi.mtd=5 " \ 291 "root=ubi0:rootfs rootfstype=ubifs\0" \ 292 "nfsargs=" \ 293 "setenv bootargs root=/dev/nfs rw " \ 294 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \ 295 "mmc_mmc=" \ 296 "run mmcload mmcargs addargs ; " \ 297 "bootm ${kernel_addr_r}\0" \ 298 "mmc_ubi=" \ 299 "run mmcload ubiargs addargs ; " \ 300 "bootm ${kernel_addr_r}\0" \ 301 "mmc_nfs=" \ 302 "run mmcload nfsargs addip addargs ; " \ 303 "bootm ${kernel_addr_r}\0" \ 304 "ubi_mmc=" \ 305 "run ubiload mmcargs addargs ; " \ 306 "bootm ${kernel_addr_r}\0" \ 307 "ubi_ubi=" \ 308 "run ubiload ubiargs addargs ; " \ 309 "bootm ${kernel_addr_r}\0" \ 310 "ubi_nfs=" \ 311 "run ubiload nfsargs addip addargs ; " \ 312 "bootm ${kernel_addr_r}\0" \ 313 "net_mmc=" \ 314 "run netload mmcargs addargs ; " \ 315 "bootm ${kernel_addr_r}\0" \ 316 "net_ubi=" \ 317 "run netload ubiargs addargs ; " \ 318 "bootm ${kernel_addr_r}\0" \ 319 "net_nfs=" \ 320 "run netload nfsargs addip addargs ; " \ 321 "bootm ${kernel_addr_r}\0" \ 322 "try_bootscript=" \ 323 "mmc rescan;" \ 324 "if test -e mmc 0:1 ${bootscript} ; then " \ 325 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \ 326 "then ; " \ 327 "echo Running bootscript... ; " \ 328 "source ${kernel_addr_r} ; " \ 329 "fi ; " \ 330 "fi\0" 331 332 #endif /* __M53EVK_CONFIG_H__ */ 333