1 /* 2 * DENX M53 configuration 3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __M53EVK_CONFIG_H__ 9 #define __M53EVK_CONFIG_H__ 10 11 #define CONFIG_MX53 12 #define CONFIG_MXC_GPIO 13 14 #include <asm/arch/imx-regs.h> 15 16 #define CONFIG_REVISION_TAG 17 #define CONFIG_SYS_FSL_CLK 18 19 #define CONFIG_TIMESTAMP /* Print image info with timestamp */ 20 21 /* 22 * U-Boot Commands 23 */ 24 #define CONFIG_FAT_WRITE 25 26 #define CONFIG_CMD_BMP 27 #define CONFIG_CMD_DATE 28 #define CONFIG_CMD_NAND 29 #define CONFIG_CMD_NAND_TRIMFFS 30 #define CONFIG_CMD_SATA 31 32 /* 33 * Memory configurations 34 */ 35 #define CONFIG_NR_DRAM_BANKS 2 36 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 37 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 38 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 39 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 40 #define PHYS_SDRAM_SIZE (gd->ram_size) 41 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 42 #define CONFIG_SYS_MEMTEST_START 0x70000000 43 #define CONFIG_SYS_MEMTEST_END 0x8ff00000 44 45 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 46 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 47 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 48 49 #define CONFIG_SYS_INIT_SP_OFFSET \ 50 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 51 #define CONFIG_SYS_INIT_SP_ADDR \ 52 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 53 54 #define CONFIG_SYS_TEXT_BASE 0x71000000 55 56 /* 57 * U-Boot general configurations 58 */ 59 #define CONFIG_SYS_LONGHELP 60 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 61 #define CONFIG_SYS_PBSIZE \ 62 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 63 /* Print buffer size */ 64 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 65 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 66 /* Boot argument buffer size */ 67 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 68 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 69 70 /* 71 * Serial Driver 72 */ 73 #define CONFIG_MXC_UART 74 #define CONFIG_MXC_UART_BASE UART2_BASE 75 #define CONFIG_CONS_INDEX 1 76 #define CONFIG_BAUDRATE 115200 77 78 /* 79 * MMC Driver 80 */ 81 #ifdef CONFIG_CMD_MMC 82 #define CONFIG_FSL_ESDHC 83 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 84 #define CONFIG_SYS_FSL_ESDHC_NUM 1 85 #endif 86 87 /* 88 * NAND 89 */ 90 #define CONFIG_ENV_SIZE (16 * 1024) 91 #ifdef CONFIG_CMD_NAND 92 #define CONFIG_SYS_MAX_NAND_DEVICE 1 93 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI 94 #define CONFIG_NAND_MXC 95 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI 96 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR 97 #define CONFIG_SYS_NAND_LARGEPAGE 98 #define CONFIG_MXC_NAND_HWECC 99 #define CONFIG_SYS_NAND_USE_FLASH_BBT 100 101 /* Environment is in NAND */ 102 #define CONFIG_ENV_IS_IN_NAND 103 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 104 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 105 #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE) 106 #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */ 107 #define CONFIG_ENV_OFFSET_REDUND \ 108 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) 109 110 #define CONFIG_CMD_UBIFS 111 #define CONFIG_CMD_MTDPARTS 112 #define CONFIG_RBTREE 113 #define CONFIG_LZO 114 #define CONFIG_MTD_DEVICE 115 #define CONFIG_MTD_PARTITIONS 116 #define MTDIDS_DEFAULT "nand0=mxc_nand" 117 #define MTDPARTS_DEFAULT \ 118 "mtdparts=mxc_nand:" \ 119 "1024k(u-boot)," \ 120 "512k(env1)," \ 121 "512k(env2)," \ 122 "14m(boot)," \ 123 "240m(data)," \ 124 "-@2048k(UBI)" 125 #else 126 #define CONFIG_ENV_IS_NOWHERE 127 #endif 128 129 /* 130 * Ethernet on SOC (FEC) 131 */ 132 #ifdef CONFIG_CMD_NET 133 #define CONFIG_FEC_MXC 134 #define IMX_FEC_BASE FEC_BASE_ADDR 135 #define CONFIG_FEC_MXC_PHYADDR 0x0 136 #define CONFIG_MII 137 #define CONFIG_DISCOVER_PHY 138 #define CONFIG_FEC_XCV_TYPE RMII 139 #define CONFIG_PHYLIB 140 #define CONFIG_PHY_MICREL 141 #define CONFIG_ETHPRIME "FEC0" 142 #endif 143 144 /* 145 * I2C 146 */ 147 #ifdef CONFIG_CMD_I2C 148 #define CONFIG_SYS_I2C 149 #define CONFIG_SYS_I2C_MXC 150 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 151 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 152 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 153 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */ 154 #endif 155 156 /* 157 * RTC 158 */ 159 #ifdef CONFIG_CMD_DATE 160 #define CONFIG_RTC_M41T62 161 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 162 #define CONFIG_SYS_M41T11_BASE_YEAR 2000 163 #endif 164 165 /* 166 * USB 167 */ 168 #ifdef CONFIG_CMD_USB 169 #define CONFIG_USB_EHCI 170 #define CONFIG_USB_EHCI_MX5 171 #define CONFIG_USB_HOST_ETHER 172 #define CONFIG_USB_ETHER_ASIX 173 #define CONFIG_USB_ETHER_MCS7830 174 #define CONFIG_USB_ETHER_SMSC95XX 175 #define CONFIG_MXC_USB_PORT 1 176 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 177 #define CONFIG_MXC_USB_FLAGS 0 178 #endif 179 180 /* 181 * SATA 182 */ 183 #ifdef CONFIG_CMD_SATA 184 #define CONFIG_DWC_AHSATA 185 #define CONFIG_SYS_SATA_MAX_DEVICE 1 186 #define CONFIG_DWC_AHSATA_PORT_ID 0 187 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR 188 #define CONFIG_LBA48 189 #define CONFIG_LIBATA 190 #endif 191 192 /* 193 * LCD 194 */ 195 #ifdef CONFIG_VIDEO 196 #define CONFIG_VIDEO_IPUV3 197 #define CONFIG_VIDEO_BMP_RLE8 198 #define CONFIG_VIDEO_BMP_GZIP 199 #define CONFIG_SPLASH_SCREEN 200 #define CONFIG_SPLASHIMAGE_GUARD 201 #define CONFIG_SPLASH_SCREEN_ALIGN 202 #define CONFIG_BMP_16BPP 203 #define CONFIG_VIDEO_LOGO 204 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) 205 #define CONFIG_IPUV3_CLK 200000000 206 #endif 207 208 /* 209 * Boot Linux 210 */ 211 #define CONFIG_CMDLINE_TAG 212 #define CONFIG_INITRD_TAG 213 #define CONFIG_REVISION_TAG 214 #define CONFIG_SETUP_MEMORY_TAGS 215 #define CONFIG_BOOTFILE "fitImage" 216 #define CONFIG_BOOTARGS "console=ttymxc1,115200" 217 #define CONFIG_LOADADDR 0x70800000 218 #define CONFIG_BOOTCOMMAND "run mmc_mmc" 219 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 220 221 /* 222 * NAND SPL 223 */ 224 #define CONFIG_SPL_FRAMEWORK 225 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" 226 #define CONFIG_SPL_BOARD_INIT 227 #define CONFIG_SPL_TEXT_BASE 0x70008000 228 #define CONFIG_SPL_PAD_TO 0x8000 229 #define CONFIG_SPL_STACK 0x70004000 230 231 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO 232 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 233 #define CONFIG_SYS_NAND_OOBSIZE 64 234 #define CONFIG_SYS_NAND_PAGE_COUNT 64 235 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 236 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 237 238 /* 239 * Extra Environments 240 */ 241 #define CONFIG_PREBOOT "run try_bootscript" 242 #define CONFIG_HOSTNAME m53evk 243 244 #define CONFIG_EXTRA_ENV_SETTINGS \ 245 "consdev=ttymxc1\0" \ 246 "baudrate=115200\0" \ 247 "bootscript=boot.scr\0" \ 248 "bootdev=/dev/mmcblk0p1\0" \ 249 "rootdev=/dev/mmcblk0p2\0" \ 250 "netdev=eth0\0" \ 251 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \ 252 "kernel_addr_r=0x72000000\0" \ 253 "addcons=" \ 254 "setenv bootargs ${bootargs} " \ 255 "console=${consdev},${baudrate}\0" \ 256 "addip=" \ 257 "setenv bootargs ${bootargs} " \ 258 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 259 "${netmask}:${hostname}:${netdev}:off\0" \ 260 "addmisc=" \ 261 "setenv bootargs ${bootargs} ${miscargs}\0" \ 262 "adddfltmtd=" \ 263 "if test \"x${mtdparts}\" == \"x\" ; then " \ 264 "mtdparts default ; " \ 265 "fi\0" \ 266 "addmtd=" \ 267 "run adddfltmtd ; " \ 268 "setenv bootargs ${bootargs} ${mtdparts}\0" \ 269 "addargs=run addcons addmtd addmisc\0" \ 270 "mmcload=" \ 271 "mmc rescan ; " \ 272 "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \ 273 "ubiload=" \ 274 "ubi part UBI ; ubifsmount ubi0:rootfs ; " \ 275 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \ 276 "netload=" \ 277 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \ 278 "miscargs=nohlt panic=1\0" \ 279 "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \ 280 "ubiargs=" \ 281 "setenv bootargs ubi.mtd=5 " \ 282 "root=ubi0:rootfs rootfstype=ubifs\0" \ 283 "nfsargs=" \ 284 "setenv bootargs root=/dev/nfs rw " \ 285 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \ 286 "mmc_mmc=" \ 287 "run mmcload mmcargs addargs ; " \ 288 "bootm ${kernel_addr_r}\0" \ 289 "mmc_ubi=" \ 290 "run mmcload ubiargs addargs ; " \ 291 "bootm ${kernel_addr_r}\0" \ 292 "mmc_nfs=" \ 293 "run mmcload nfsargs addip addargs ; " \ 294 "bootm ${kernel_addr_r}\0" \ 295 "ubi_mmc=" \ 296 "run ubiload mmcargs addargs ; " \ 297 "bootm ${kernel_addr_r}\0" \ 298 "ubi_ubi=" \ 299 "run ubiload ubiargs addargs ; " \ 300 "bootm ${kernel_addr_r}\0" \ 301 "ubi_nfs=" \ 302 "run ubiload nfsargs addip addargs ; " \ 303 "bootm ${kernel_addr_r}\0" \ 304 "net_mmc=" \ 305 "run netload mmcargs addargs ; " \ 306 "bootm ${kernel_addr_r}\0" \ 307 "net_ubi=" \ 308 "run netload ubiargs addargs ; " \ 309 "bootm ${kernel_addr_r}\0" \ 310 "net_nfs=" \ 311 "run netload nfsargs addip addargs ; " \ 312 "bootm ${kernel_addr_r}\0" \ 313 "try_bootscript=" \ 314 "mmc rescan;" \ 315 "if test -e mmc 0:1 ${bootscript} ; then " \ 316 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \ 317 "then ; " \ 318 "echo Running bootscript... ; " \ 319 "source ${kernel_addr_r} ; " \ 320 "fi ; " \ 321 "fi\0" 322 323 #endif /* __M53EVK_CONFIG_H__ */ 324