1 /* 2 * Aries M53 configuration 3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __M53EVK_CONFIG_H__ 9 #define __M53EVK_CONFIG_H__ 10 11 #define CONFIG_MXC_GPIO 12 13 #include <asm/arch/imx-regs.h> 14 15 #define CONFIG_REVISION_TAG 16 #define CONFIG_SYS_FSL_CLK 17 18 #define CONFIG_TIMESTAMP /* Print image info with timestamp */ 19 20 /* 21 * U-Boot Commands 22 */ 23 #define CONFIG_FAT_WRITE 24 25 #define CONFIG_CMD_NAND 26 #define CONFIG_CMD_NAND_TRIMFFS 27 #define CONFIG_CMD_SATA 28 29 /* 30 * Memory configurations 31 */ 32 #define CONFIG_NR_DRAM_BANKS 2 33 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 34 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 35 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 36 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 37 #define PHYS_SDRAM_SIZE (gd->ram_size) 38 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 39 #define CONFIG_SYS_MEMTEST_START 0x70000000 40 #define CONFIG_SYS_MEMTEST_END 0x8ff00000 41 42 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 43 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 44 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 45 46 #define CONFIG_SYS_INIT_SP_OFFSET \ 47 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 48 #define CONFIG_SYS_INIT_SP_ADDR \ 49 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 50 51 #define CONFIG_SYS_TEXT_BASE 0x71000000 52 53 /* 54 * U-Boot general configurations 55 */ 56 #define CONFIG_SYS_LONGHELP 57 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 58 #define CONFIG_SYS_PBSIZE \ 59 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 60 /* Print buffer size */ 61 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 62 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 63 /* Boot argument buffer size */ 64 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 65 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 66 67 /* 68 * Serial Driver 69 */ 70 #define CONFIG_MXC_UART 71 #define CONFIG_MXC_UART_BASE UART2_BASE 72 #define CONFIG_CONS_INDEX 1 73 74 /* 75 * MMC Driver 76 */ 77 #ifdef CONFIG_CMD_MMC 78 #define CONFIG_FSL_ESDHC 79 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 80 #define CONFIG_SYS_FSL_ESDHC_NUM 1 81 #endif 82 83 /* 84 * NAND 85 */ 86 #define CONFIG_ENV_SIZE (16 * 1024) 87 #ifdef CONFIG_CMD_NAND 88 #define CONFIG_SYS_MAX_NAND_DEVICE 1 89 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI 90 #define CONFIG_NAND_MXC 91 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI 92 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR 93 #define CONFIG_SYS_NAND_LARGEPAGE 94 #define CONFIG_MXC_NAND_HWECC 95 #define CONFIG_SYS_NAND_USE_FLASH_BBT 96 97 /* Environment is in NAND */ 98 #define CONFIG_ENV_IS_IN_NAND 99 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 100 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 101 #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE) 102 #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */ 103 #define CONFIG_ENV_OFFSET_REDUND \ 104 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) 105 106 #define CONFIG_CMD_UBIFS 107 #define CONFIG_CMD_MTDPARTS 108 #define CONFIG_RBTREE 109 #define CONFIG_LZO 110 #define CONFIG_MTD_DEVICE 111 #define CONFIG_MTD_PARTITIONS 112 #define MTDIDS_DEFAULT "nand0=mxc_nand" 113 #define MTDPARTS_DEFAULT \ 114 "mtdparts=mxc_nand:" \ 115 "1024k(u-boot)," \ 116 "512k(env1)," \ 117 "512k(env2)," \ 118 "14m(boot)," \ 119 "240m(data)," \ 120 "-@2048k(UBI)" 121 #else 122 #define CONFIG_ENV_IS_NOWHERE 123 #endif 124 125 /* 126 * Ethernet on SOC (FEC) 127 */ 128 #ifdef CONFIG_CMD_NET 129 #define CONFIG_FEC_MXC 130 #define IMX_FEC_BASE FEC_BASE_ADDR 131 #define CONFIG_FEC_MXC_PHYADDR 0x0 132 #define CONFIG_MII 133 #define CONFIG_DISCOVER_PHY 134 #define CONFIG_FEC_XCV_TYPE RMII 135 #define CONFIG_PHYLIB 136 #define CONFIG_PHY_MICREL 137 #define CONFIG_ETHPRIME "FEC0" 138 #endif 139 140 /* 141 * I2C 142 */ 143 #ifdef CONFIG_CMD_I2C 144 #define CONFIG_SYS_I2C 145 #define CONFIG_SYS_I2C_MXC 146 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 147 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 148 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 149 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */ 150 #endif 151 152 /* 153 * RTC 154 */ 155 #ifdef CONFIG_CMD_DATE 156 #define CONFIG_RTC_M41T62 157 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 158 #define CONFIG_SYS_M41T11_BASE_YEAR 2000 159 #endif 160 161 /* 162 * USB 163 */ 164 #ifdef CONFIG_CMD_USB 165 #define CONFIG_USB_EHCI 166 #define CONFIG_USB_EHCI_MX5 167 #define CONFIG_USB_HOST_ETHER 168 #define CONFIG_USB_ETHER_ASIX 169 #define CONFIG_USB_ETHER_MCS7830 170 #define CONFIG_USB_ETHER_SMSC95XX 171 #define CONFIG_MXC_USB_PORT 1 172 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 173 #define CONFIG_MXC_USB_FLAGS 0 174 #endif 175 176 /* 177 * SATA 178 */ 179 #ifdef CONFIG_CMD_SATA 180 #define CONFIG_DWC_AHSATA 181 #define CONFIG_SYS_SATA_MAX_DEVICE 1 182 #define CONFIG_DWC_AHSATA_PORT_ID 0 183 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR 184 #define CONFIG_LBA48 185 #define CONFIG_LIBATA 186 #endif 187 188 /* 189 * LCD 190 */ 191 #ifdef CONFIG_VIDEO 192 #define CONFIG_VIDEO_IPUV3 193 #define CONFIG_VIDEO_BMP_RLE8 194 #define CONFIG_VIDEO_BMP_GZIP 195 #define CONFIG_SPLASH_SCREEN 196 #define CONFIG_SPLASHIMAGE_GUARD 197 #define CONFIG_SPLASH_SCREEN_ALIGN 198 #define CONFIG_BMP_16BPP 199 #define CONFIG_VIDEO_LOGO 200 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) 201 #define CONFIG_IPUV3_CLK 200000000 202 #endif 203 204 /* 205 * Boot Linux 206 */ 207 #define CONFIG_CMDLINE_TAG 208 #define CONFIG_INITRD_TAG 209 #define CONFIG_REVISION_TAG 210 #define CONFIG_SETUP_MEMORY_TAGS 211 #define CONFIG_BOOTFILE "fitImage" 212 #define CONFIG_BOOTARGS "console=ttymxc1,115200" 213 #define CONFIG_LOADADDR 0x70800000 214 #define CONFIG_BOOTCOMMAND "run mmc_mmc" 215 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 216 217 /* 218 * NAND SPL 219 */ 220 #define CONFIG_SPL_FRAMEWORK 221 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" 222 #define CONFIG_SPL_BOARD_INIT 223 #define CONFIG_SPL_TEXT_BASE 0x70008000 224 #define CONFIG_SPL_PAD_TO 0x8000 225 #define CONFIG_SPL_STACK 0x70004000 226 227 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO 228 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 229 #define CONFIG_SYS_NAND_OOBSIZE 64 230 #define CONFIG_SYS_NAND_PAGE_COUNT 64 231 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 232 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 233 234 /* 235 * Extra Environments 236 */ 237 #define CONFIG_PREBOOT "run try_bootscript" 238 #define CONFIG_HOSTNAME m53evk 239 240 #define CONFIG_EXTRA_ENV_SETTINGS \ 241 "consdev=ttymxc1\0" \ 242 "baudrate=115200\0" \ 243 "bootscript=boot.scr\0" \ 244 "bootdev=/dev/mmcblk0p1\0" \ 245 "rootdev=/dev/mmcblk0p2\0" \ 246 "netdev=eth0\0" \ 247 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \ 248 "kernel_addr_r=0x72000000\0" \ 249 "addcons=" \ 250 "setenv bootargs ${bootargs} " \ 251 "console=${consdev},${baudrate}\0" \ 252 "addip=" \ 253 "setenv bootargs ${bootargs} " \ 254 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 255 "${netmask}:${hostname}:${netdev}:off\0" \ 256 "addmisc=" \ 257 "setenv bootargs ${bootargs} ${miscargs}\0" \ 258 "adddfltmtd=" \ 259 "if test \"x${mtdparts}\" == \"x\" ; then " \ 260 "mtdparts default ; " \ 261 "fi\0" \ 262 "addmtd=" \ 263 "run adddfltmtd ; " \ 264 "setenv bootargs ${bootargs} ${mtdparts}\0" \ 265 "addargs=run addcons addmtd addmisc\0" \ 266 "mmcload=" \ 267 "mmc rescan ; " \ 268 "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \ 269 "ubiload=" \ 270 "ubi part UBI ; ubifsmount ubi0:rootfs ; " \ 271 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \ 272 "netload=" \ 273 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \ 274 "miscargs=nohlt panic=1\0" \ 275 "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \ 276 "ubiargs=" \ 277 "setenv bootargs ubi.mtd=5 " \ 278 "root=ubi0:rootfs rootfstype=ubifs\0" \ 279 "nfsargs=" \ 280 "setenv bootargs root=/dev/nfs rw " \ 281 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \ 282 "mmc_mmc=" \ 283 "run mmcload mmcargs addargs ; " \ 284 "bootm ${kernel_addr_r}\0" \ 285 "mmc_ubi=" \ 286 "run mmcload ubiargs addargs ; " \ 287 "bootm ${kernel_addr_r}\0" \ 288 "mmc_nfs=" \ 289 "run mmcload nfsargs addip addargs ; " \ 290 "bootm ${kernel_addr_r}\0" \ 291 "ubi_mmc=" \ 292 "run ubiload mmcargs addargs ; " \ 293 "bootm ${kernel_addr_r}\0" \ 294 "ubi_ubi=" \ 295 "run ubiload ubiargs addargs ; " \ 296 "bootm ${kernel_addr_r}\0" \ 297 "ubi_nfs=" \ 298 "run ubiload nfsargs addip addargs ; " \ 299 "bootm ${kernel_addr_r}\0" \ 300 "net_mmc=" \ 301 "run netload mmcargs addargs ; " \ 302 "bootm ${kernel_addr_r}\0" \ 303 "net_ubi=" \ 304 "run netload ubiargs addargs ; " \ 305 "bootm ${kernel_addr_r}\0" \ 306 "net_nfs=" \ 307 "run netload nfsargs addip addargs ; " \ 308 "bootm ${kernel_addr_r}\0" \ 309 "try_bootscript=" \ 310 "mmc rescan;" \ 311 "if test -e mmc 0:1 ${bootscript} ; then " \ 312 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \ 313 "then ; " \ 314 "echo Running bootscript... ; " \ 315 "source ${kernel_addr_r} ; " \ 316 "fi ; " \ 317 "fi\0" 318 319 #endif /* __M53EVK_CONFIG_H__ */ 320