1 /* 2 * DENX M53 configuration 3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __M53EVK_CONFIG_H__ 9 #define __M53EVK_CONFIG_H__ 10 11 #define CONFIG_MX53 12 #define CONFIG_SYS_GENERIC_BOARD 13 #define CONFIG_MXC_GPIO 14 15 #include <asm/arch/imx-regs.h> 16 17 #define CONFIG_DISPLAY_CPUINFO 18 #define CONFIG_BOARD_EARLY_INIT_F 19 #define CONFIG_REVISION_TAG 20 #define CONFIG_SYS_NO_FLASH 21 22 /* 23 * U-Boot Commands 24 */ 25 #include <config_cmd_default.h> 26 #define CONFIG_DISPLAY_BOARDINFO 27 #define CONFIG_DOS_PARTITION 28 29 #define CONFIG_CMD_DATE 30 #define CONFIG_CMD_DHCP 31 #define CONFIG_CMD_EXT2 32 #define CONFIG_CMD_FAT 33 #define CONFIG_CMD_I2C 34 #define CONFIG_CMD_MII 35 #define CONFIG_CMD_MMC 36 #define CONFIG_CMD_NAND 37 #define CONFIG_CMD_NET 38 #define CONFIG_CMD_PING 39 #define CONFIG_CMD_SATA 40 #define CONFIG_CMD_USB 41 #define CONFIG_VIDEO 42 43 #define CONFIG_REGEX /* Enable regular expression support */ 44 45 /* 46 * Memory configurations 47 */ 48 #define CONFIG_NR_DRAM_BANKS 2 49 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 50 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 51 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 52 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 53 #define PHYS_SDRAM_SIZE (gd->ram_size) 54 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 55 #define CONFIG_SYS_MEMTEST_START 0x70000000 56 #define CONFIG_SYS_MEMTEST_END 0x8ff00000 57 58 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 59 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 60 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 61 62 #define CONFIG_SYS_INIT_SP_OFFSET \ 63 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 64 #define CONFIG_SYS_INIT_SP_ADDR \ 65 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 66 67 #define CONFIG_SYS_TEXT_BASE 0x71000000 68 69 /* 70 * U-Boot general configurations 71 */ 72 #define CONFIG_SYS_LONGHELP 73 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 74 #define CONFIG_SYS_PBSIZE \ 75 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 76 /* Print buffer size */ 77 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 78 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 79 /* Boot argument buffer size */ 80 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */ 81 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 82 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 83 #define CONFIG_SYS_HUSH_PARSER 84 85 /* 86 * Serial Driver 87 */ 88 #define CONFIG_MXC_UART 89 #define CONFIG_MXC_UART_BASE UART2_BASE 90 #define CONFIG_CONS_INDEX 1 91 #define CONFIG_BAUDRATE 115200 92 93 /* 94 * MMC Driver 95 */ 96 #ifdef CONFIG_CMD_MMC 97 #define CONFIG_MMC 98 #define CONFIG_GENERIC_MMC 99 #define CONFIG_FSL_ESDHC 100 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 101 #define CONFIG_SYS_FSL_ESDHC_NUM 1 102 #endif 103 104 /* 105 * NAND 106 */ 107 #define CONFIG_ENV_SIZE (16 * 1024) 108 #ifdef CONFIG_CMD_NAND 109 #define CONFIG_SYS_MAX_NAND_DEVICE 1 110 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI 111 #define CONFIG_NAND_MXC 112 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI 113 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR 114 #define CONFIG_SYS_NAND_LARGEPAGE 115 #define CONFIG_MXC_NAND_HWECC 116 #define CONFIG_SYS_NAND_USE_FLASH_BBT 117 118 /* Environment is in NAND */ 119 #define CONFIG_ENV_IS_IN_NAND 120 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 121 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 122 #define CONFIG_ENV_RANGE (512 * 1024) 123 #define CONFIG_ENV_OFFSET 0x100000 124 #define CONFIG_ENV_OFFSET_REDUND \ 125 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) 126 127 #define CONFIG_CMD_UBI 128 #define CONFIG_CMD_UBIFS 129 #define CONFIG_CMD_MTDPARTS 130 #define CONFIG_RBTREE 131 #define CONFIG_LZO 132 #define CONFIG_MTD_DEVICE 133 #define CONFIG_MTD_PARTITIONS 134 #define MTDIDS_DEFAULT "nand0=mxc_nand" 135 #define MTDPARTS_DEFAULT \ 136 "mtdparts=mxc_nand:" \ 137 "1m(bootloader)ro," \ 138 "512k(environment)," \ 139 "512k(redundant-environment)," \ 140 "4m(kernel)," \ 141 "128k(fdt)," \ 142 "8m(ramdisk)," \ 143 "-(filesystem)" 144 #else 145 #define CONFIG_ENV_IS_NOWHERE 146 #endif 147 148 /* 149 * Ethernet on SOC (FEC) 150 */ 151 #ifdef CONFIG_CMD_NET 152 #define CONFIG_FEC_MXC 153 #define IMX_FEC_BASE FEC_BASE_ADDR 154 #define CONFIG_FEC_MXC_PHYADDR 0x0 155 #define CONFIG_MII 156 #define CONFIG_DISCOVER_PHY 157 #define CONFIG_FEC_XCV_TYPE RMII 158 #define CONFIG_PHYLIB 159 #define CONFIG_PHY_MICREL 160 #endif 161 162 /* 163 * I2C 164 */ 165 #ifdef CONFIG_CMD_I2C 166 #define CONFIG_SYS_I2C 167 #define CONFIG_SYS_I2C_MXC 168 #define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */ 169 #endif 170 171 /* 172 * RTC 173 */ 174 #ifdef CONFIG_CMD_DATE 175 #define CONFIG_RTC_M41T62 176 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 177 #define CONFIG_SYS_M41T11_BASE_YEAR 2000 178 #endif 179 180 /* 181 * USB 182 */ 183 #ifdef CONFIG_CMD_USB 184 #define CONFIG_USB_EHCI 185 #define CONFIG_USB_EHCI_MX5 186 #define CONFIG_USB_STORAGE 187 #define CONFIG_USB_HOST_ETHER 188 #define CONFIG_USB_ETHER_ASIX 189 #define CONFIG_USB_ETHER_MCS7830 190 #define CONFIG_USB_ETHER_SMSC95XX 191 #define CONFIG_MXC_USB_PORT 1 192 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 193 #define CONFIG_MXC_USB_FLAGS 0 194 #endif 195 196 /* 197 * SATA 198 */ 199 #ifdef CONFIG_CMD_SATA 200 #define CONFIG_DWC_AHSATA 201 #define CONFIG_SYS_SATA_MAX_DEVICE 1 202 #define CONFIG_DWC_AHSATA_PORT_ID 0 203 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR 204 #define CONFIG_LBA48 205 #define CONFIG_LIBATA 206 #endif 207 208 /* 209 * LCD 210 */ 211 #ifdef CONFIG_VIDEO 212 #define CONFIG_VIDEO_IPUV3 213 #define CONFIG_CFB_CONSOLE 214 #define CONFIG_VGA_AS_SINGLE_DEVICE 215 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 216 #define CONFIG_VIDEO_BMP_RLE8 217 #define CONFIG_SPLASH_SCREEN 218 #define CONFIG_BMP_16BPP 219 #define CONFIG_VIDEO_LOGO 220 #define CONFIG_IPUV3_CLK 200000000 221 #endif 222 223 /* 224 * Boot Linux 225 */ 226 #define CONFIG_CMDLINE_TAG 227 #define CONFIG_INITRD_TAG 228 #define CONFIG_REVISION_TAG 229 #define CONFIG_SETUP_MEMORY_TAGS 230 #define CONFIG_BOOTDELAY 3 231 #define CONFIG_BOOTFILE "m53evk/uImage" 232 #define CONFIG_BOOTARGS "console=ttymxc1,115200" 233 #define CONFIG_LOADADDR 0x70800000 234 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 235 #define CONFIG_OF_LIBFDT 236 237 /* 238 * NAND SPL 239 */ 240 #define CONFIG_SPL 241 #define CONFIG_SPL_FRAMEWORK 242 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" 243 #define CONFIG_SPL_BOARD_INIT 244 #define CONFIG_SPL_TEXT_BASE 0x70008000 245 #define CONFIG_SPL_PAD_TO 0x8000 246 #define CONFIG_SPL_STACK 0x70004000 247 #define CONFIG_SPL_GPIO_SUPPORT 248 #define CONFIG_SPL_LIBCOMMON_SUPPORT 249 #define CONFIG_SPL_LIBGENERIC_SUPPORT 250 #define CONFIG_SPL_NAND_SUPPORT 251 #define CONFIG_SPL_SERIAL_SUPPORT 252 253 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO 254 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 255 #define CONFIG_SYS_NAND_OOBSIZE 64 256 #define CONFIG_SYS_NAND_PAGE_COUNT 64 257 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 258 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 259 260 #endif /* __M53EVK_CONFIG_H__ */ 261