1 /* 2 * DENX M53 configuration 3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __M53EVK_CONFIG_H__ 9 #define __M53EVK_CONFIG_H__ 10 11 #define CONFIG_MX53 12 #define CONFIG_MXC_GPIO 13 14 #include <asm/arch/imx-regs.h> 15 16 #define CONFIG_BOARD_EARLY_INIT_F 17 #define CONFIG_REVISION_TAG 18 #define CONFIG_SYS_NO_FLASH 19 #define CONFIG_SYS_FSL_CLK 20 21 #define CONFIG_TIMESTAMP /* Print image info with timestamp */ 22 23 /* 24 * U-Boot Commands 25 */ 26 #define CONFIG_DOS_PARTITION 27 #define CONFIG_FAT_WRITE 28 29 #define CONFIG_CMD_BMP 30 #define CONFIG_CMD_DATE 31 #define CONFIG_CMD_NAND 32 #define CONFIG_CMD_NAND_TRIMFFS 33 #define CONFIG_CMD_SATA 34 35 /* 36 * Memory configurations 37 */ 38 #define CONFIG_NR_DRAM_BANKS 2 39 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 40 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 41 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 42 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 43 #define PHYS_SDRAM_SIZE (gd->ram_size) 44 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 45 #define CONFIG_SYS_MEMTEST_START 0x70000000 46 #define CONFIG_SYS_MEMTEST_END 0x8ff00000 47 48 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 49 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 50 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 51 52 #define CONFIG_SYS_INIT_SP_OFFSET \ 53 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 54 #define CONFIG_SYS_INIT_SP_ADDR \ 55 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 56 57 #define CONFIG_SYS_TEXT_BASE 0x71000000 58 59 /* 60 * U-Boot general configurations 61 */ 62 #define CONFIG_SYS_LONGHELP 63 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 64 #define CONFIG_SYS_PBSIZE \ 65 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 66 /* Print buffer size */ 67 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 68 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 69 /* Boot argument buffer size */ 70 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 71 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 72 73 /* 74 * Serial Driver 75 */ 76 #define CONFIG_MXC_UART 77 #define CONFIG_MXC_UART_BASE UART2_BASE 78 #define CONFIG_CONS_INDEX 1 79 #define CONFIG_BAUDRATE 115200 80 81 /* 82 * MMC Driver 83 */ 84 #ifdef CONFIG_CMD_MMC 85 #define CONFIG_GENERIC_MMC 86 #define CONFIG_FSL_ESDHC 87 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 88 #define CONFIG_SYS_FSL_ESDHC_NUM 1 89 #endif 90 91 /* 92 * NAND 93 */ 94 #define CONFIG_ENV_SIZE (16 * 1024) 95 #ifdef CONFIG_CMD_NAND 96 #define CONFIG_SYS_MAX_NAND_DEVICE 1 97 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI 98 #define CONFIG_NAND_MXC 99 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI 100 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR 101 #define CONFIG_SYS_NAND_LARGEPAGE 102 #define CONFIG_MXC_NAND_HWECC 103 #define CONFIG_SYS_NAND_USE_FLASH_BBT 104 105 /* Environment is in NAND */ 106 #define CONFIG_ENV_IS_IN_NAND 107 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 108 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 109 #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE) 110 #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */ 111 #define CONFIG_ENV_OFFSET_REDUND \ 112 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) 113 114 #define CONFIG_CMD_UBIFS 115 #define CONFIG_CMD_MTDPARTS 116 #define CONFIG_RBTREE 117 #define CONFIG_LZO 118 #define CONFIG_MTD_DEVICE 119 #define CONFIG_MTD_PARTITIONS 120 #define MTDIDS_DEFAULT "nand0=mxc_nand" 121 #define MTDPARTS_DEFAULT \ 122 "mtdparts=mxc_nand:" \ 123 "1024k(u-boot)," \ 124 "512k(env1)," \ 125 "512k(env2)," \ 126 "14m(boot)," \ 127 "240m(data)," \ 128 "-@2048k(UBI)" 129 #else 130 #define CONFIG_ENV_IS_NOWHERE 131 #endif 132 133 /* 134 * Ethernet on SOC (FEC) 135 */ 136 #ifdef CONFIG_CMD_NET 137 #define CONFIG_FEC_MXC 138 #define IMX_FEC_BASE FEC_BASE_ADDR 139 #define CONFIG_FEC_MXC_PHYADDR 0x0 140 #define CONFIG_MII 141 #define CONFIG_DISCOVER_PHY 142 #define CONFIG_FEC_XCV_TYPE RMII 143 #define CONFIG_PHYLIB 144 #define CONFIG_PHY_MICREL 145 #define CONFIG_ETHPRIME "FEC0" 146 #endif 147 148 /* 149 * I2C 150 */ 151 #ifdef CONFIG_CMD_I2C 152 #define CONFIG_SYS_I2C 153 #define CONFIG_SYS_I2C_MXC 154 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 155 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 156 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 157 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */ 158 #endif 159 160 /* 161 * RTC 162 */ 163 #ifdef CONFIG_CMD_DATE 164 #define CONFIG_RTC_M41T62 165 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 166 #define CONFIG_SYS_M41T11_BASE_YEAR 2000 167 #endif 168 169 /* 170 * USB 171 */ 172 #ifdef CONFIG_CMD_USB 173 #define CONFIG_USB_EHCI 174 #define CONFIG_USB_EHCI_MX5 175 #define CONFIG_USB_HOST_ETHER 176 #define CONFIG_USB_ETHER_ASIX 177 #define CONFIG_USB_ETHER_MCS7830 178 #define CONFIG_USB_ETHER_SMSC95XX 179 #define CONFIG_MXC_USB_PORT 1 180 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 181 #define CONFIG_MXC_USB_FLAGS 0 182 #endif 183 184 /* 185 * SATA 186 */ 187 #ifdef CONFIG_CMD_SATA 188 #define CONFIG_DWC_AHSATA 189 #define CONFIG_SYS_SATA_MAX_DEVICE 1 190 #define CONFIG_DWC_AHSATA_PORT_ID 0 191 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR 192 #define CONFIG_LBA48 193 #define CONFIG_LIBATA 194 #endif 195 196 /* 197 * LCD 198 */ 199 #ifdef CONFIG_VIDEO 200 #define CONFIG_VIDEO_IPUV3 201 #define CONFIG_VIDEO_BMP_RLE8 202 #define CONFIG_VIDEO_BMP_GZIP 203 #define CONFIG_SPLASH_SCREEN 204 #define CONFIG_SPLASHIMAGE_GUARD 205 #define CONFIG_SPLASH_SCREEN_ALIGN 206 #define CONFIG_BMP_16BPP 207 #define CONFIG_VIDEO_LOGO 208 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) 209 #define CONFIG_IPUV3_CLK 200000000 210 #endif 211 212 /* 213 * Boot Linux 214 */ 215 #define CONFIG_CMDLINE_TAG 216 #define CONFIG_INITRD_TAG 217 #define CONFIG_REVISION_TAG 218 #define CONFIG_SETUP_MEMORY_TAGS 219 #define CONFIG_BOOTFILE "fitImage" 220 #define CONFIG_BOOTARGS "console=ttymxc1,115200" 221 #define CONFIG_LOADADDR 0x70800000 222 #define CONFIG_BOOTCOMMAND "run mmc_mmc" 223 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 224 225 /* 226 * NAND SPL 227 */ 228 #define CONFIG_SPL_FRAMEWORK 229 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" 230 #define CONFIG_SPL_BOARD_INIT 231 #define CONFIG_SPL_TEXT_BASE 0x70008000 232 #define CONFIG_SPL_PAD_TO 0x8000 233 #define CONFIG_SPL_STACK 0x70004000 234 235 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO 236 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 237 #define CONFIG_SYS_NAND_OOBSIZE 64 238 #define CONFIG_SYS_NAND_PAGE_COUNT 64 239 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 240 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 241 242 /* 243 * Extra Environments 244 */ 245 #define CONFIG_PREBOOT "run try_bootscript" 246 #define CONFIG_HOSTNAME m53evk 247 248 #define CONFIG_EXTRA_ENV_SETTINGS \ 249 "consdev=ttymxc1\0" \ 250 "baudrate=115200\0" \ 251 "bootscript=boot.scr\0" \ 252 "bootdev=/dev/mmcblk0p1\0" \ 253 "rootdev=/dev/mmcblk0p2\0" \ 254 "netdev=eth0\0" \ 255 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \ 256 "kernel_addr_r=0x72000000\0" \ 257 "addcons=" \ 258 "setenv bootargs ${bootargs} " \ 259 "console=${consdev},${baudrate}\0" \ 260 "addip=" \ 261 "setenv bootargs ${bootargs} " \ 262 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 263 "${netmask}:${hostname}:${netdev}:off\0" \ 264 "addmisc=" \ 265 "setenv bootargs ${bootargs} ${miscargs}\0" \ 266 "adddfltmtd=" \ 267 "if test \"x${mtdparts}\" == \"x\" ; then " \ 268 "mtdparts default ; " \ 269 "fi\0" \ 270 "addmtd=" \ 271 "run adddfltmtd ; " \ 272 "setenv bootargs ${bootargs} ${mtdparts}\0" \ 273 "addargs=run addcons addmtd addmisc\0" \ 274 "mmcload=" \ 275 "mmc rescan ; " \ 276 "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \ 277 "ubiload=" \ 278 "ubi part UBI ; ubifsmount ubi0:rootfs ; " \ 279 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \ 280 "netload=" \ 281 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \ 282 "miscargs=nohlt panic=1\0" \ 283 "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \ 284 "ubiargs=" \ 285 "setenv bootargs ubi.mtd=5 " \ 286 "root=ubi0:rootfs rootfstype=ubifs\0" \ 287 "nfsargs=" \ 288 "setenv bootargs root=/dev/nfs rw " \ 289 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \ 290 "mmc_mmc=" \ 291 "run mmcload mmcargs addargs ; " \ 292 "bootm ${kernel_addr_r}\0" \ 293 "mmc_ubi=" \ 294 "run mmcload ubiargs addargs ; " \ 295 "bootm ${kernel_addr_r}\0" \ 296 "mmc_nfs=" \ 297 "run mmcload nfsargs addip addargs ; " \ 298 "bootm ${kernel_addr_r}\0" \ 299 "ubi_mmc=" \ 300 "run ubiload mmcargs addargs ; " \ 301 "bootm ${kernel_addr_r}\0" \ 302 "ubi_ubi=" \ 303 "run ubiload ubiargs addargs ; " \ 304 "bootm ${kernel_addr_r}\0" \ 305 "ubi_nfs=" \ 306 "run ubiload nfsargs addip addargs ; " \ 307 "bootm ${kernel_addr_r}\0" \ 308 "net_mmc=" \ 309 "run netload mmcargs addargs ; " \ 310 "bootm ${kernel_addr_r}\0" \ 311 "net_ubi=" \ 312 "run netload ubiargs addargs ; " \ 313 "bootm ${kernel_addr_r}\0" \ 314 "net_nfs=" \ 315 "run netload nfsargs addip addargs ; " \ 316 "bootm ${kernel_addr_r}\0" \ 317 "try_bootscript=" \ 318 "mmc rescan;" \ 319 "if test -e mmc 0:1 ${bootscript} ; then " \ 320 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \ 321 "then ; " \ 322 "echo Running bootscript... ; " \ 323 "source ${kernel_addr_r} ; " \ 324 "fi ; " \ 325 "fi\0" 326 327 #endif /* __M53EVK_CONFIG_H__ */ 328