1 /* 2 * Aries M53 configuration 3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __M53EVK_CONFIG_H__ 9 #define __M53EVK_CONFIG_H__ 10 11 #define CONFIG_MXC_GPIO 12 13 #include <asm/arch/imx-regs.h> 14 15 #define CONFIG_REVISION_TAG 16 #define CONFIG_SYS_FSL_CLK 17 18 #define CONFIG_TIMESTAMP /* Print image info with timestamp */ 19 20 /* 21 * U-Boot Commands 22 */ 23 #define CONFIG_CMD_NAND 24 #define CONFIG_CMD_NAND_TRIMFFS 25 #define CONFIG_CMD_SATA 26 27 /* 28 * Memory configurations 29 */ 30 #define CONFIG_NR_DRAM_BANKS 2 31 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 32 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 33 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 34 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 35 #define PHYS_SDRAM_SIZE (gd->ram_size) 36 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 37 #define CONFIG_SYS_MEMTEST_START 0x70000000 38 #define CONFIG_SYS_MEMTEST_END 0x8ff00000 39 40 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 41 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 42 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 43 44 #define CONFIG_SYS_INIT_SP_OFFSET \ 45 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 46 #define CONFIG_SYS_INIT_SP_ADDR \ 47 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 48 49 #define CONFIG_SYS_TEXT_BASE 0x71000000 50 51 /* 52 * U-Boot general configurations 53 */ 54 #define CONFIG_SYS_LONGHELP 55 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 56 #define CONFIG_SYS_PBSIZE \ 57 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 58 /* Print buffer size */ 59 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 60 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 61 /* Boot argument buffer size */ 62 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 63 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 64 65 /* 66 * Serial Driver 67 */ 68 #define CONFIG_MXC_UART 69 #define CONFIG_MXC_UART_BASE UART2_BASE 70 #define CONFIG_CONS_INDEX 1 71 72 /* 73 * MMC Driver 74 */ 75 #ifdef CONFIG_CMD_MMC 76 #define CONFIG_FSL_ESDHC 77 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 78 #define CONFIG_SYS_FSL_ESDHC_NUM 1 79 #endif 80 81 /* 82 * NAND 83 */ 84 #define CONFIG_ENV_SIZE (16 * 1024) 85 #ifdef CONFIG_CMD_NAND 86 #define CONFIG_SYS_MAX_NAND_DEVICE 1 87 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI 88 #define CONFIG_NAND_MXC 89 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI 90 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR 91 #define CONFIG_SYS_NAND_LARGEPAGE 92 #define CONFIG_MXC_NAND_HWECC 93 #define CONFIG_SYS_NAND_USE_FLASH_BBT 94 95 /* Environment is in NAND */ 96 #define CONFIG_ENV_IS_IN_NAND 97 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 98 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 99 #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE) 100 #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */ 101 #define CONFIG_ENV_OFFSET_REDUND \ 102 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) 103 104 #define CONFIG_CMD_UBIFS 105 #define CONFIG_CMD_MTDPARTS 106 #define CONFIG_RBTREE 107 #define CONFIG_LZO 108 #define CONFIG_MTD_DEVICE 109 #define CONFIG_MTD_PARTITIONS 110 #define MTDIDS_DEFAULT "nand0=mxc_nand" 111 #define MTDPARTS_DEFAULT \ 112 "mtdparts=mxc_nand:" \ 113 "1024k(u-boot)," \ 114 "512k(env1)," \ 115 "512k(env2)," \ 116 "14m(boot)," \ 117 "240m(data)," \ 118 "-@2048k(UBI)" 119 #else 120 #define CONFIG_ENV_IS_NOWHERE 121 #endif 122 123 /* 124 * Ethernet on SOC (FEC) 125 */ 126 #ifdef CONFIG_CMD_NET 127 #define CONFIG_FEC_MXC 128 #define IMX_FEC_BASE FEC_BASE_ADDR 129 #define CONFIG_FEC_MXC_PHYADDR 0x0 130 #define CONFIG_MII 131 #define CONFIG_DISCOVER_PHY 132 #define CONFIG_FEC_XCV_TYPE RMII 133 #define CONFIG_PHYLIB 134 #define CONFIG_PHY_MICREL 135 #define CONFIG_ETHPRIME "FEC0" 136 #endif 137 138 /* 139 * I2C 140 */ 141 #ifdef CONFIG_CMD_I2C 142 #define CONFIG_SYS_I2C 143 #define CONFIG_SYS_I2C_MXC 144 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 145 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 146 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 147 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */ 148 #endif 149 150 /* 151 * RTC 152 */ 153 #ifdef CONFIG_CMD_DATE 154 #define CONFIG_RTC_M41T62 155 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 156 #define CONFIG_SYS_M41T11_BASE_YEAR 2000 157 #endif 158 159 /* 160 * USB 161 */ 162 #ifdef CONFIG_CMD_USB 163 #define CONFIG_USB_EHCI_MX5 164 #define CONFIG_USB_HOST_ETHER 165 #define CONFIG_USB_ETHER_ASIX 166 #define CONFIG_USB_ETHER_MCS7830 167 #define CONFIG_USB_ETHER_SMSC95XX 168 #define CONFIG_MXC_USB_PORT 1 169 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 170 #define CONFIG_MXC_USB_FLAGS 0 171 #endif 172 173 /* 174 * SATA 175 */ 176 #ifdef CONFIG_CMD_SATA 177 #define CONFIG_DWC_AHSATA 178 #define CONFIG_SYS_SATA_MAX_DEVICE 1 179 #define CONFIG_DWC_AHSATA_PORT_ID 0 180 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR 181 #define CONFIG_LBA48 182 #define CONFIG_LIBATA 183 #endif 184 185 /* 186 * LCD 187 */ 188 #ifdef CONFIG_VIDEO 189 #define CONFIG_VIDEO_IPUV3 190 #define CONFIG_VIDEO_BMP_RLE8 191 #define CONFIG_VIDEO_BMP_GZIP 192 #define CONFIG_SPLASH_SCREEN 193 #define CONFIG_SPLASHIMAGE_GUARD 194 #define CONFIG_SPLASH_SCREEN_ALIGN 195 #define CONFIG_BMP_16BPP 196 #define CONFIG_VIDEO_LOGO 197 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) 198 #define CONFIG_IPUV3_CLK 200000000 199 #endif 200 201 /* 202 * Boot Linux 203 */ 204 #define CONFIG_CMDLINE_TAG 205 #define CONFIG_INITRD_TAG 206 #define CONFIG_REVISION_TAG 207 #define CONFIG_SETUP_MEMORY_TAGS 208 #define CONFIG_BOOTFILE "fitImage" 209 #define CONFIG_BOOTARGS "console=ttymxc1,115200" 210 #define CONFIG_LOADADDR 0x70800000 211 #define CONFIG_BOOTCOMMAND "run mmc_mmc" 212 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 213 214 /* 215 * NAND SPL 216 */ 217 #define CONFIG_SPL_FRAMEWORK 218 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" 219 #define CONFIG_SPL_TEXT_BASE 0x70008000 220 #define CONFIG_SPL_PAD_TO 0x8000 221 #define CONFIG_SPL_STACK 0x70004000 222 223 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO 224 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 225 #define CONFIG_SYS_NAND_OOBSIZE 64 226 #define CONFIG_SYS_NAND_PAGE_COUNT 64 227 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 228 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 229 230 /* 231 * Extra Environments 232 */ 233 #define CONFIG_PREBOOT "run try_bootscript" 234 #define CONFIG_HOSTNAME m53evk 235 236 #define CONFIG_EXTRA_ENV_SETTINGS \ 237 "consdev=ttymxc1\0" \ 238 "baudrate=115200\0" \ 239 "bootscript=boot.scr\0" \ 240 "bootdev=/dev/mmcblk0p1\0" \ 241 "rootdev=/dev/mmcblk0p2\0" \ 242 "netdev=eth0\0" \ 243 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \ 244 "kernel_addr_r=0x72000000\0" \ 245 "addcons=" \ 246 "setenv bootargs ${bootargs} " \ 247 "console=${consdev},${baudrate}\0" \ 248 "addip=" \ 249 "setenv bootargs ${bootargs} " \ 250 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 251 "${netmask}:${hostname}:${netdev}:off\0" \ 252 "addmisc=" \ 253 "setenv bootargs ${bootargs} ${miscargs}\0" \ 254 "adddfltmtd=" \ 255 "if test \"x${mtdparts}\" == \"x\" ; then " \ 256 "mtdparts default ; " \ 257 "fi\0" \ 258 "addmtd=" \ 259 "run adddfltmtd ; " \ 260 "setenv bootargs ${bootargs} ${mtdparts}\0" \ 261 "addargs=run addcons addmtd addmisc\0" \ 262 "mmcload=" \ 263 "mmc rescan ; " \ 264 "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \ 265 "ubiload=" \ 266 "ubi part UBI ; ubifsmount ubi0:rootfs ; " \ 267 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \ 268 "netload=" \ 269 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \ 270 "miscargs=nohlt panic=1\0" \ 271 "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \ 272 "ubiargs=" \ 273 "setenv bootargs ubi.mtd=5 " \ 274 "root=ubi0:rootfs rootfstype=ubifs\0" \ 275 "nfsargs=" \ 276 "setenv bootargs root=/dev/nfs rw " \ 277 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \ 278 "mmc_mmc=" \ 279 "run mmcload mmcargs addargs ; " \ 280 "bootm ${kernel_addr_r}\0" \ 281 "mmc_ubi=" \ 282 "run mmcload ubiargs addargs ; " \ 283 "bootm ${kernel_addr_r}\0" \ 284 "mmc_nfs=" \ 285 "run mmcload nfsargs addip addargs ; " \ 286 "bootm ${kernel_addr_r}\0" \ 287 "ubi_mmc=" \ 288 "run ubiload mmcargs addargs ; " \ 289 "bootm ${kernel_addr_r}\0" \ 290 "ubi_ubi=" \ 291 "run ubiload ubiargs addargs ; " \ 292 "bootm ${kernel_addr_r}\0" \ 293 "ubi_nfs=" \ 294 "run ubiload nfsargs addip addargs ; " \ 295 "bootm ${kernel_addr_r}\0" \ 296 "net_mmc=" \ 297 "run netload mmcargs addargs ; " \ 298 "bootm ${kernel_addr_r}\0" \ 299 "net_ubi=" \ 300 "run netload ubiargs addargs ; " \ 301 "bootm ${kernel_addr_r}\0" \ 302 "net_nfs=" \ 303 "run netload nfsargs addip addargs ; " \ 304 "bootm ${kernel_addr_r}\0" \ 305 "try_bootscript=" \ 306 "mmc rescan;" \ 307 "if test -e mmc 0:1 ${bootscript} ; then " \ 308 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \ 309 "then ; " \ 310 "echo Running bootscript... ; " \ 311 "source ${kernel_addr_r} ; " \ 312 "fi ; " \ 313 "fi\0" 314 315 #endif /* __M53EVK_CONFIG_H__ */ 316