1 /* 2 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> 3 * on behalf of DENX Software Engineering GmbH 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License as 7 * published by the Free Software Foundation; either version 2 of 8 * the License, or (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 18 * MA 02111-1307 USA 19 */ 20 #ifndef __M28_H__ 21 #define __M28_H__ 22 23 #include <asm/arch/regs-base.h> 24 25 /* 26 * SoC configurations 27 */ 28 #define CONFIG_MX28 /* i.MX28 SoC */ 29 #define CONFIG_MXS_GPIO /* GPIO control */ 30 #define CONFIG_SYS_HZ 1000 /* Ticks per second */ 31 32 /* 33 * Define M28EVK machine type by hand until it lands in mach-types 34 */ 35 #define MACH_TYPE_M28EVK 3613 36 37 #define CONFIG_MACH_TYPE MACH_TYPE_M28EVK 38 39 #define CONFIG_SYS_NO_FLASH 40 #define CONFIG_SYS_ICACHE_OFF 41 #define CONFIG_SYS_DCACHE_OFF 42 #define CONFIG_BOARD_EARLY_INIT_F 43 #define CONFIG_ARCH_CPU_INIT 44 #define CONFIG_ARCH_MISC_INIT 45 46 /* 47 * SPL 48 */ 49 #define CONFIG_SPL 50 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE 51 #define CONFIG_SPL_START_S_PATH "board/denx/m28evk" 52 #define CONFIG_SPL_LDSCRIPT "board/denx/m28evk/u-boot-spl.lds" 53 54 /* 55 * U-Boot Commands 56 */ 57 #include <config_cmd_default.h> 58 #define CONFIG_DISPLAY_CPUINFO 59 #define CONFIG_DOS_PARTITION 60 61 #define CONFIG_CMD_CACHE 62 #define CONFIG_CMD_DATE 63 #define CONFIG_CMD_DHCP 64 #define CONFIG_CMD_EEPROM 65 #define CONFIG_CMD_EXT2 66 #define CONFIG_CMD_FAT 67 #define CONFIG_CMD_GPIO 68 #define CONFIG_CMD_I2C 69 #define CONFIG_CMD_MII 70 #define CONFIG_CMD_MMC 71 #define CONFIG_CMD_NAND 72 #define CONFIG_CMD_NET 73 #define CONFIG_CMD_NFS 74 #define CONFIG_CMD_PING 75 #define CONFIG_CMD_SETEXPR 76 #define CONFIG_CMD_SF 77 #define CONFIG_CMD_SPI 78 #define CONFIG_CMD_USB 79 80 /* 81 * Memory configurations 82 */ 83 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ 84 #define PHYS_SDRAM_1 0x40000000 /* Base address */ 85 #define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ 86 #define CONFIG_STACKSIZE 0x00010000 /* 128 KB stack */ 87 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ 88 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */ 89 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ 90 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ 91 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 92 /* Point initial SP in SRAM so SPL can use it too. */ 93 #define CONFIG_SYS_INIT_SP_ADDR 0x00002000 94 /* 95 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some 96 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot 97 * binary. In case there was more of this mess, 0x100 bytes are skipped. 98 */ 99 #define CONFIG_SYS_TEXT_BASE 0x40000100 100 101 /* 102 * U-Boot general configurations 103 */ 104 #define CONFIG_SYS_LONGHELP 105 #define CONFIG_SYS_PROMPT "=> " 106 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 107 #define CONFIG_SYS_PBSIZE \ 108 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 109 /* Print buffer size */ 110 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 111 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 112 /* Boot argument buffer size */ 113 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */ 114 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 115 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 116 #define CONFIG_SYS_HUSH_PARSER 117 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 118 119 /* 120 * Serial Driver 121 */ 122 #define CONFIG_PL011_SERIAL 123 #define CONFIG_PL011_CLOCK 24000000 124 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } 125 #define CONFIG_CONS_INDEX 0 126 #define CONFIG_BAUDRATE 115200 /* Default baud rate */ 127 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 128 129 /* 130 * MMC Driver 131 */ 132 #ifdef CONFIG_CMD_MMC 133 #define CONFIG_MMC 134 #define CONFIG_GENERIC_MMC 135 #define CONFIG_MXS_MMC 136 #endif 137 138 /* 139 * NAND 140 */ 141 #ifdef CONFIG_CMD_NAND 142 #define CONFIG_NAND_MXS 143 #define CONFIG_APBH_DMA 144 #define CONFIG_SYS_MAX_NAND_DEVICE 1 145 #define CONFIG_SYS_NAND_BASE 0x60000000 146 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 147 #define NAND_MAX_CHIPS 8 148 149 /* Environment is in NAND */ 150 #define CONFIG_ENV_IS_IN_NAND 151 #define CONFIG_ENV_SIZE (16 * 1024) 152 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 153 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 154 #define CONFIG_ENV_RANGE (512 * 1024) 155 #define CONFIG_ENV_OFFSET 0x300000 156 #define CONFIG_ENV_OFFSET_REDUND \ 157 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) 158 159 #define CONFIG_CMD_UBI 160 #define CONFIG_CMD_UBIFS 161 #define CONFIG_CMD_MTDPARTS 162 #define CONFIG_RBTREE 163 #define CONFIG_LZO 164 #define CONFIG_MTD_DEVICE 165 #define CONFIG_MTD_PARTITIONS 166 #define MTDIDS_DEFAULT "nand0=gpmi-nand.0" 167 #define MTDPARTS_DEFAULT \ 168 "mtdparts=gpmi-nand.0:" \ 169 "3m(bootloader)ro," \ 170 "512k(environment)," \ 171 "512k(redundant-environment)," \ 172 "4m(kernel)," \ 173 "-(filesystem)" 174 #endif 175 176 /* 177 * Ethernet on SOC (FEC) 178 */ 179 #ifdef CONFIG_CMD_NET 180 #define CONFIG_NET_MULTI 181 #define CONFIG_ETHPRIME "FEC0" 182 #define CONFIG_FEC_MXC 183 #define CONFIG_FEC_MXC_MULTI 184 #define CONFIG_MII 185 #define CONFIG_DISCOVER_PHY 186 #define CONFIG_FEC_XCV_TYPE RMII 187 #endif 188 189 /* 190 * I2C 191 */ 192 #ifdef CONFIG_CMD_I2C 193 #define CONFIG_I2C_MXS 194 #define CONFIG_HARD_I2C 195 #define CONFIG_SYS_I2C_SPEED 400000 196 #endif 197 198 /* 199 * EEPROM 200 */ 201 #ifdef CONFIG_CMD_EEPROM 202 #define CONFIG_SYS_I2C_MULTI_EEPROMS 203 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 204 #endif 205 206 /* 207 * RTC 208 */ 209 #ifdef CONFIG_CMD_DATE 210 /* Use the internal RTC in the MXS chip */ 211 #define CONFIG_RTC_INTERNAL 212 #ifdef CONFIG_RTC_INTERNAL 213 #define CONFIG_RTC_MXS 214 #else 215 #define CONFIG_RTC_M41T62 216 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 217 #define CONFIG_SYS_M41T11_BASE_YEAR 2000 218 #endif 219 #endif 220 221 /* 222 * USB 223 */ 224 #ifdef CONFIG_CMD_USB 225 #define CONFIG_USB_EHCI 226 #define CONFIG_USB_EHCI_MXS 227 #define CONFIG_EHCI_MXS_PORT 1 228 #define CONFIG_EHCI_IS_TDI 229 #define CONFIG_USB_STORAGE 230 #endif 231 232 /* 233 * SPI 234 */ 235 #ifdef CONFIG_CMD_SPI 236 #define CONFIG_HARD_SPI 237 #define CONFIG_MXS_SPI 238 #define CONFIG_SPI_HALF_DUPLEX 239 #define CONFIG_DEFAULT_SPI_BUS 2 240 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 241 242 /* SPI FLASH */ 243 #ifdef CONFIG_CMD_SF 244 #define CONFIG_SPI_FLASH 245 #define CONFIG_SPI_FLASH_STMICRO 246 #define CONFIG_SPI_FLASH_CS 2 247 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 248 #define CONFIG_SF_DEFAULT_SPEED 24000000 249 250 #define CONFIG_ENV_SPI_CS 0 251 #define CONFIG_ENV_SPI_BUS 2 252 #define CONFIG_ENV_SPI_MAX_HZ 24000000 253 #define CONFIG_ENV_SPI_MODE SPI_MODE_0 254 #endif 255 #endif 256 257 /* 258 * Boot Linux 259 */ 260 #define CONFIG_CMDLINE_TAG 261 #define CONFIG_SETUP_MEMORY_TAGS 262 #define CONFIG_BOOTDELAY 3 263 #define CONFIG_BOOTFILE "uImage" 264 #define CONFIG_BOOTARGS "console=ttyAM0,115200n8 " 265 #define CONFIG_BOOTCOMMAND "run bootcmd_net" 266 #define CONFIG_LOADADDR 0x42000000 267 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 268 269 /* 270 * Extra Environments 271 */ 272 #define CONFIG_EXTRA_ENV_SETTINGS \ 273 "update_nand_full_filename=u-boot.nand\0" \ 274 "update_nand_firmware_filename=u-boot.sb\0" \ 275 "update_nand_firmware_maxsz=0x100000\0" \ 276 "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \ 277 "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \ 278 "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \ 279 "nand device 0 ; " \ 280 "nand info ; " \ 281 "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \ 282 "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \ 283 "update_nand_full=" /* Update FCB, DBBT and FW */ \ 284 "if tftp ${update_nand_full_filename} ; then " \ 285 "run update_nand_get_fcb_size ; " \ 286 "nand scrub -y 0x0 ${filesize} ; " \ 287 "nand write.raw ${loadaddr} 0x0 ${update_nand_fcb} ; " \ 288 "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \ 289 "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \ 290 "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \ 291 "fi\0" \ 292 "update_nand_firmware=" /* Update only firmware */ \ 293 "if tftp ${update_nand_firmware_filename} ; then " \ 294 "run update_nand_get_fcb_size ; " \ 295 "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \ 296 "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \ 297 "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \ 298 "nand erase ${fcb_sz} ${fw_sz} ; " \ 299 "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \ 300 "nand write ${loadaddr} ${fw_off} ${filesize} ; " \ 301 "fi\0" 302 303 #endif /* __M28_H__ */ 304