xref: /rk3399_rockchip-uboot/include/configs/m28evk.h (revision e034ea3b77baf90ab8dde2c1beeb22704b01fb2d)
1 /*
2  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
3  * on behalf of DENX Software Engineering GmbH
4  *
5  * This program is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU General Public License as
7  * published by the Free Software Foundation; either version 2 of
8  * the License, or (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18  * MA 02111-1307 USA
19  */
20 #ifndef __M28_H__
21 #define __M28_H__
22 
23 #include <asm/arch/regs-base.h>
24 
25 /*
26  * SoC configurations
27  */
28 #define	CONFIG_MX28				/* i.MX28 SoC */
29 #define	CONFIG_MXS_GPIO				/* GPIO control */
30 #define	CONFIG_SYS_HZ		1000		/* Ticks per second */
31 
32 /*
33  * Define M28EVK machine type by hand until it lands in mach-types
34  */
35 #define	MACH_TYPE_M28EVK	3613
36 
37 #define	CONFIG_MACH_TYPE	MACH_TYPE_M28EVK
38 
39 #define	CONFIG_SYS_NO_FLASH
40 #define	CONFIG_SYS_ICACHE_OFF
41 #define	CONFIG_SYS_DCACHE_OFF
42 #define	CONFIG_BOARD_EARLY_INIT_F
43 #define	CONFIG_ARCH_CPU_INIT
44 #define	CONFIG_ARCH_MISC_INIT
45 
46 #define CONFIG_OF_LIBFDT
47 
48 /*
49  * SPL
50  */
51 #define	CONFIG_SPL
52 #define	CONFIG_SPL_NO_CPU_SUPPORT_CODE
53 #define	CONFIG_SPL_START_S_PATH		"arch/arm/cpu/arm926ejs/mx28"
54 #define	CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds"
55 #define	CONFIG_SPL_LIBCOMMON_SUPPORT
56 #define	CONFIG_SPL_LIBGENERIC_SUPPORT
57 #define	CONFIG_SPL_GPIO_SUPPORT
58 
59 /*
60  * U-Boot Commands
61  */
62 #include <config_cmd_default.h>
63 #define	CONFIG_DISPLAY_CPUINFO
64 #define	CONFIG_DOS_PARTITION
65 
66 #define	CONFIG_CMD_CACHE
67 #define	CONFIG_CMD_DATE
68 #define	CONFIG_CMD_DHCP
69 #define	CONFIG_CMD_EEPROM
70 #define	CONFIG_CMD_EXT2
71 #define	CONFIG_CMD_FAT
72 #define	CONFIG_CMD_GPIO
73 #define	CONFIG_CMD_I2C
74 #define	CONFIG_CMD_MII
75 #define	CONFIG_CMD_MMC
76 #define	CONFIG_CMD_NAND
77 #define	CONFIG_CMD_NET
78 #define	CONFIG_CMD_NFS
79 #define	CONFIG_CMD_PING
80 #define	CONFIG_CMD_SETEXPR
81 #define	CONFIG_CMD_SF
82 #define	CONFIG_CMD_SPI
83 #define	CONFIG_CMD_USB
84 
85 /*
86  * Memory configurations
87  */
88 #define	CONFIG_NR_DRAM_BANKS		1		/* 1 bank of DRAM */
89 #define	PHYS_SDRAM_1			0x40000000	/* Base address */
90 #define	PHYS_SDRAM_1_SIZE		0x20000000	/* Max 512 MB RAM */
91 #define	CONFIG_STACKSIZE		0x00010000	/* 128 KB stack */
92 #define	CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
93 #define	CONFIG_SYS_GBL_DATA_SIZE	128		/* Initial data */
94 #define	CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
95 #define	CONFIG_SYS_MEMTEST_END		0x40400000	/* 4 MB RAM test */
96 #define	CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
97 /* Point initial SP in SRAM so SPL can use it too. */
98 
99 #define CONFIG_SYS_INIT_RAM_ADDR	0x00000000
100 #define CONFIG_SYS_INIT_RAM_SIZE	(128 * 1024)
101 
102 #define CONFIG_SYS_INIT_SP_OFFSET \
103 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
104 #define CONFIG_SYS_INIT_SP_ADDR \
105 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
106 /*
107  * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
108  * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
109  * binary. In case there was more of this mess, 0x100 bytes are skipped.
110  */
111 #define	CONFIG_SYS_TEXT_BASE		0x40000100
112 
113 /*
114  * U-Boot general configurations
115  */
116 #define	CONFIG_SYS_LONGHELP
117 #define	CONFIG_SYS_PROMPT	"=> "
118 #define	CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
119 #define	CONFIG_SYS_PBSIZE	\
120 	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
121 						/* Print buffer size */
122 #define	CONFIG_SYS_MAXARGS	32		/* Max number of command args */
123 #define	CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
124 						/* Boot argument buffer size */
125 #define	CONFIG_VERSION_VARIABLE			/* U-BOOT version */
126 #define	CONFIG_AUTO_COMPLETE			/* Command auto complete */
127 #define	CONFIG_CMDLINE_EDITING			/* Command history etc */
128 #define	CONFIG_SYS_HUSH_PARSER
129 #define	CONFIG_SYS_PROMPT_HUSH_PS2	"> "
130 
131 /*
132  * Serial Driver
133  */
134 #define	CONFIG_PL011_SERIAL
135 #define	CONFIG_PL011_CLOCK		24000000
136 #define	CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
137 #define	CONFIG_CONS_INDEX		0
138 #define	CONFIG_BAUDRATE			115200	/* Default baud rate */
139 #define	CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
140 
141 /*
142  * MMC Driver
143  */
144 #ifdef	CONFIG_CMD_MMC
145 #define	CONFIG_MMC
146 #define	CONFIG_MMC_BOUNCE_BUFFER
147 #define	CONFIG_GENERIC_MMC
148 #define	CONFIG_MXS_MMC
149 #endif
150 
151 /*
152  * APBH DMA
153  */
154 #define CONFIG_APBH_DMA
155 
156 /*
157  * NAND
158  */
159 #define	CONFIG_ENV_SIZE			(16 * 1024)
160 #ifdef	CONFIG_CMD_NAND
161 #define	CONFIG_NAND_MXS
162 #define	CONFIG_SYS_MAX_NAND_DEVICE	1
163 #define	CONFIG_SYS_NAND_BASE		0x60000000
164 #define	CONFIG_SYS_NAND_5_ADDR_CYCLE
165 
166 /* Environment is in NAND */
167 #define	CONFIG_ENV_IS_IN_NAND
168 #define	CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
169 #define	CONFIG_ENV_SECT_SIZE		(128 * 1024)
170 #define	CONFIG_ENV_RANGE		(512 * 1024)
171 #define	CONFIG_ENV_OFFSET		0x300000
172 #define	CONFIG_ENV_OFFSET_REDUND	\
173 		(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
174 
175 #define	CONFIG_CMD_UBI
176 #define	CONFIG_CMD_UBIFS
177 #define	CONFIG_CMD_MTDPARTS
178 #define	CONFIG_RBTREE
179 #define	CONFIG_LZO
180 #define	CONFIG_MTD_DEVICE
181 #define	CONFIG_MTD_PARTITIONS
182 #define	MTDIDS_DEFAULT			"nand0=gpmi-nand.0"
183 #define	MTDPARTS_DEFAULT			\
184 	"mtdparts=gpmi-nand.0:"			\
185 		"3m(bootloader)ro,"		\
186 		"512k(environment),"		\
187 		"512k(redundant-environment),"	\
188 		"4m(kernel),"			\
189 		"-(filesystem)"
190 #else
191 #define	CONFIG_ENV_IS_NOWHERE
192 #endif
193 
194 /*
195  * Ethernet on SOC (FEC)
196  */
197 #ifdef	CONFIG_CMD_NET
198 #define	CONFIG_ETHPRIME			"FEC0"
199 #define	CONFIG_FEC_MXC
200 #define	CONFIG_FEC_MXC_MULTI
201 #define	CONFIG_MII
202 #define	CONFIG_DISCOVER_PHY
203 #define	CONFIG_FEC_XCV_TYPE		RMII
204 #endif
205 
206 /*
207  * I2C
208  */
209 #ifdef	CONFIG_CMD_I2C
210 #define	CONFIG_I2C_MXS
211 #define	CONFIG_HARD_I2C
212 #define	CONFIG_SYS_I2C_SPEED		400000
213 #endif
214 
215 /*
216  * EEPROM
217  */
218 #ifdef	CONFIG_CMD_EEPROM
219 #define	CONFIG_SYS_I2C_MULTI_EEPROMS
220 #define	CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
221 #endif
222 
223 /*
224  * RTC
225  */
226 #ifdef	CONFIG_CMD_DATE
227 /* Use the internal RTC in the MXS chip */
228 #define	CONFIG_RTC_INTERNAL
229 #ifdef	CONFIG_RTC_INTERNAL
230 #define	CONFIG_RTC_MXS
231 #else
232 #define	CONFIG_RTC_M41T62
233 #define	CONFIG_SYS_I2C_RTC_ADDR		0x68
234 #define	CONFIG_SYS_M41T11_BASE_YEAR	2000
235 #endif
236 #endif
237 
238 /*
239  * USB
240  */
241 #ifdef	CONFIG_CMD_USB
242 #define	CONFIG_USB_EHCI
243 #define	CONFIG_USB_EHCI_MXS
244 #define	CONFIG_EHCI_MXS_PORT		1
245 #define	CONFIG_EHCI_IS_TDI
246 #define	CONFIG_USB_STORAGE
247 #endif
248 
249 /*
250  * SPI
251  */
252 #ifdef	CONFIG_CMD_SPI
253 #define	CONFIG_HARD_SPI
254 #define	CONFIG_MXS_SPI
255 #define	CONFIG_SPI_HALF_DUPLEX
256 #define	CONFIG_DEFAULT_SPI_BUS		2
257 #define	CONFIG_DEFAULT_SPI_MODE		SPI_MODE_0
258 
259 /* SPI FLASH */
260 #ifdef	CONFIG_CMD_SF
261 #define	CONFIG_SPI_FLASH
262 #define	CONFIG_SPI_FLASH_STMICRO
263 #define	CONFIG_SF_DEFAULT_CS		2
264 #define	CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
265 #define	CONFIG_SF_DEFAULT_SPEED		24000000
266 
267 #define	CONFIG_ENV_SPI_CS		0
268 #define	CONFIG_ENV_SPI_BUS		2
269 #define	CONFIG_ENV_SPI_MAX_HZ		24000000
270 #define	CONFIG_ENV_SPI_MODE		SPI_MODE_0
271 #endif
272 #endif
273 
274 /*
275  * Boot Linux
276  */
277 #define	CONFIG_CMDLINE_TAG
278 #define	CONFIG_SETUP_MEMORY_TAGS
279 #define	CONFIG_BOOTDELAY	3
280 #define	CONFIG_BOOTFILE		"uImage"
281 #define	CONFIG_BOOTARGS		"console=ttyAM0,115200n8 "
282 #define	CONFIG_BOOTCOMMAND	"run bootcmd_net"
283 #define	CONFIG_LOADADDR		0x42000000
284 #define	CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
285 #define	CONFIG_OF_LIBFDT
286 
287 /*
288  * Extra Environments
289  */
290 #define	CONFIG_EXTRA_ENV_SETTINGS					\
291 	"update_nand_full_filename=u-boot.nand\0"			\
292 	"update_nand_firmware_filename=u-boot.sb\0"			\
293 	"update_sd_firmware_filename=u-boot.sd\0"			\
294 	"update_nand_firmware_maxsz=0x100000\0"				\
295 	"update_nand_stride=0x40\0"	/* MX28 datasheet ch. 12.12 */	\
296 	"update_nand_count=0x4\0"	/* MX28 datasheet ch. 12.12 */	\
297 	"update_nand_get_fcb_size="	/* Get size of FCB blocks */	\
298 		"nand device 0 ; "					\
299 		"nand info ; "						\
300 		"setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \
301 		"setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \
302 	"update_nand_full="		/* Update FCB, DBBT and FW */	\
303 		"if tftp ${update_nand_full_filename} ; then "		\
304 		"run update_nand_get_fcb_size ; "			\
305 		"nand scrub -y 0x0 ${filesize} ; "			\
306 		"nand write.raw ${loadaddr} 0x0 ${update_nand_fcb} ; "	\
307 		"setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
308 		"setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
309 		"nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
310 		"fi\0"							\
311 	"update_nand_firmware="		/* Update only firmware */	\
312 		"if tftp ${update_nand_firmware_filename} ; then "	\
313 		"run update_nand_get_fcb_size ; "			\
314 		"setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
315 		"setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; "	\
316 		"setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
317 		"nand erase ${fcb_sz} ${fw_sz} ; "			\
318 		"nand write ${loadaddr} ${fcb_sz} ${filesize} ; "	\
319 		"nand write ${loadaddr} ${fw_off} ${filesize} ; "	\
320 		"fi\0"							\
321 	"update_sd_firmware="		/* Update the SD firmware partition */ \
322 		"if mmc rescan ; then "					\
323 		"if tftp ${update_sd_firmware_filename} ; then "	\
324 		"setexpr fw_sz ${filesize} / 0x200 ; "	/* SD block size */ \
325 		"setexpr fw_sz ${fw_sz} + 1 ; "				\
326 		"mmc write ${loadaddr} 0x800 ${fw_sz} ; "		\
327 		"fi ; "							\
328 		"fi\0"
329 
330 #endif /* __M28_H__ */
331