1 /* 2 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> 3 * on behalf of DENX Software Engineering GmbH 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License as 7 * published by the Free Software Foundation; either version 2 of 8 * the License, or (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 18 * MA 02111-1307 USA 19 */ 20 #ifndef __M28EVK_CONFIG_H__ 21 #define __M28EVK_CONFIG_H__ 22 23 /* 24 * SoC configurations 25 */ 26 #define CONFIG_MX28 /* i.MX28 SoC */ 27 #define CONFIG_MXS_GPIO /* GPIO control */ 28 #define CONFIG_SYS_HZ 1000 /* Ticks per second */ 29 30 /* 31 * Define M28EVK machine type by hand until it lands in mach-types 32 */ 33 #define MACH_TYPE_M28EVK 3613 34 35 #define CONFIG_MACH_TYPE MACH_TYPE_M28EVK 36 37 #include <asm/arch/regs-base.h> 38 39 #define CONFIG_SYS_NO_FLASH 40 #define CONFIG_BOARD_EARLY_INIT_F 41 #define CONFIG_ARCH_MISC_INIT 42 43 /* 44 * SPL 45 */ 46 #define CONFIG_SPL 47 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE 48 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" 49 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" 50 #define CONFIG_SPL_LIBCOMMON_SUPPORT 51 #define CONFIG_SPL_LIBGENERIC_SUPPORT 52 #define CONFIG_SPL_GPIO_SUPPORT 53 54 /* 55 * U-Boot Commands 56 */ 57 #include <config_cmd_default.h> 58 #define CONFIG_DISPLAY_CPUINFO 59 #define CONFIG_DOS_PARTITION 60 61 #define CONFIG_CMD_CACHE 62 #define CONFIG_CMD_DATE 63 #define CONFIG_CMD_DHCP 64 #define CONFIG_CMD_EEPROM 65 #define CONFIG_CMD_EXT2 66 #define CONFIG_CMD_FAT 67 #define CONFIG_CMD_GPIO 68 #define CONFIG_CMD_I2C 69 #define CONFIG_CMD_MII 70 #define CONFIG_CMD_MMC 71 #define CONFIG_CMD_NAND 72 #define CONFIG_CMD_NET 73 #define CONFIG_CMD_NFS 74 #define CONFIG_CMD_PING 75 #define CONFIG_CMD_SETEXPR 76 #define CONFIG_CMD_SF 77 #define CONFIG_CMD_SPI 78 #define CONFIG_CMD_USB 79 #define CONFIG_VIDEO 80 81 /* 82 * Memory configurations 83 */ 84 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ 85 #define PHYS_SDRAM_1 0x40000000 /* Base address */ 86 #define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ 87 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ 88 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */ 89 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ 90 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ 91 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 92 /* Point initial SP in SRAM so SPL can use it too. */ 93 94 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 95 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) 96 97 #define CONFIG_SYS_INIT_SP_OFFSET \ 98 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 99 #define CONFIG_SYS_INIT_SP_ADDR \ 100 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 101 /* 102 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some 103 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot 104 * binary. In case there was more of this mess, 0x100 bytes are skipped. 105 */ 106 #define CONFIG_SYS_TEXT_BASE 0x40000100 107 108 /* 109 * U-Boot general configurations 110 */ 111 #define CONFIG_SYS_LONGHELP 112 #define CONFIG_SYS_PROMPT "=> " 113 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 114 #define CONFIG_SYS_PBSIZE \ 115 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 116 /* Print buffer size */ 117 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 118 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 119 /* Boot argument buffer size */ 120 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */ 121 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 122 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 123 #define CONFIG_SYS_HUSH_PARSER 124 125 /* 126 * Serial Driver 127 */ 128 #define CONFIG_PL011_SERIAL 129 #define CONFIG_PL011_CLOCK 24000000 130 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } 131 #define CONFIG_CONS_INDEX 0 132 #define CONFIG_BAUDRATE 115200 /* Default baud rate */ 133 134 /* 135 * MMC Driver 136 */ 137 #ifdef CONFIG_CMD_MMC 138 #define CONFIG_MMC 139 #define CONFIG_BOUNCE_BUFFER 140 #define CONFIG_GENERIC_MMC 141 #define CONFIG_MXS_MMC 142 #endif 143 144 /* 145 * APBH DMA 146 */ 147 #define CONFIG_APBH_DMA 148 149 /* 150 * NAND 151 */ 152 #define CONFIG_ENV_SIZE (16 * 1024) 153 #ifdef CONFIG_CMD_NAND 154 #define CONFIG_NAND_MXS 155 #define CONFIG_SYS_MAX_NAND_DEVICE 1 156 #define CONFIG_SYS_NAND_BASE 0x60000000 157 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 158 159 /* Environment is in NAND */ 160 #define CONFIG_ENV_IS_IN_NAND 161 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 162 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 163 #define CONFIG_ENV_RANGE (512 * 1024) 164 #define CONFIG_ENV_OFFSET 0x300000 165 #define CONFIG_ENV_OFFSET_REDUND \ 166 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) 167 168 #define CONFIG_CMD_UBI 169 #define CONFIG_CMD_UBIFS 170 #define CONFIG_CMD_MTDPARTS 171 #define CONFIG_RBTREE 172 #define CONFIG_LZO 173 #define CONFIG_MTD_DEVICE 174 #define CONFIG_MTD_PARTITIONS 175 #define MTDIDS_DEFAULT "nand0=gpmi-nand" 176 #define MTDPARTS_DEFAULT \ 177 "mtdparts=gpmi-nand:" \ 178 "3m(bootloader)ro," \ 179 "512k(environment)," \ 180 "512k(redundant-environment)," \ 181 "4m(kernel)," \ 182 "128k(fdt)," \ 183 "8m(ramdisk)," \ 184 "-(filesystem)" 185 #else 186 #define CONFIG_ENV_IS_NOWHERE 187 #endif 188 189 /* 190 * Ethernet on SOC (FEC) 191 */ 192 #ifdef CONFIG_CMD_NET 193 #define CONFIG_ETHPRIME "FEC0" 194 #define CONFIG_FEC_MXC 195 #define CONFIG_MII 196 #define CONFIG_FEC_XCV_TYPE RMII 197 #endif 198 199 /* 200 * I2C 201 */ 202 #ifdef CONFIG_CMD_I2C 203 #define CONFIG_I2C_MXS 204 #define CONFIG_HARD_I2C 205 #define CONFIG_SYS_I2C_SPEED 400000 206 #endif 207 208 /* 209 * EEPROM 210 */ 211 #ifdef CONFIG_CMD_EEPROM 212 #define CONFIG_SYS_I2C_MULTI_EEPROMS 213 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 214 #endif 215 216 /* 217 * RTC 218 */ 219 #ifdef CONFIG_CMD_DATE 220 /* Use the internal RTC in the MXS chip */ 221 #define CONFIG_RTC_INTERNAL 222 #ifdef CONFIG_RTC_INTERNAL 223 #define CONFIG_RTC_MXS 224 #else 225 #define CONFIG_RTC_M41T62 226 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 227 #define CONFIG_SYS_M41T11_BASE_YEAR 2000 228 #endif 229 #endif 230 231 /* 232 * USB 233 */ 234 #ifdef CONFIG_CMD_USB 235 #define CONFIG_USB_EHCI 236 #define CONFIG_USB_EHCI_MXS 237 #define CONFIG_EHCI_MXS_PORT0 238 #define CONFIG_EHCI_MXS_PORT1 239 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 240 #define CONFIG_EHCI_IS_TDI 241 #define CONFIG_USB_STORAGE 242 #endif 243 244 /* 245 * SPI 246 */ 247 #ifdef CONFIG_CMD_SPI 248 #define CONFIG_HARD_SPI 249 #define CONFIG_MXS_SPI 250 #define CONFIG_SPI_HALF_DUPLEX 251 #define CONFIG_DEFAULT_SPI_BUS 2 252 #define CONFIG_DEFAULT_SPI_CS 0 253 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 254 255 /* SPI FLASH */ 256 #ifdef CONFIG_CMD_SF 257 #define CONFIG_SPI_FLASH 258 #define CONFIG_SPI_FLASH_STMICRO 259 #define CONFIG_SF_DEFAULT_BUS 2 260 #define CONFIG_SF_DEFAULT_CS 0 261 #define CONFIG_SF_DEFAULT_SPEED 40000000 262 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 263 264 #define CONFIG_ENV_SPI_BUS 2 265 #define CONFIG_ENV_SPI_CS 0 266 #define CONFIG_ENV_SPI_MAX_HZ 40000000 267 #define CONFIG_ENV_SPI_MODE SPI_MODE_0 268 #endif 269 #endif 270 271 /* 272 * LCD 273 */ 274 #ifdef CONFIG_VIDEO 275 #define CONFIG_CFB_CONSOLE 276 #define CONFIG_VIDEO_MXS 277 #define CONFIG_VIDEO_LOGO 278 #define CONFIG_VIDEO_SW_CURSOR 279 #define CONFIG_VGA_AS_SINGLE_DEVICE 280 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 281 #define CONFIG_SPLASH_SCREEN 282 #define CONFIG_CMD_BMP 283 #define CONFIG_BMP_16BPP 284 #define CONFIG_VIDEO_BMP_RLE8 285 #define CONFIG_VIDEO_BMP_GZIP 286 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10) 287 #endif 288 289 /* 290 * Boot Linux 291 */ 292 #define CONFIG_CMDLINE_TAG 293 #define CONFIG_SETUP_MEMORY_TAGS 294 #define CONFIG_BOOTDELAY 3 295 #define CONFIG_BOOTFILE "uImage" 296 #define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " 297 #define CONFIG_BOOTCOMMAND "run bootcmd_net" 298 #define CONFIG_LOADADDR 0x42000000 299 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 300 #define CONFIG_OF_LIBFDT 301 302 /* 303 * Extra Environments 304 */ 305 #define CONFIG_EXTRA_ENV_SETTINGS \ 306 "update_nand_full_filename=u-boot.nand\0" \ 307 "update_nand_firmware_filename=u-boot.sb\0" \ 308 "update_sd_firmware_filename=u-boot.sd\0" \ 309 "update_nand_firmware_maxsz=0x100000\0" \ 310 "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \ 311 "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \ 312 "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \ 313 "nand device 0 ; " \ 314 "nand info ; " \ 315 "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \ 316 "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \ 317 "update_nand_full=" /* Update FCB, DBBT and FW */ \ 318 "if tftp ${update_nand_full_filename} ; then " \ 319 "run update_nand_get_fcb_size ; " \ 320 "nand scrub -y 0x0 ${filesize} ; " \ 321 "nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \ 322 "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \ 323 "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \ 324 "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \ 325 "fi\0" \ 326 "update_nand_firmware=" /* Update only firmware */ \ 327 "if tftp ${update_nand_firmware_filename} ; then " \ 328 "run update_nand_get_fcb_size ; " \ 329 "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \ 330 "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \ 331 "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \ 332 "nand erase ${fcb_sz} ${fw_sz} ; " \ 333 "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \ 334 "nand write ${loadaddr} ${fw_off} ${filesize} ; " \ 335 "fi\0" \ 336 "update_sd_firmware=" /* Update the SD firmware partition */ \ 337 "if mmc rescan ; then " \ 338 "if tftp ${update_sd_firmware_filename} ; then " \ 339 "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \ 340 "setexpr fw_sz ${fw_sz} + 1 ; " \ 341 "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \ 342 "fi ; " \ 343 "fi\0" 344 345 #endif /* __M28EVK_CONFIG_H__ */ 346