1 /* 2 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> 3 * on behalf of DENX Software Engineering GmbH 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License as 7 * published by the Free Software Foundation; either version 2 of 8 * the License, or (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 18 * MA 02111-1307 USA 19 */ 20 #ifndef __M28_H__ 21 #define __M28_H__ 22 23 #include <asm/arch/regs-base.h> 24 25 /* 26 * SoC configurations 27 */ 28 #define CONFIG_MX28 /* i.MX28 SoC */ 29 #define CONFIG_MXS_GPIO /* GPIO control */ 30 #define CONFIG_SYS_HZ 1000 /* Ticks per second */ 31 32 /* 33 * Define M28EVK machine type by hand until it lands in mach-types 34 */ 35 #define MACH_TYPE_M28EVK 3613 36 37 #define CONFIG_MACH_TYPE MACH_TYPE_M28EVK 38 39 #define CONFIG_SYS_NO_FLASH 40 #define CONFIG_SYS_ICACHE_OFF 41 #define CONFIG_SYS_DCACHE_OFF 42 #define CONFIG_BOARD_EARLY_INIT_F 43 #define CONFIG_ARCH_CPU_INIT 44 #define CONFIG_ARCH_MISC_INIT 45 46 /* 47 * SPL 48 */ 49 #define CONFIG_SPL 50 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE 51 #define CONFIG_SPL_START_S_PATH "board/denx/m28evk" 52 #define CONFIG_SPL_LDSCRIPT "board/denx/m28evk/u-boot-spl.lds" 53 54 /* 55 * U-Boot Commands 56 */ 57 #include <config_cmd_default.h> 58 #define CONFIG_DISPLAY_CPUINFO 59 #define CONFIG_DOS_PARTITION 60 61 #define CONFIG_CMD_CACHE 62 #define CONFIG_CMD_DATE 63 #define CONFIG_CMD_DHCP 64 #define CONFIG_CMD_EEPROM 65 #define CONFIG_CMD_EXT2 66 #define CONFIG_CMD_FAT 67 #define CONFIG_CMD_GPIO 68 #define CONFIG_CMD_I2C 69 #define CONFIG_CMD_MII 70 #define CONFIG_CMD_MMC 71 #define CONFIG_CMD_NAND 72 #define CONFIG_CMD_NET 73 #define CONFIG_CMD_NFS 74 #define CONFIG_CMD_PING 75 #define CONFIG_CMD_SETEXPR 76 #define CONFIG_CMD_SF 77 #define CONFIG_CMD_SPI 78 79 /* 80 * Memory configurations 81 */ 82 #define CONFIG_NR_DRAM_BANKS 1 /* 2 banks of DRAM */ 83 #define PHYS_SDRAM_1 0x40000000 /* Base address */ 84 #define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ 85 #define CONFIG_STACKSIZE 0x00010000 /* 128 KB stack */ 86 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ 87 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */ 88 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ 89 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ 90 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 91 /* Point initial SP in SRAM so SPL can use it too. */ 92 #define CONFIG_SYS_INIT_SP_ADDR 0x00002000 93 /* 94 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some 95 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot 96 * binary. In case there was more of this mess, 0x100 bytes are skipped. 97 */ 98 #define CONFIG_SYS_TEXT_BASE 0x40000100 99 100 /* 101 * U-Boot general configurations 102 */ 103 #define CONFIG_SYS_LONGHELP 104 #define CONFIG_SYS_PROMPT "=> " 105 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 106 #define CONFIG_SYS_PBSIZE \ 107 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 108 /* Print buffer size */ 109 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 110 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 111 /* Boot argument buffer size */ 112 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */ 113 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 114 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 115 #define CONFIG_SYS_HUSH_PARSER 116 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 117 118 /* 119 * Serial Driver 120 */ 121 #define CONFIG_PL011_SERIAL 122 #define CONFIG_PL011_CLOCK 24000000 123 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } 124 #define CONFIG_CONS_INDEX 0 125 #define CONFIG_BAUDRATE 115200 /* Default baud rate */ 126 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 127 128 /* 129 * MMC Driver 130 */ 131 #ifdef CONFIG_CMD_MMC 132 #define CONFIG_MMC 133 #define CONFIG_GENERIC_MMC 134 #define CONFIG_MXS_MMC 135 #endif 136 137 /* 138 * NAND 139 */ 140 #ifdef CONFIG_CMD_NAND 141 #define CONFIG_NAND_MXS 142 #define CONFIG_APBH_DMA 143 #define CONFIG_SYS_MAX_NAND_DEVICE 1 144 #define CONFIG_SYS_NAND_BASE 0x60000000 145 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 146 #define NAND_MAX_CHIPS 8 147 148 /* Environment is in NAND */ 149 #define CONFIG_ENV_IS_IN_NAND 150 #define CONFIG_ENV_SIZE (16 * 1024) 151 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 152 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 153 #define CONFIG_ENV_RANGE (512 * 1024) 154 #define CONFIG_ENV_OFFSET 0x300000 155 #define CONFIG_ENV_OFFSET_REDUND \ 156 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) 157 158 #define CONFIG_CMD_UBI 159 #define CONFIG_CMD_UBIFS 160 #define CONFIG_CMD_MTDPARTS 161 #define CONFIG_RBTREE 162 #define CONFIG_LZO 163 #define CONFIG_MTD_DEVICE 164 #define CONFIG_MTD_PARTITIONS 165 #define MTDIDS_DEFAULT "nand0=gpmi-nand.0" 166 #define MTDPARTS_DEFAULT \ 167 "mtdparts=gpmi-nand.0:" \ 168 "3m(bootloader)ro," \ 169 "512k(environment)," \ 170 "512k(redundant-environment)," \ 171 "4m(kernel)," \ 172 "-(filesystem)" 173 #endif 174 175 /* 176 * Ethernet on SOC (FEC) 177 */ 178 #ifdef CONFIG_CMD_NET 179 #define CONFIG_NET_MULTI 180 #define CONFIG_ETHPRIME "FEC0" 181 #define CONFIG_FEC_MXC 182 #define CONFIG_FEC_MXC_MULTI 183 #define CONFIG_MII 184 #define CONFIG_DISCOVER_PHY 185 #define CONFIG_FEC_XCV_TYPE RMII 186 #endif 187 188 /* 189 * I2C 190 */ 191 #ifdef CONFIG_CMD_I2C 192 #define CONFIG_I2C_MXS 193 #define CONFIG_HARD_I2C 194 #define CONFIG_SYS_I2C_SPEED 400000 195 #endif 196 197 /* 198 * EEPROM 199 */ 200 #ifdef CONFIG_CMD_EEPROM 201 #define CONFIG_SYS_I2C_MULTI_EEPROMS 202 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 203 #endif 204 205 /* 206 * RTC 207 */ 208 #ifdef CONFIG_CMD_DATE 209 /* Use the internal RTC in the MXS chip */ 210 #define CONFIG_RTC_INTERNAL 211 #ifdef CONFIG_RTC_INTERNAL 212 #define CONFIG_RTC_MXS 213 #else 214 #define CONFIG_RTC_M41T62 215 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 216 #define CONFIG_SYS_M41T11_BASE_YEAR 2000 217 #endif 218 #endif 219 220 /* 221 * SPI 222 */ 223 #ifdef CONFIG_CMD_SPI 224 #define CONFIG_HARD_SPI 225 #define CONFIG_MXS_SPI 226 #define CONFIG_SPI_HALF_DUPLEX 227 #define CONFIG_DEFAULT_SPI_BUS 2 228 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 229 230 /* SPI FLASH */ 231 #ifdef CONFIG_CMD_SF 232 #define CONFIG_SPI_FLASH 233 #define CONFIG_SPI_FLASH_STMICRO 234 #define CONFIG_SPI_FLASH_CS 2 235 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 236 #define CONFIG_SF_DEFAULT_SPEED 24000000 237 238 #define CONFIG_ENV_SPI_CS 0 239 #define CONFIG_ENV_SPI_BUS 2 240 #define CONFIG_ENV_SPI_MAX_HZ 24000000 241 #define CONFIG_ENV_SPI_MODE SPI_MODE_0 242 #endif 243 #endif 244 245 /* 246 * Boot Linux 247 */ 248 #define CONFIG_CMDLINE_TAG 249 #define CONFIG_SETUP_MEMORY_TAGS 250 #define CONFIG_BOOTDELAY 3 251 #define CONFIG_BOOTFILE "uImage" 252 #define CONFIG_BOOTARGS "console=ttyAM0,115200n8 " 253 #define CONFIG_BOOTCOMMAND "run bootcmd_net" 254 #define CONFIG_LOADADDR 0x42000000 255 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 256 257 /* 258 * Extra Environments 259 */ 260 #define CONFIG_EXTRA_ENV_SETTINGS \ 261 "update_nand_full_filename=u-boot.nand\0" \ 262 "update_nand_firmware_filename=u-boot.sb\0" \ 263 "update_nand_firmware_maxsz=0x100000\0" \ 264 "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \ 265 "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \ 266 "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \ 267 "nand device 0 ; " \ 268 "nand info ; " \ 269 "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \ 270 "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \ 271 "update_nand_full=" /* Update FCB, DBBT and FW */ \ 272 "if tftp ${update_nand_full_filename} ; then " \ 273 "run update_nand_get_fcb_size ; " \ 274 "nand scrub -y 0x0 ${filesize} ; " \ 275 "nand write.raw ${loadaddr} 0x0 ${update_nand_fcb} ; " \ 276 "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \ 277 "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \ 278 "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \ 279 "fi\0" \ 280 "update_nand_firmware=" /* Update only firmware */ \ 281 "if tftp ${update_nand_firmware_filename} ; then " \ 282 "run update_nand_get_fcb_size ; " \ 283 "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \ 284 "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \ 285 "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \ 286 "nand erase ${fcb_sz} ${fw_sz} ; " \ 287 "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \ 288 "nand write ${loadaddr} ${fw_off} ${filesize} ; " \ 289 "fi\0" 290 291 #endif /* __M28_H__ */ 292