xref: /rk3399_rockchip-uboot/include/configs/m28evk.h (revision 7f0730a02e412015b0fc4e78dc41aef14e8a3d8c)
1 /*
2  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
3  * on behalf of DENX Software Engineering GmbH
4  *
5  * This program is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU General Public License as
7  * published by the Free Software Foundation; either version 2 of
8  * the License, or (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18  * MA 02111-1307 USA
19  */
20 #ifndef __M28EVK_CONFIG_H__
21 #define __M28EVK_CONFIG_H__
22 
23 #include <asm/arch/regs-base.h>
24 
25 /*
26  * SoC configurations
27  */
28 #define	CONFIG_MX28				/* i.MX28 SoC */
29 #define	CONFIG_MXS_GPIO				/* GPIO control */
30 #define	CONFIG_SYS_HZ		1000		/* Ticks per second */
31 
32 /*
33  * Define M28EVK machine type by hand until it lands in mach-types
34  */
35 #define	MACH_TYPE_M28EVK	3613
36 
37 #define	CONFIG_MACH_TYPE	MACH_TYPE_M28EVK
38 
39 #define	CONFIG_SYS_NO_FLASH
40 #define	CONFIG_SYS_ICACHE_OFF
41 #define	CONFIG_SYS_DCACHE_OFF
42 #define	CONFIG_BOARD_EARLY_INIT_F
43 #define	CONFIG_ARCH_CPU_INIT
44 #define	CONFIG_ARCH_MISC_INIT
45 
46 /*
47  * SPL
48  */
49 #define	CONFIG_SPL
50 #define	CONFIG_SPL_NO_CPU_SUPPORT_CODE
51 #define	CONFIG_SPL_START_S_PATH		"arch/arm/cpu/arm926ejs/mx28"
52 #define	CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds"
53 #define	CONFIG_SPL_LIBCOMMON_SUPPORT
54 #define	CONFIG_SPL_LIBGENERIC_SUPPORT
55 #define	CONFIG_SPL_GPIO_SUPPORT
56 
57 /*
58  * U-Boot Commands
59  */
60 #include <config_cmd_default.h>
61 #define	CONFIG_DISPLAY_CPUINFO
62 #define	CONFIG_DOS_PARTITION
63 
64 #define	CONFIG_CMD_CACHE
65 #define	CONFIG_CMD_DATE
66 #define	CONFIG_CMD_DHCP
67 #define	CONFIG_CMD_EEPROM
68 #define	CONFIG_CMD_EXT2
69 #define	CONFIG_CMD_FAT
70 #define	CONFIG_CMD_GPIO
71 #define	CONFIG_CMD_I2C
72 #define	CONFIG_CMD_MII
73 #define	CONFIG_CMD_MMC
74 #define	CONFIG_CMD_NAND
75 #define	CONFIG_CMD_NET
76 #define	CONFIG_CMD_NFS
77 #define	CONFIG_CMD_PING
78 #define	CONFIG_CMD_SETEXPR
79 #define	CONFIG_CMD_SF
80 #define	CONFIG_CMD_SPI
81 #define	CONFIG_CMD_USB
82 
83 /*
84  * Memory configurations
85  */
86 #define	CONFIG_NR_DRAM_BANKS		1		/* 1 bank of DRAM */
87 #define	PHYS_SDRAM_1			0x40000000	/* Base address */
88 #define	PHYS_SDRAM_1_SIZE		0x20000000	/* Max 512 MB RAM */
89 #define	CONFIG_STACKSIZE		(128 * 1024)	/* 128 KB stack */
90 #define	CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
91 #define	CONFIG_SYS_GBL_DATA_SIZE	128		/* Initial data */
92 #define	CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
93 #define	CONFIG_SYS_MEMTEST_END		0x40400000	/* 4 MB RAM test */
94 #define	CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
95 /* Point initial SP in SRAM so SPL can use it too. */
96 
97 #define CONFIG_SYS_INIT_RAM_ADDR	0x00000000
98 #define CONFIG_SYS_INIT_RAM_SIZE	(128 * 1024)
99 
100 #define CONFIG_SYS_INIT_SP_OFFSET \
101 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
102 #define CONFIG_SYS_INIT_SP_ADDR \
103 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
104 /*
105  * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
106  * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
107  * binary. In case there was more of this mess, 0x100 bytes are skipped.
108  */
109 #define	CONFIG_SYS_TEXT_BASE		0x40000100
110 
111 /*
112  * U-Boot general configurations
113  */
114 #define	CONFIG_SYS_LONGHELP
115 #define	CONFIG_SYS_PROMPT	"=> "
116 #define	CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
117 #define	CONFIG_SYS_PBSIZE	\
118 	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
119 						/* Print buffer size */
120 #define	CONFIG_SYS_MAXARGS	32		/* Max number of command args */
121 #define	CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
122 						/* Boot argument buffer size */
123 #define	CONFIG_VERSION_VARIABLE			/* U-BOOT version */
124 #define	CONFIG_AUTO_COMPLETE			/* Command auto complete */
125 #define	CONFIG_CMDLINE_EDITING			/* Command history etc */
126 #define	CONFIG_SYS_HUSH_PARSER
127 
128 /*
129  * Serial Driver
130  */
131 #define	CONFIG_PL011_SERIAL
132 #define	CONFIG_PL011_CLOCK		24000000
133 #define	CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
134 #define	CONFIG_CONS_INDEX		0
135 #define	CONFIG_BAUDRATE			115200	/* Default baud rate */
136 
137 /*
138  * MMC Driver
139  */
140 #ifdef	CONFIG_CMD_MMC
141 #define	CONFIG_MMC
142 #define	CONFIG_MMC_BOUNCE_BUFFER
143 #define	CONFIG_GENERIC_MMC
144 #define	CONFIG_MXS_MMC
145 #endif
146 
147 /*
148  * APBH DMA
149  */
150 #define CONFIG_APBH_DMA
151 
152 /*
153  * NAND
154  */
155 #define	CONFIG_ENV_SIZE			(16 * 1024)
156 #ifdef	CONFIG_CMD_NAND
157 #define	CONFIG_NAND_MXS
158 #define	CONFIG_SYS_MAX_NAND_DEVICE	1
159 #define	CONFIG_SYS_NAND_BASE		0x60000000
160 #define	CONFIG_SYS_NAND_5_ADDR_CYCLE
161 
162 /* Environment is in NAND */
163 #define	CONFIG_ENV_IS_IN_NAND
164 #define	CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
165 #define	CONFIG_ENV_SECT_SIZE		(128 * 1024)
166 #define	CONFIG_ENV_RANGE		(512 * 1024)
167 #define	CONFIG_ENV_OFFSET		0x300000
168 #define	CONFIG_ENV_OFFSET_REDUND	\
169 		(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
170 
171 #define	CONFIG_CMD_UBI
172 #define	CONFIG_CMD_UBIFS
173 #define	CONFIG_CMD_MTDPARTS
174 #define	CONFIG_RBTREE
175 #define	CONFIG_LZO
176 #define	CONFIG_MTD_DEVICE
177 #define	CONFIG_MTD_PARTITIONS
178 #define	MTDIDS_DEFAULT			"nand0=gpmi-nand.0"
179 #define	MTDPARTS_DEFAULT			\
180 	"mtdparts=gpmi-nand.0:"			\
181 		"3m(bootloader)ro,"		\
182 		"512k(environment),"		\
183 		"512k(redundant-environment),"	\
184 		"4m(kernel),"			\
185 		"-(filesystem)"
186 #else
187 #define	CONFIG_ENV_IS_NOWHERE
188 #endif
189 
190 /*
191  * Ethernet on SOC (FEC)
192  */
193 #ifdef	CONFIG_CMD_NET
194 #define	CONFIG_ETHPRIME			"FEC0"
195 #define	CONFIG_FEC_MXC
196 #define	CONFIG_FEC_MXC_MULTI
197 #define	CONFIG_MII
198 #define	CONFIG_DISCOVER_PHY
199 #define	CONFIG_FEC_XCV_TYPE		RMII
200 #endif
201 
202 /*
203  * I2C
204  */
205 #ifdef	CONFIG_CMD_I2C
206 #define	CONFIG_I2C_MXS
207 #define	CONFIG_HARD_I2C
208 #define	CONFIG_SYS_I2C_SPEED		400000
209 #endif
210 
211 /*
212  * EEPROM
213  */
214 #ifdef	CONFIG_CMD_EEPROM
215 #define	CONFIG_SYS_I2C_MULTI_EEPROMS
216 #define	CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
217 #endif
218 
219 /*
220  * RTC
221  */
222 #ifdef	CONFIG_CMD_DATE
223 /* Use the internal RTC in the MXS chip */
224 #define	CONFIG_RTC_INTERNAL
225 #ifdef	CONFIG_RTC_INTERNAL
226 #define	CONFIG_RTC_MXS
227 #else
228 #define	CONFIG_RTC_M41T62
229 #define	CONFIG_SYS_I2C_RTC_ADDR		0x68
230 #define	CONFIG_SYS_M41T11_BASE_YEAR	2000
231 #endif
232 #endif
233 
234 /*
235  * USB
236  */
237 #ifdef	CONFIG_CMD_USB
238 #define	CONFIG_USB_EHCI
239 #define	CONFIG_USB_EHCI_MXS
240 #define	CONFIG_EHCI_MXS_PORT		1
241 #define	CONFIG_EHCI_IS_TDI
242 #define	CONFIG_USB_STORAGE
243 #endif
244 
245 /*
246  * SPI
247  */
248 #ifdef	CONFIG_CMD_SPI
249 #define	CONFIG_HARD_SPI
250 #define	CONFIG_MXS_SPI
251 #define	CONFIG_SPI_HALF_DUPLEX
252 #define	CONFIG_DEFAULT_SPI_BUS		2
253 #define	CONFIG_DEFAULT_SPI_MODE		SPI_MODE_0
254 
255 /* SPI FLASH */
256 #ifdef	CONFIG_CMD_SF
257 #define	CONFIG_SPI_FLASH
258 #define	CONFIG_SPI_FLASH_STMICRO
259 #define	CONFIG_SF_DEFAULT_CS		2
260 #define	CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
261 #define	CONFIG_SF_DEFAULT_SPEED		24000000
262 
263 #define	CONFIG_ENV_SPI_CS		0
264 #define	CONFIG_ENV_SPI_BUS		2
265 #define	CONFIG_ENV_SPI_MAX_HZ		24000000
266 #define	CONFIG_ENV_SPI_MODE		SPI_MODE_0
267 #endif
268 #endif
269 
270 /*
271  * Boot Linux
272  */
273 #define	CONFIG_CMDLINE_TAG
274 #define	CONFIG_SETUP_MEMORY_TAGS
275 #define	CONFIG_BOOTDELAY	3
276 #define	CONFIG_BOOTFILE		"uImage"
277 #define	CONFIG_BOOTARGS		"console=ttyAM0,115200n8 "
278 #define	CONFIG_BOOTCOMMAND	"run bootcmd_net"
279 #define	CONFIG_LOADADDR		0x42000000
280 #define	CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
281 #define	CONFIG_OF_LIBFDT
282 
283 /*
284  * Extra Environments
285  */
286 #define	CONFIG_EXTRA_ENV_SETTINGS					\
287 	"update_nand_full_filename=u-boot.nand\0"			\
288 	"update_nand_firmware_filename=u-boot.sb\0"			\
289 	"update_sd_firmware_filename=u-boot.sd\0"			\
290 	"update_nand_firmware_maxsz=0x100000\0"				\
291 	"update_nand_stride=0x40\0"	/* MX28 datasheet ch. 12.12 */	\
292 	"update_nand_count=0x4\0"	/* MX28 datasheet ch. 12.12 */	\
293 	"update_nand_get_fcb_size="	/* Get size of FCB blocks */	\
294 		"nand device 0 ; "					\
295 		"nand info ; "						\
296 		"setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \
297 		"setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \
298 	"update_nand_full="		/* Update FCB, DBBT and FW */	\
299 		"if tftp ${update_nand_full_filename} ; then "		\
300 		"run update_nand_get_fcb_size ; "			\
301 		"nand scrub -y 0x0 ${filesize} ; "			\
302 		"nand write.raw ${loadaddr} 0x0 ${update_nand_fcb} ; "	\
303 		"setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
304 		"setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
305 		"nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
306 		"fi\0"							\
307 	"update_nand_firmware="		/* Update only firmware */	\
308 		"if tftp ${update_nand_firmware_filename} ; then "	\
309 		"run update_nand_get_fcb_size ; "			\
310 		"setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
311 		"setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; "	\
312 		"setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
313 		"nand erase ${fcb_sz} ${fw_sz} ; "			\
314 		"nand write ${loadaddr} ${fcb_sz} ${filesize} ; "	\
315 		"nand write ${loadaddr} ${fw_off} ${filesize} ; "	\
316 		"fi\0"							\
317 	"update_sd_firmware="		/* Update the SD firmware partition */ \
318 		"if mmc rescan ; then "					\
319 		"if tftp ${update_sd_firmware_filename} ; then "	\
320 		"setexpr fw_sz ${filesize} / 0x200 ; "	/* SD block size */ \
321 		"setexpr fw_sz ${fw_sz} + 1 ; "				\
322 		"mmc write ${loadaddr} 0x800 ${fw_sz} ; "		\
323 		"fi ; "							\
324 		"fi\0"
325 
326 #endif /* __M28EVK_CONFIG_H__ */
327