1 /* 2 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> 3 * on behalf of DENX Software Engineering GmbH 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License as 7 * published by the Free Software Foundation; either version 2 of 8 * the License, or (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 18 * MA 02111-1307 USA 19 */ 20 #ifndef __M28EVK_CONFIG_H__ 21 #define __M28EVK_CONFIG_H__ 22 23 #include <asm/arch/regs-base.h> 24 25 /* 26 * SoC configurations 27 */ 28 #define CONFIG_MX28 /* i.MX28 SoC */ 29 #define CONFIG_MXS_GPIO /* GPIO control */ 30 #define CONFIG_SYS_HZ 1000 /* Ticks per second */ 31 32 /* 33 * Define M28EVK machine type by hand until it lands in mach-types 34 */ 35 #define MACH_TYPE_M28EVK 3613 36 37 #define CONFIG_MACH_TYPE MACH_TYPE_M28EVK 38 39 #define CONFIG_SYS_NO_FLASH 40 #define CONFIG_SYS_ICACHE_OFF 41 #define CONFIG_SYS_DCACHE_OFF 42 #define CONFIG_BOARD_EARLY_INIT_F 43 #define CONFIG_ARCH_MISC_INIT 44 45 /* 46 * SPL 47 */ 48 #define CONFIG_SPL 49 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE 50 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" 51 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" 52 #define CONFIG_SPL_LIBCOMMON_SUPPORT 53 #define CONFIG_SPL_LIBGENERIC_SUPPORT 54 #define CONFIG_SPL_GPIO_SUPPORT 55 56 /* 57 * U-Boot Commands 58 */ 59 #include <config_cmd_default.h> 60 #define CONFIG_DISPLAY_CPUINFO 61 #define CONFIG_DOS_PARTITION 62 63 #define CONFIG_CMD_CACHE 64 #define CONFIG_CMD_DATE 65 #define CONFIG_CMD_DHCP 66 #define CONFIG_CMD_EEPROM 67 #define CONFIG_CMD_EXT2 68 #define CONFIG_CMD_FAT 69 #define CONFIG_CMD_GPIO 70 #define CONFIG_CMD_I2C 71 #define CONFIG_CMD_MII 72 #define CONFIG_CMD_MMC 73 #define CONFIG_CMD_NAND 74 #define CONFIG_CMD_NET 75 #define CONFIG_CMD_NFS 76 #define CONFIG_CMD_PING 77 #define CONFIG_CMD_SETEXPR 78 #define CONFIG_CMD_SF 79 #define CONFIG_CMD_SPI 80 #define CONFIG_CMD_USB 81 82 /* 83 * Memory configurations 84 */ 85 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ 86 #define PHYS_SDRAM_1 0x40000000 /* Base address */ 87 #define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ 88 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ 89 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */ 90 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ 91 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ 92 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 93 /* Point initial SP in SRAM so SPL can use it too. */ 94 95 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 96 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) 97 98 #define CONFIG_SYS_INIT_SP_OFFSET \ 99 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 100 #define CONFIG_SYS_INIT_SP_ADDR \ 101 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 102 /* 103 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some 104 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot 105 * binary. In case there was more of this mess, 0x100 bytes are skipped. 106 */ 107 #define CONFIG_SYS_TEXT_BASE 0x40000100 108 109 /* 110 * U-Boot general configurations 111 */ 112 #define CONFIG_SYS_LONGHELP 113 #define CONFIG_SYS_PROMPT "=> " 114 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 115 #define CONFIG_SYS_PBSIZE \ 116 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 117 /* Print buffer size */ 118 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 119 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 120 /* Boot argument buffer size */ 121 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */ 122 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 123 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 124 #define CONFIG_SYS_HUSH_PARSER 125 126 /* 127 * Serial Driver 128 */ 129 #define CONFIG_PL011_SERIAL 130 #define CONFIG_PL011_CLOCK 24000000 131 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } 132 #define CONFIG_CONS_INDEX 0 133 #define CONFIG_BAUDRATE 115200 /* Default baud rate */ 134 135 /* 136 * MMC Driver 137 */ 138 #ifdef CONFIG_CMD_MMC 139 #define CONFIG_MMC 140 #define CONFIG_MMC_BOUNCE_BUFFER 141 #define CONFIG_GENERIC_MMC 142 #define CONFIG_MXS_MMC 143 #endif 144 145 /* 146 * APBH DMA 147 */ 148 #define CONFIG_APBH_DMA 149 150 /* 151 * NAND 152 */ 153 #define CONFIG_ENV_SIZE (16 * 1024) 154 #ifdef CONFIG_CMD_NAND 155 #define CONFIG_NAND_MXS 156 #define CONFIG_SYS_MAX_NAND_DEVICE 1 157 #define CONFIG_SYS_NAND_BASE 0x60000000 158 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 159 160 /* Environment is in NAND */ 161 #define CONFIG_ENV_IS_IN_NAND 162 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 163 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 164 #define CONFIG_ENV_RANGE (512 * 1024) 165 #define CONFIG_ENV_OFFSET 0x300000 166 #define CONFIG_ENV_OFFSET_REDUND \ 167 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) 168 169 #define CONFIG_CMD_UBI 170 #define CONFIG_CMD_UBIFS 171 #define CONFIG_CMD_MTDPARTS 172 #define CONFIG_RBTREE 173 #define CONFIG_LZO 174 #define CONFIG_MTD_DEVICE 175 #define CONFIG_MTD_PARTITIONS 176 #define MTDIDS_DEFAULT "nand0=gpmi-nand.0" 177 #define MTDPARTS_DEFAULT \ 178 "mtdparts=gpmi-nand.0:" \ 179 "3m(bootloader)ro," \ 180 "512k(environment)," \ 181 "512k(redundant-environment)," \ 182 "4m(kernel)," \ 183 "-(filesystem)" 184 #else 185 #define CONFIG_ENV_IS_NOWHERE 186 #endif 187 188 /* 189 * Ethernet on SOC (FEC) 190 */ 191 #ifdef CONFIG_CMD_NET 192 #define CONFIG_ETHPRIME "FEC0" 193 #define CONFIG_FEC_MXC 194 #define CONFIG_FEC_MXC_MULTI 195 #define CONFIG_MII 196 #define CONFIG_FEC_XCV_TYPE RMII 197 #endif 198 199 /* 200 * I2C 201 */ 202 #ifdef CONFIG_CMD_I2C 203 #define CONFIG_I2C_MXS 204 #define CONFIG_HARD_I2C 205 #define CONFIG_SYS_I2C_SPEED 400000 206 #endif 207 208 /* 209 * EEPROM 210 */ 211 #ifdef CONFIG_CMD_EEPROM 212 #define CONFIG_SYS_I2C_MULTI_EEPROMS 213 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 214 #endif 215 216 /* 217 * RTC 218 */ 219 #ifdef CONFIG_CMD_DATE 220 /* Use the internal RTC in the MXS chip */ 221 #define CONFIG_RTC_INTERNAL 222 #ifdef CONFIG_RTC_INTERNAL 223 #define CONFIG_RTC_MXS 224 #else 225 #define CONFIG_RTC_M41T62 226 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 227 #define CONFIG_SYS_M41T11_BASE_YEAR 2000 228 #endif 229 #endif 230 231 /* 232 * USB 233 */ 234 #ifdef CONFIG_CMD_USB 235 #define CONFIG_USB_EHCI 236 #define CONFIG_USB_EHCI_MXS 237 #define CONFIG_EHCI_MXS_PORT 1 238 #define CONFIG_EHCI_IS_TDI 239 #define CONFIG_USB_STORAGE 240 #endif 241 242 /* 243 * SPI 244 */ 245 #ifdef CONFIG_CMD_SPI 246 #define CONFIG_HARD_SPI 247 #define CONFIG_MXS_SPI 248 #define CONFIG_SPI_HALF_DUPLEX 249 #define CONFIG_DEFAULT_SPI_BUS 2 250 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 251 252 /* SPI FLASH */ 253 #ifdef CONFIG_CMD_SF 254 #define CONFIG_SPI_FLASH 255 #define CONFIG_SPI_FLASH_STMICRO 256 #define CONFIG_SF_DEFAULT_CS 2 257 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 258 #define CONFIG_SF_DEFAULT_SPEED 24000000 259 260 #define CONFIG_ENV_SPI_CS 0 261 #define CONFIG_ENV_SPI_BUS 2 262 #define CONFIG_ENV_SPI_MAX_HZ 24000000 263 #define CONFIG_ENV_SPI_MODE SPI_MODE_0 264 #endif 265 #endif 266 267 /* 268 * Boot Linux 269 */ 270 #define CONFIG_CMDLINE_TAG 271 #define CONFIG_SETUP_MEMORY_TAGS 272 #define CONFIG_BOOTDELAY 3 273 #define CONFIG_BOOTFILE "uImage" 274 #define CONFIG_BOOTARGS "console=ttyAM0,115200n8 " 275 #define CONFIG_BOOTCOMMAND "run bootcmd_net" 276 #define CONFIG_LOADADDR 0x42000000 277 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 278 #define CONFIG_OF_LIBFDT 279 280 /* 281 * Extra Environments 282 */ 283 #define CONFIG_EXTRA_ENV_SETTINGS \ 284 "update_nand_full_filename=u-boot.nand\0" \ 285 "update_nand_firmware_filename=u-boot.sb\0" \ 286 "update_sd_firmware_filename=u-boot.sd\0" \ 287 "update_nand_firmware_maxsz=0x100000\0" \ 288 "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \ 289 "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \ 290 "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \ 291 "nand device 0 ; " \ 292 "nand info ; " \ 293 "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \ 294 "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \ 295 "update_nand_full=" /* Update FCB, DBBT and FW */ \ 296 "if tftp ${update_nand_full_filename} ; then " \ 297 "run update_nand_get_fcb_size ; " \ 298 "nand scrub -y 0x0 ${filesize} ; " \ 299 "nand write.raw ${loadaddr} 0x0 ${update_nand_fcb} ; " \ 300 "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \ 301 "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \ 302 "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \ 303 "fi\0" \ 304 "update_nand_firmware=" /* Update only firmware */ \ 305 "if tftp ${update_nand_firmware_filename} ; then " \ 306 "run update_nand_get_fcb_size ; " \ 307 "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \ 308 "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \ 309 "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \ 310 "nand erase ${fcb_sz} ${fw_sz} ; " \ 311 "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \ 312 "nand write ${loadaddr} ${fw_off} ${filesize} ; " \ 313 "fi\0" \ 314 "update_sd_firmware=" /* Update the SD firmware partition */ \ 315 "if mmc rescan ; then " \ 316 "if tftp ${update_sd_firmware_filename} ; then " \ 317 "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \ 318 "setexpr fw_sz ${fw_sz} + 1 ; " \ 319 "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \ 320 "fi ; " \ 321 "fi\0" 322 323 #endif /* __M28EVK_CONFIG_H__ */ 324