1 /* 2 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> 3 * on behalf of DENX Software Engineering GmbH 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 #ifndef __M28EVK_CONFIG_H__ 8 #define __M28EVK_CONFIG_H__ 9 10 /* 11 * SoC configurations 12 */ 13 #define CONFIG_MX28 /* i.MX28 SoC */ 14 #define CONFIG_MXS_GPIO /* GPIO control */ 15 #define CONFIG_SYS_HZ 1000 /* Ticks per second */ 16 17 /* 18 * Define M28EVK machine type by hand until it lands in mach-types 19 */ 20 #define MACH_TYPE_M28EVK 3613 21 22 #define CONFIG_MACH_TYPE MACH_TYPE_M28EVK 23 24 #include <asm/arch/regs-base.h> 25 26 #define CONFIG_SYS_NO_FLASH 27 #define CONFIG_BOARD_EARLY_INIT_F 28 #define CONFIG_ARCH_MISC_INIT 29 30 /* 31 * SPL 32 */ 33 #define CONFIG_SPL 34 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE 35 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" 36 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" 37 #define CONFIG_SPL_LIBCOMMON_SUPPORT 38 #define CONFIG_SPL_LIBGENERIC_SUPPORT 39 #define CONFIG_SPL_GPIO_SUPPORT 40 41 /* 42 * U-Boot Commands 43 */ 44 #include <config_cmd_default.h> 45 #define CONFIG_DISPLAY_CPUINFO 46 #define CONFIG_DOS_PARTITION 47 48 #define CONFIG_CMD_CACHE 49 #define CONFIG_CMD_DATE 50 #define CONFIG_CMD_DHCP 51 #define CONFIG_CMD_EEPROM 52 #define CONFIG_CMD_EXT2 53 #define CONFIG_CMD_FAT 54 #define CONFIG_CMD_GPIO 55 #define CONFIG_CMD_GREPENV 56 #define CONFIG_CMD_I2C 57 #define CONFIG_CMD_MII 58 #define CONFIG_CMD_MMC 59 #define CONFIG_CMD_NAND 60 #define CONFIG_CMD_NAND_TRIMFFS 61 #define CONFIG_CMD_NET 62 #define CONFIG_CMD_NFS 63 #define CONFIG_CMD_PING 64 #define CONFIG_CMD_SETEXPR 65 #define CONFIG_CMD_SF 66 #define CONFIG_CMD_SPI 67 #define CONFIG_CMD_USB 68 #define CONFIG_VIDEO 69 70 #define CONFIG_REGEX /* Enable regular expression support */ 71 72 /* 73 * Memory configurations 74 */ 75 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ 76 #define PHYS_SDRAM_1 0x40000000 /* Base address */ 77 #define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ 78 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ 79 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */ 80 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ 81 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ 82 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 83 /* Point initial SP in SRAM so SPL can use it too. */ 84 85 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 86 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) 87 88 #define CONFIG_SYS_INIT_SP_OFFSET \ 89 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 90 #define CONFIG_SYS_INIT_SP_ADDR \ 91 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 92 /* 93 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some 94 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot 95 * binary. In case there was more of this mess, 0x100 bytes are skipped. 96 */ 97 #define CONFIG_SYS_TEXT_BASE 0x40000100 98 99 /* 100 * U-Boot general configurations 101 */ 102 #define CONFIG_SYS_LONGHELP 103 #define CONFIG_SYS_PROMPT "=> " 104 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 105 #define CONFIG_SYS_PBSIZE \ 106 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 107 /* Print buffer size */ 108 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 109 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 110 /* Boot argument buffer size */ 111 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */ 112 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 113 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 114 #define CONFIG_SYS_HUSH_PARSER 115 116 /* 117 * Serial Driver 118 */ 119 #define CONFIG_PL011_SERIAL 120 #define CONFIG_PL011_CLOCK 24000000 121 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } 122 #define CONFIG_CONS_INDEX 0 123 #define CONFIG_BAUDRATE 115200 /* Default baud rate */ 124 125 /* 126 * MMC Driver 127 */ 128 #ifdef CONFIG_CMD_MMC 129 #define CONFIG_MMC 130 #define CONFIG_BOUNCE_BUFFER 131 #define CONFIG_GENERIC_MMC 132 #define CONFIG_MXS_MMC 133 #endif 134 135 /* 136 * APBH DMA 137 */ 138 #define CONFIG_APBH_DMA 139 140 /* 141 * NAND 142 */ 143 #define CONFIG_ENV_SIZE (16 * 1024) 144 #ifdef CONFIG_CMD_NAND 145 #define CONFIG_NAND_MXS 146 #define CONFIG_SYS_MAX_NAND_DEVICE 1 147 #define CONFIG_SYS_NAND_BASE 0x60000000 148 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 149 150 /* Environment is in NAND */ 151 #define CONFIG_ENV_IS_IN_NAND 152 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 153 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 154 #define CONFIG_ENV_RANGE (512 * 1024) 155 #define CONFIG_ENV_OFFSET 0x300000 156 #define CONFIG_ENV_OFFSET_REDUND \ 157 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) 158 159 #define CONFIG_CMD_UBI 160 #define CONFIG_CMD_UBIFS 161 #define CONFIG_CMD_MTDPARTS 162 #define CONFIG_RBTREE 163 #define CONFIG_LZO 164 #define CONFIG_MTD_DEVICE 165 #define CONFIG_MTD_PARTITIONS 166 #define MTDIDS_DEFAULT "nand0=gpmi-nand" 167 #define MTDPARTS_DEFAULT \ 168 "mtdparts=gpmi-nand:" \ 169 "3m(bootloader)ro," \ 170 "512k(environment)," \ 171 "512k(redundant-environment)," \ 172 "4m(kernel)," \ 173 "128k(fdt)," \ 174 "8m(ramdisk)," \ 175 "-(filesystem)" 176 #else 177 #define CONFIG_ENV_IS_NOWHERE 178 #endif 179 180 /* 181 * Ethernet on SOC (FEC) 182 */ 183 #ifdef CONFIG_CMD_NET 184 #define CONFIG_ETHPRIME "FEC0" 185 #define CONFIG_FEC_MXC 186 #define CONFIG_MII 187 #define CONFIG_FEC_XCV_TYPE RMII 188 #endif 189 190 /* 191 * I2C 192 */ 193 #ifdef CONFIG_CMD_I2C 194 #define CONFIG_I2C_MXS 195 #define CONFIG_HARD_I2C 196 #define CONFIG_SYS_I2C_SPEED 400000 197 #endif 198 199 /* 200 * EEPROM 201 */ 202 #ifdef CONFIG_CMD_EEPROM 203 #define CONFIG_SYS_I2C_MULTI_EEPROMS 204 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 205 #endif 206 207 /* 208 * RTC 209 */ 210 #ifdef CONFIG_CMD_DATE 211 /* Use the internal RTC in the MXS chip */ 212 #define CONFIG_RTC_INTERNAL 213 #ifdef CONFIG_RTC_INTERNAL 214 #define CONFIG_RTC_MXS 215 #else 216 #define CONFIG_RTC_M41T62 217 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 218 #define CONFIG_SYS_M41T11_BASE_YEAR 2000 219 #endif 220 #endif 221 222 /* 223 * USB 224 */ 225 #ifdef CONFIG_CMD_USB 226 #define CONFIG_USB_EHCI 227 #define CONFIG_USB_EHCI_MXS 228 #define CONFIG_EHCI_MXS_PORT0 229 #define CONFIG_EHCI_MXS_PORT1 230 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 231 #define CONFIG_EHCI_IS_TDI 232 #define CONFIG_USB_STORAGE 233 #endif 234 235 /* 236 * SPI 237 */ 238 #ifdef CONFIG_CMD_SPI 239 #define CONFIG_HARD_SPI 240 #define CONFIG_MXS_SPI 241 #define CONFIG_SPI_HALF_DUPLEX 242 #define CONFIG_DEFAULT_SPI_BUS 2 243 #define CONFIG_DEFAULT_SPI_CS 0 244 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 245 246 /* SPI FLASH */ 247 #ifdef CONFIG_CMD_SF 248 #define CONFIG_SPI_FLASH 249 #define CONFIG_SPI_FLASH_STMICRO 250 #define CONFIG_SF_DEFAULT_BUS 2 251 #define CONFIG_SF_DEFAULT_CS 0 252 #define CONFIG_SF_DEFAULT_SPEED 40000000 253 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 254 255 #define CONFIG_ENV_SPI_BUS 2 256 #define CONFIG_ENV_SPI_CS 0 257 #define CONFIG_ENV_SPI_MAX_HZ 40000000 258 #define CONFIG_ENV_SPI_MODE SPI_MODE_0 259 #endif 260 #endif 261 262 /* 263 * LCD 264 */ 265 #ifdef CONFIG_VIDEO 266 #define CONFIG_CFB_CONSOLE 267 #define CONFIG_VIDEO_MXS 268 #define CONFIG_VIDEO_LOGO 269 #define CONFIG_VIDEO_SW_CURSOR 270 #define CONFIG_VGA_AS_SINGLE_DEVICE 271 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 272 #define CONFIG_SPLASH_SCREEN 273 #define CONFIG_CMD_BMP 274 #define CONFIG_BMP_16BPP 275 #define CONFIG_VIDEO_BMP_RLE8 276 #define CONFIG_VIDEO_BMP_GZIP 277 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10) 278 #endif 279 280 /* 281 * Boot Linux 282 */ 283 #define CONFIG_CMDLINE_TAG 284 #define CONFIG_SETUP_MEMORY_TAGS 285 #define CONFIG_BOOTDELAY 3 286 #define CONFIG_BOOTFILE "uImage" 287 #define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " 288 #define CONFIG_BOOTCOMMAND "run bootcmd_net" 289 #define CONFIG_LOADADDR 0x42000000 290 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 291 #define CONFIG_OF_LIBFDT 292 293 /* 294 * Extra Environments 295 */ 296 #define CONFIG_EXTRA_ENV_SETTINGS \ 297 "update_nand_full_filename=u-boot.nand\0" \ 298 "update_nand_firmware_filename=u-boot.sb\0" \ 299 "update_sd_firmware_filename=u-boot.sd\0" \ 300 "update_nand_firmware_maxsz=0x100000\0" \ 301 "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \ 302 "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \ 303 "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \ 304 "nand device 0 ; " \ 305 "nand info ; " \ 306 "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \ 307 "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \ 308 "update_nand_full=" /* Update FCB, DBBT and FW */ \ 309 "if tftp ${update_nand_full_filename} ; then " \ 310 "run update_nand_get_fcb_size ; " \ 311 "nand scrub -y 0x0 ${filesize} ; " \ 312 "nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \ 313 "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \ 314 "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \ 315 "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \ 316 "fi\0" \ 317 "update_nand_firmware=" /* Update only firmware */ \ 318 "if tftp ${update_nand_firmware_filename} ; then " \ 319 "run update_nand_get_fcb_size ; " \ 320 "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \ 321 "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \ 322 "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \ 323 "nand erase ${fcb_sz} ${fw_sz} ; " \ 324 "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \ 325 "nand write ${loadaddr} ${fw_off} ${filesize} ; " \ 326 "fi\0" \ 327 "update_sd_firmware=" /* Update the SD firmware partition */ \ 328 "if mmc rescan ; then " \ 329 "if tftp ${update_sd_firmware_filename} ; then " \ 330 "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \ 331 "setexpr fw_sz ${fw_sz} + 1 ; " \ 332 "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \ 333 "fi ; " \ 334 "fi\0" 335 336 #endif /* __M28EVK_CONFIG_H__ */ 337