1*3b6e3898SPrabhakar Kushwaha /* 2*3b6e3898SPrabhakar Kushwaha * Copyright 2016 Freescale Semiconductor, Inc. 3*3b6e3898SPrabhakar Kushwaha * 4*3b6e3898SPrabhakar Kushwaha * SPDX-License-Identifier: GPL-2.0+ 5*3b6e3898SPrabhakar Kushwaha */ 6*3b6e3898SPrabhakar Kushwaha 7*3b6e3898SPrabhakar Kushwaha #ifndef __LS1012ARDB_H__ 8*3b6e3898SPrabhakar Kushwaha #define __LS1012ARDB_H__ 9*3b6e3898SPrabhakar Kushwaha 10*3b6e3898SPrabhakar Kushwaha #include "ls1012a_common.h" 11*3b6e3898SPrabhakar Kushwaha 12*3b6e3898SPrabhakar Kushwaha 13*3b6e3898SPrabhakar Kushwaha #define CONFIG_DIMM_SLOTS_PER_CTLR 1 14*3b6e3898SPrabhakar Kushwaha #define CONFIG_CHIP_SELECTS_PER_CTRL 1 15*3b6e3898SPrabhakar Kushwaha #define CONFIG_NR_DRAM_BANKS 2 16*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_SDRAM_SIZE 0x40000000 17*3b6e3898SPrabhakar Kushwaha 18*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_MMDC_CORE_CONTROL_1 0x05180000 19*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_MMDC_CORE_CONTROL_2 0x85180000 20*3b6e3898SPrabhakar Kushwaha 21*3b6e3898SPrabhakar Kushwaha #define CONFIG_CMD_MEMINFO 22*3b6e3898SPrabhakar Kushwaha #define CONFIG_CMD_MEMTEST 23*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_MEMTEST_START 0x80000000 24*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_MEMTEST_END 0x9fffffff 25*3b6e3898SPrabhakar Kushwaha 26*3b6e3898SPrabhakar Kushwaha /* 27*3b6e3898SPrabhakar Kushwaha * USB 28*3b6e3898SPrabhakar Kushwaha */ 29*3b6e3898SPrabhakar Kushwaha #define CONFIG_HAS_FSL_XHCI_USB 30*3b6e3898SPrabhakar Kushwaha 31*3b6e3898SPrabhakar Kushwaha #ifdef CONFIG_HAS_FSL_XHCI_USB 32*3b6e3898SPrabhakar Kushwaha #define CONFIG_USB_XHCI 33*3b6e3898SPrabhakar Kushwaha #define CONFIG_USB_XHCI_FSL 34*3b6e3898SPrabhakar Kushwaha #define CONFIG_USB_XHCI_DWC3 35*3b6e3898SPrabhakar Kushwaha #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 36*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 37*3b6e3898SPrabhakar Kushwaha #define CONFIG_USB_STORAGE 38*3b6e3898SPrabhakar Kushwaha #endif 39*3b6e3898SPrabhakar Kushwaha 40*3b6e3898SPrabhakar Kushwaha /* 41*3b6e3898SPrabhakar Kushwaha * I2C IO expander 42*3b6e3898SPrabhakar Kushwaha */ 43*3b6e3898SPrabhakar Kushwaha 44*3b6e3898SPrabhakar Kushwaha #define I2C_MUX_IO1_ADDR 0x24 45*3b6e3898SPrabhakar Kushwaha #define __SW_BOOT_MASK 0xFC 46*3b6e3898SPrabhakar Kushwaha #define __SW_BOOT_EMU 0x10 47*3b6e3898SPrabhakar Kushwaha #define __SW_BOOT_BANK1 0x00 48*3b6e3898SPrabhakar Kushwaha #define __SW_BOOT_BANK2 0x01 49*3b6e3898SPrabhakar Kushwaha #define __SW_REV_MASK 0x07 50*3b6e3898SPrabhakar Kushwaha #define __SW_REV_A 0xF8 51*3b6e3898SPrabhakar Kushwaha #define __SW_REV_B 0xF0 52*3b6e3898SPrabhakar Kushwaha 53*3b6e3898SPrabhakar Kushwaha /* MMC */ 54*3b6e3898SPrabhakar Kushwaha #define CONFIG_MMC 55*3b6e3898SPrabhakar Kushwaha #ifdef CONFIG_MMC 56*3b6e3898SPrabhakar Kushwaha #define CONFIG_FSL_ESDHC 57*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 58*3b6e3898SPrabhakar Kushwaha #define CONFIG_GENERIC_MMC 59*3b6e3898SPrabhakar Kushwaha #define CONFIG_DOS_PARTITION 60*3b6e3898SPrabhakar Kushwaha #endif 61*3b6e3898SPrabhakar Kushwaha 62*3b6e3898SPrabhakar Kushwaha /* SATA */ 63*3b6e3898SPrabhakar Kushwaha #define CONFIG_LIBATA 64*3b6e3898SPrabhakar Kushwaha #define CONFIG_SCSI 65*3b6e3898SPrabhakar Kushwaha #define CONFIG_SCSI_AHCI 66*3b6e3898SPrabhakar Kushwaha #define CONFIG_SCSI_AHCI_PLAT 67*3b6e3898SPrabhakar Kushwaha #define CONFIG_CMD_SCSI 68*3b6e3898SPrabhakar Kushwaha #define CONFIG_DOS_PARTITION 69*3b6e3898SPrabhakar Kushwaha #define CONFIG_BOARD_LATE_INIT 70*3b6e3898SPrabhakar Kushwaha 71*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_SATA AHCI_BASE_ADDR 72*3b6e3898SPrabhakar Kushwaha 73*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 74*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_SCSI_MAX_LUN 1 75*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 76*3b6e3898SPrabhakar Kushwaha CONFIG_SYS_SCSI_MAX_LUN) 77*3b6e3898SPrabhakar Kushwaha #define CONFIG_PCI /* Enable PCI/PCIE */ 78*3b6e3898SPrabhakar Kushwaha #define CONFIG_PCIE1 /* PCIE controller 1 */ 79*3b6e3898SPrabhakar Kushwaha #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ 80*3b6e3898SPrabhakar Kushwaha #define FSL_PCIE_COMPAT "fsl,ls1043a-pcie" 81*3b6e3898SPrabhakar Kushwaha 82*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCI_64BIT 83*3b6e3898SPrabhakar Kushwaha 84*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_CFG0_PHYS_OFF 0x00000000 85*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_CFG0_SIZE 0x00001000 /* 4k */ 86*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_CFG1_PHYS_OFF 0x00001000 87*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_CFG1_SIZE 0x00001000 /* 4k */ 88*3b6e3898SPrabhakar Kushwaha 89*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_IO_BUS 0x00000000 90*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_IO_PHYS_OFF 0x00010000 91*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_IO_SIZE 0x00010000 /* 64k */ 92*3b6e3898SPrabhakar Kushwaha 93*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_MEM_BUS 0x08000000 94*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_MEM_PHYS_OFF 0x04000000 95*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_MEM_SIZE 0x80000000 /* 128M */ 96*3b6e3898SPrabhakar Kushwaha 97*3b6e3898SPrabhakar Kushwaha #define CONFIG_NET_MULTI 98*3b6e3898SPrabhakar Kushwaha #define CONFIG_PCI_PNP 99*3b6e3898SPrabhakar Kushwaha #define CONFIG_PCI_SCAN_SHOW 100*3b6e3898SPrabhakar Kushwaha #define CONFIG_CMD_PCI 101*3b6e3898SPrabhakar Kushwaha 102*3b6e3898SPrabhakar Kushwaha #define CONFIG_CMD_MEMINFO 103*3b6e3898SPrabhakar Kushwaha #define CONFIG_CMD_MEMTEST 104*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_MEMTEST_START 0x80000000 105*3b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_MEMTEST_END 0x9fffffff 106*3b6e3898SPrabhakar Kushwaha 107*3b6e3898SPrabhakar Kushwaha #endif /* __LS1012ARDB_H__ */ 108