1 /* 2 * include/configs/lager.h 3 * This file is lager board configuration. 4 * 5 * Copyright (C) 2013 Renesas Electronics Corporation 6 * 7 * SPDX-License-Identifier: GPL-2.0 8 */ 9 10 #ifndef __LAGER_H 11 #define __LAGER_H 12 13 #undef DEBUG 14 #define CONFIG_ARMV7 15 #define CONFIG_R8A7790 16 #define CONFIG_RMOBILE 17 #define CONFIG_RMOBILE_BOARD_STRING "Lager" 18 #define CONFIG_SH_GPIO_PFC 19 20 #include <asm/arch/rmobile.h> 21 22 #define CONFIG_CMD_EDITENV 23 #define CONFIG_CMD_SAVEENV 24 #define CONFIG_CMD_MEMORY 25 #define CONFIG_CMD_DFL 26 #define CONFIG_CMD_SDRAM 27 #define CONFIG_CMD_RUN 28 #define CONFIG_CMD_LOADS 29 #define CONFIG_CMD_NET 30 #define CONFIG_CMD_MII 31 #define CONFIG_CMD_PING 32 #define CONFIG_CMD_DHCP 33 #define CONFIG_CMD_NFS 34 #define CONFIG_CMD_BOOTZ 35 #define CONFIG_CMD_USB 36 #define CONFIG_CMD_FAT 37 38 #define CONFIG_CMD_SF 39 #define CONFIG_CMD_SPI 40 #define CONFIG_SYS_TEXT_BASE 0xE8080000 41 #define CONFIG_SYS_THUMB_BUILD 42 43 /* Support File sytems */ 44 #define CONFIG_DOS_PARTITION 45 #define CONFIG_SUPPORT_VFAT 46 47 #define CONFIG_CMDLINE_TAG 48 #define CONFIG_SETUP_MEMORY_TAGS 49 #define CONFIG_INITRD_TAG 50 #define CONFIG_CMDLINE_EDITING 51 #define CONFIG_OF_LIBFDT 52 53 /* #define CONFIG_OF_LIBFDT */ 54 #define BOARD_LATE_INIT 55 56 #define CONFIG_BAUDRATE 38400 57 #define CONFIG_BOOTDELAY 3 58 #define CONFIG_BOOTARGS "" 59 60 #define CONFIG_VERSION_VARIABLE 61 #undef CONFIG_SHOW_BOOT_PROGRESS 62 63 #define CONFIG_ARCH_CPU_INIT 64 #define CONFIG_DISPLAY_CPUINFO 65 #define CONFIG_DISPLAY_BOARDINFO 66 #define CONFIG_BOARD_EARLY_INIT_F 67 #define CONFIG_TMU_TIMER 68 69 /* STACK */ 70 #define CONFIG_SYS_INIT_SP_ADDR 0xE827fffc 71 #define STACK_AREA_SIZE 0xC000 72 #define LOW_LEVEL_MERAM_STACK \ 73 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 74 75 /* MEMORY */ 76 #define LAGER_SDRAM_BASE 0x40000000 77 #define LAGER_SDRAM_SIZE (2048u * 1024 * 1024) 78 #define LAGER_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 79 80 #define CONFIG_SYS_LONGHELP 81 #define CONFIG_SYS_CBSIZE 256 82 #define CONFIG_SYS_PBSIZE 256 83 #define CONFIG_SYS_MAXARGS 16 84 #define CONFIG_SYS_BARGSIZE 512 85 #define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 } 86 87 /* SCIF */ 88 #define CONFIG_SCIF_CONSOLE 89 #define CONFIG_CONS_SCIF0 90 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 91 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 92 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 93 94 #define CONFIG_SYS_MEMTEST_START (LAGER_SDRAM_BASE) 95 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 96 504 * 1024 * 1024) 97 #undef CONFIG_SYS_ALT_MEMTEST 98 #undef CONFIG_SYS_MEMTEST_SCRATCH 99 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 100 101 #define CONFIG_SYS_SDRAM_BASE (LAGER_SDRAM_BASE) 102 #define CONFIG_SYS_SDRAM_SIZE (LAGER_UBOOT_SDRAM_SIZE) 103 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fc0) 104 #define CONFIG_NR_DRAM_BANKS 1 105 106 #define CONFIG_SYS_MONITOR_BASE 0x00000000 107 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 108 #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) 109 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 110 111 /* USE SPI */ 112 #define CONFIG_SPI 113 #define CONFIG_SPI_FLASH_BAR 114 #define CONFIG_SH_QSPI 115 #define CONFIG_SPI_FLASH 116 #define CONFIG_SPI_FLASH_SPANSION 117 #define CONFIG_SYS_NO_FLASH 118 119 /* ENV setting */ 120 #define CONFIG_ENV_IS_IN_SPI_FLASH 121 #define CONFIG_ENV_ADDR 0xC0000 122 123 /* Common ENV setting */ 124 #define CONFIG_ENV_OVERWRITE 125 #define CONFIG_ENV_SECT_SIZE (256 * 1024) 126 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) 127 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 128 #define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN) 129 130 /* SH Ether */ 131 #define CONFIG_NET_MULTI 132 #define CONFIG_SH_ETHER 133 #define CONFIG_SH_ETHER_USE_PORT 0 134 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 135 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 136 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 137 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 138 #define CONFIG_SH_ETHER_CACHE_INVALIDATE 139 #define CONFIG_PHYLIB 140 #define CONFIG_PHY_MICREL 141 #define CONFIG_BITBANGMII 142 #define CONFIG_BITBANGMII_MULTI 143 144 /* I2C */ 145 #define CONFIG_SYS_I2C 146 #define CONFIG_SYS_I2C_RCAR 147 #define CONFIG_SYS_RCAR_I2C0_BASE 0xE6508000 148 #define CONFIG_SYS_RCAR_I2C0_SPEED 400000 149 #define CONFIG_SYS_RCAR_I2C1_BASE 0xE6518000 150 #define CONFIG_SYS_RCAR_I2C1_SPEED 400000 151 #define CONFIG_SYS_RCAR_I2C2_BASE 0xE6530000 152 #define CONFIG_SYS_RCAR_I2C2_SPEED 400000 153 #define CONFIG_SYS_RCAR_I2C3_BASE 0xE6540000 154 #define CONFIG_SYS_RCAR_I2C3_SPEED 400000 155 #define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4 156 157 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 158 159 /* Board Clock */ 160 #define RMOBILE_XTAL_CLK 20000000u 161 #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 162 #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ 163 #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) 164 #define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2) 165 #define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15) 166 #define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12) 167 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_MP_CLK_FREQ 168 169 #define CONFIG_SYS_TMU_CLK_DIV 4 170 171 /* USB */ 172 #define CONFIG_USB_EHCI 173 #define CONFIG_USB_EHCI_RMOBILE 174 #define CONFIG_USB_MAX_CONTROLLER_COUNT 4 175 #define CONFIG_USB_STORAGE 176 177 #endif /* __LAGER_H */ 178