1f4ec4522SNobuhiro Iwamatsu /* 2f4ec4522SNobuhiro Iwamatsu * include/configs/lager.h 3f4ec4522SNobuhiro Iwamatsu * This file is lager board configuration. 4f4ec4522SNobuhiro Iwamatsu * 5*5ca6dfe6SNobuhiro Iwamatsu * Copyright (C) 2013, 2014 Renesas Electronics Corporation 6f4ec4522SNobuhiro Iwamatsu * 7f4ec4522SNobuhiro Iwamatsu * SPDX-License-Identifier: GPL-2.0 8f4ec4522SNobuhiro Iwamatsu */ 9f4ec4522SNobuhiro Iwamatsu 10f4ec4522SNobuhiro Iwamatsu #ifndef __LAGER_H 11f4ec4522SNobuhiro Iwamatsu #define __LAGER_H 12f4ec4522SNobuhiro Iwamatsu 13f4ec4522SNobuhiro Iwamatsu #undef DEBUG 14f4ec4522SNobuhiro Iwamatsu #define CONFIG_R8A7790 15f4ec4522SNobuhiro Iwamatsu #define CONFIG_RMOBILE_BOARD_STRING "Lager" 16f4ec4522SNobuhiro Iwamatsu 17*5ca6dfe6SNobuhiro Iwamatsu #include "rcar-gen2-common.h" 18d80149b2SNobuhiro Iwamatsu 19fb6f6001SNobuhiro Iwamatsu #if defined(CONFIG_RMOBILE_EXTRAM_BOOT) 20fb6f6001SNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE 0xB0000000 21fb6f6001SNobuhiro Iwamatsu #else 220e05b217SNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE 0xE8080000 23fb6f6001SNobuhiro Iwamatsu #endif 24f4ec4522SNobuhiro Iwamatsu 25f4ec4522SNobuhiro Iwamatsu /* STACK */ 26fb6f6001SNobuhiro Iwamatsu #if defined(CONFIGF_RMOBILE_EXTRAM_BOOT) 27fb6f6001SNobuhiro Iwamatsu #define CONFIG_SYS_INIT_SP_ADDR 0xB003FFFC 28fb6f6001SNobuhiro Iwamatsu #else 29fb6f6001SNobuhiro Iwamatsu #define CONFIG_SYS_INIT_SP_ADDR 0xE827FFFC 30fb6f6001SNobuhiro Iwamatsu #endif 31f4ec4522SNobuhiro Iwamatsu #define STACK_AREA_SIZE 0xC000 32f4ec4522SNobuhiro Iwamatsu #define LOW_LEVEL_MERAM_STACK \ 33f4ec4522SNobuhiro Iwamatsu (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 34f4ec4522SNobuhiro Iwamatsu 35f4ec4522SNobuhiro Iwamatsu /* MEMORY */ 36*5ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_SDRAM_BASE 0x40000000 37*5ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024) 38*5ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 39f4ec4522SNobuhiro Iwamatsu 40f4ec4522SNobuhiro Iwamatsu /* SCIF */ 41f4ec4522SNobuhiro Iwamatsu #define CONFIG_SCIF_CONSOLE 42f4ec4522SNobuhiro Iwamatsu #define CONFIG_CONS_SCIF0 43c252d64bSNobuhiro Iwamatsu #define CONFIG_SCIF_USE_EXT_CLK 44f4ec4522SNobuhiro Iwamatsu 45*5ca6dfe6SNobuhiro Iwamatsu /* SPI */ 460e05b217SNobuhiro Iwamatsu #define CONFIG_SPI 470e05b217SNobuhiro Iwamatsu #define CONFIG_SPI_FLASH_BAR 480e05b217SNobuhiro Iwamatsu #define CONFIG_SH_QSPI 490e05b217SNobuhiro Iwamatsu #define CONFIG_SPI_FLASH 500e05b217SNobuhiro Iwamatsu #define CONFIG_SPI_FLASH_SPANSION 510e05b217SNobuhiro Iwamatsu #define CONFIG_SYS_NO_FLASH 520e05b217SNobuhiro Iwamatsu 5323565c6bSNobuhiro Iwamatsu /* SH Ether */ 5423565c6bSNobuhiro Iwamatsu #define CONFIG_NET_MULTI 5523565c6bSNobuhiro Iwamatsu #define CONFIG_SH_ETHER 5623565c6bSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_USE_PORT 0 5723565c6bSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_ADDR 0x1 5823565c6bSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 5923565c6bSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 6023565c6bSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_CACHE_WRITEBACK 6123565c6bSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_CACHE_INVALIDATE 6223565c6bSNobuhiro Iwamatsu #define CONFIG_PHYLIB 6323565c6bSNobuhiro Iwamatsu #define CONFIG_PHY_MICREL 6423565c6bSNobuhiro Iwamatsu #define CONFIG_BITBANGMII 6523565c6bSNobuhiro Iwamatsu #define CONFIG_BITBANGMII_MULTI 6623565c6bSNobuhiro Iwamatsu 67b9107adfSNobuhiro Iwamatsu /* I2C */ 68b9107adfSNobuhiro Iwamatsu #define CONFIG_SYS_I2C 69b9107adfSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_RCAR 70b9107adfSNobuhiro Iwamatsu #define CONFIG_SYS_RCAR_I2C0_SPEED 400000 71b9107adfSNobuhiro Iwamatsu #define CONFIG_SYS_RCAR_I2C1_SPEED 400000 72b9107adfSNobuhiro Iwamatsu #define CONFIG_SYS_RCAR_I2C2_SPEED 400000 73b9107adfSNobuhiro Iwamatsu #define CONFIG_SYS_RCAR_I2C3_SPEED 400000 74b9107adfSNobuhiro Iwamatsu #define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4 75b9107adfSNobuhiro Iwamatsu 76b9986be0SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 77b9986be0SNobuhiro Iwamatsu 78f4ec4522SNobuhiro Iwamatsu /* Board Clock */ 79b1f78a2eSNobuhiro Iwamatsu #define RMOBILE_XTAL_CLK 20000000u 80b1f78a2eSNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 81b1f78a2eSNobuhiro Iwamatsu #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ 82b1f78a2eSNobuhiro Iwamatsu #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) 83f4ec4522SNobuhiro Iwamatsu #define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2) 84f4ec4522SNobuhiro Iwamatsu #define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15) 85b9107adfSNobuhiro Iwamatsu #define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12) 86c33e4f11SNobuhiro Iwamatsu #define CONFIG_SH_SCIF_CLK_FREQ 14745600 /* External Clock */ 87f4ec4522SNobuhiro Iwamatsu 88f4ec4522SNobuhiro Iwamatsu #define CONFIG_SYS_TMU_CLK_DIV 4 89f4ec4522SNobuhiro Iwamatsu 905c4bb96eSNobuhiro Iwamatsu /* USB */ 915c4bb96eSNobuhiro Iwamatsu #define CONFIG_USB_EHCI 925c4bb96eSNobuhiro Iwamatsu #define CONFIG_USB_EHCI_RMOBILE 935906fadeSNobuhiro Iwamatsu #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 945c4bb96eSNobuhiro Iwamatsu #define CONFIG_USB_STORAGE 955c4bb96eSNobuhiro Iwamatsu 96f4ec4522SNobuhiro Iwamatsu #endif /* __LAGER_H */ 97