1 /* 2 * include/configs/koelsch.h 3 * 4 * Copyright (C) 2013 Renesas Electronics Corporation 5 * 6 * SPDX-License-Identifier: GPL-2.0 7 */ 8 9 #ifndef __KOELSCH_H 10 #define __KOELSCH_H 11 12 #undef DEBUG 13 #define CONFIG_ARMV7 14 #define CONFIG_R8A7791 15 #define CONFIG_RMOBILE 16 #define CONFIG_RMOBILE_BOARD_STRING "Koelsch" 17 #define CONFIG_SH_GPIO_PFC 18 19 #include <asm/arch/rmobile.h> 20 21 #define CONFIG_CMD_EDITENV 22 #define CONFIG_CMD_SAVEENV 23 #define CONFIG_CMD_MEMORY 24 #define CONFIG_CMD_DFL 25 #define CONFIG_CMD_SDRAM 26 #define CONFIG_CMD_RUN 27 #define CONFIG_CMD_LOADS 28 #define CONFIG_CMD_NET 29 #define CONFIG_CMD_MII 30 #define CONFIG_CMD_PING 31 #define CONFIG_CMD_DHCP 32 #define CONFIG_CMD_NFS 33 #define CONFIG_CMD_BOOTZ 34 #define CONFIG_CMD_FLASH 35 36 #define CONFIG_CMDLINE_TAG 37 #define CONFIG_SETUP_MEMORY_TAGS 38 #define CONFIG_INITRD_TAG 39 #define CONFIG_CMDLINE_EDITING 40 41 #define CONFIG_OF_LIBFDT 42 #define BOARD_LATE_INIT 43 44 #define CONFIG_BAUDRATE 38400 45 #define CONFIG_BOOTDELAY 3 46 #define CONFIG_BOOTARGS "" 47 48 #define CONFIG_VERSION_VARIABLE 49 #undef CONFIG_SHOW_BOOT_PROGRESS 50 51 #define CONFIG_ARCH_CPU_INIT 52 #define CONFIG_DISPLAY_CPUINFO 53 #define CONFIG_DISPLAY_BOARDINFO 54 #define CONFIG_BOARD_EARLY_INIT_F 55 #define CONFIG_USE_ARCH_MEMSET 56 #define CONFIG_USE_ARCH_MEMCPY 57 #define CONFIG_TMU_TIMER 58 59 /* STACK */ 60 #define CONFIG_SYS_INIT_SP_ADDR 0xE633fffc 61 #define STACK_AREA_SIZE 0xC000 62 #define LOW_LEVEL_MERAM_STACK \ 63 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 64 65 /* MEMORY */ 66 #define KOELSCH_SDRAM_BASE 0x40000000 67 #define KOELSCH_SDRAM_SIZE (2048u * 1024 * 1024) 68 #define KOELSCH_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 69 70 #define CONFIG_SYS_LONGHELP 71 #define CONFIG_SYS_CBSIZE 256 72 #define CONFIG_SYS_PBSIZE 256 73 #define CONFIG_SYS_MAXARGS 16 74 #define CONFIG_SYS_BARGSIZE 512 75 #define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 } 76 77 /* SCIF */ 78 #define CONFIG_SCIF_CONSOLE 79 #define CONFIG_CONS_SCIF0 80 #define SCIF0_BASE 0xe6e60000 81 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 82 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 83 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 84 85 #define CONFIG_SYS_MEMTEST_START (KOELSCH_SDRAM_BASE) 86 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 87 504 * 1024 * 1024) 88 #undef CONFIG_SYS_ALT_MEMTEST 89 #undef CONFIG_SYS_MEMTEST_SCRATCH 90 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 91 92 #define CONFIG_SYS_SDRAM_BASE (KOELSCH_SDRAM_BASE) 93 #define CONFIG_SYS_SDRAM_SIZE (KOELSCH_UBOOT_SDRAM_SIZE) 94 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fc0) 95 #define CONFIG_NR_DRAM_BANKS 1 96 97 #define CONFIG_SYS_MONITOR_BASE 0x00000000 98 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 99 #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) 100 #define CONFIG_SYS_GBL_DATA_SIZE (256) 101 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 102 103 /* FLASH */ 104 #define CONFIG_SYS_TEXT_BASE 0x00000000 105 #define CONFIG_SYS_FLASH_CFI 106 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 107 #define CONFIG_FLASH_CFI_DRIVER 108 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 109 #define CONFIG_FLASH_SHOW_PROGRESS 45 110 #define CONFIG_SYS_FLASH_BASE 0x00000000 111 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */ 112 #define CONFIG_SYS_MAX_FLASH_SECT 1024 113 #define CONFIG_SYS_MAX_FLASH_BANKS 1 114 #define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) } 115 #define CONFIG_SYS_FLASH_BANKS_SIZES { (CONFIG_SYS_FLASH_SIZE) } 116 #define CONFIG_SYS_FLASH_ERASE_TOUT 3000 117 #define CONFIG_SYS_FLASH_WRITE_TOUT 3000 118 #define CONFIG_SYS_FLASH_LOCK_TOUT 3000 119 #define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000 120 121 /* ENV setting */ 122 #define CONFIG_ENV_IS_IN_FLASH 123 #define CONFIG_ENV_OVERWRITE 1 124 #define CONFIG_ENV_SECT_SIZE (256 * 1024) 125 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ 126 CONFIG_SYS_MONITOR_LEN) 127 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) 128 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 129 #define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN) 130 131 /* SH Ether */ 132 #define CONFIG_NET_MULTI 133 #define CONFIG_SH_ETHER 134 #define CONFIG_SH_ETHER_USE_PORT 0 135 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 136 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 137 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 138 #define CONFIG_SH_ETHER_CACHE_INVALIDATE 139 #define CONFIG_PHYLIB 140 #define CONFIG_PHY_MICREL 141 #define CONFIG_BITBANGMII 142 #define CONFIG_BITBANGMII_MULTI 143 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 144 145 /* Board Clock */ 146 #define CONFIG_SYS_CLK_FREQ 10000000 147 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 148 #define CONFIG_SH_SCIF_CLK_FREQ 14745600 149 #define CONFIG_SYS_TMU_CLK_DIV 4 150 #define CONFIG_SYS_HZ 1000 151 152 /* i2c */ 153 #define CONFIG_CMD_I2C 154 #define CONFIG_SYS_I2C 155 #define CONFIG_SYS_I2C_SH 156 #define CONFIG_SYS_I2C_SLAVE 0x7F 157 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3 158 #define CONFIG_SYS_I2C_SH_BASE0 0xE6500000 159 #define CONFIG_SYS_I2C_SH_SPEED0 400000 160 #define CONFIG_SYS_I2C_SH_BASE1 0xE6510000 161 #define CONFIG_SYS_I2C_SH_SPEED1 400000 162 #define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000 163 #define CONFIG_SYS_I2C_SH_SPEED2 400000 164 #define CONFIG_SH_I2C_DATA_HIGH 4 165 #define CONFIG_SH_I2C_DATA_LOW 5 166 #define CONFIG_SH_I2C_CLOCK 10000000 167 168 #endif /* __KOELSCH_H */ 169