xref: /rk3399_rockchip-uboot/include/configs/koelsch.h (revision 1490eb89f4697b02cfb8f826d2f5eaf37edcbd47)
11251e490SNobuhiro Iwamatsu /*
21251e490SNobuhiro Iwamatsu  * include/configs/koelsch.h
31251e490SNobuhiro Iwamatsu  *
41251e490SNobuhiro Iwamatsu  * Copyright (C) 2013 Renesas Electronics Corporation
51251e490SNobuhiro Iwamatsu  *
61251e490SNobuhiro Iwamatsu  * SPDX-License-Identifier: GPL-2.0
71251e490SNobuhiro Iwamatsu  */
81251e490SNobuhiro Iwamatsu 
91251e490SNobuhiro Iwamatsu #ifndef __KOELSCH_H
101251e490SNobuhiro Iwamatsu #define __KOELSCH_H
111251e490SNobuhiro Iwamatsu 
121251e490SNobuhiro Iwamatsu #undef DEBUG
131251e490SNobuhiro Iwamatsu #define CONFIG_R8A7791
14*1cc95f6eSNobuhiro Iwamatsu #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Koelsch"
151251e490SNobuhiro Iwamatsu 
165ca6dfe6SNobuhiro Iwamatsu #include "rcar-gen2-common.h"
17b6c96f7fSNobuhiro Iwamatsu 
18*1cc95f6eSNobuhiro Iwamatsu #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
1969191fedSNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE	0x70000000
2069191fedSNobuhiro Iwamatsu #else
21c71b4dd2SNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE	0xE6304000
2269191fedSNobuhiro Iwamatsu #endif
2369191fedSNobuhiro Iwamatsu 
241251e490SNobuhiro Iwamatsu /* STACK */
25*1cc95f6eSNobuhiro Iwamatsu #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
2669191fedSNobuhiro Iwamatsu #define CONFIG_SYS_INIT_SP_ADDR		0x7003FFFC
2769191fedSNobuhiro Iwamatsu #else
2869191fedSNobuhiro Iwamatsu #define CONFIG_SYS_INIT_SP_ADDR		0xE633fffC
2969191fedSNobuhiro Iwamatsu #endif
3069191fedSNobuhiro Iwamatsu 
311251e490SNobuhiro Iwamatsu #define STACK_AREA_SIZE			0xC000
321251e490SNobuhiro Iwamatsu #define LOW_LEVEL_MERAM_STACK	\
331251e490SNobuhiro Iwamatsu 		(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
341251e490SNobuhiro Iwamatsu 
351251e490SNobuhiro Iwamatsu /* MEMORY */
365ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_SDRAM_BASE		0x40000000
375ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_SDRAM_SIZE		(2048u * 1024 * 1024)
385ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_UBOOT_SDRAM_SIZE	(512 * 1024 * 1024)
391251e490SNobuhiro Iwamatsu 
4090362c0cSNobuhiro Iwamatsu /* SH Ether */
4190362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER
4290362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_USE_PORT	0
4390362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_ADDR	0x1
4490362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
4590362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_CACHE_WRITEBACK
4690362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_CACHE_INVALIDATE
4790362c0cSNobuhiro Iwamatsu #define CONFIG_BITBANGMII
4890362c0cSNobuhiro Iwamatsu #define CONFIG_BITBANGMII_MULTI
4990362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_ALIGNE_SIZE 64
5090362c0cSNobuhiro Iwamatsu 
511251e490SNobuhiro Iwamatsu /* Board Clock */
52ae8e1d9dSNobuhiro Iwamatsu #define RMOBILE_XTAL_CLK	20000000u
53ae8e1d9dSNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
54ae8e1d9dSNobuhiro Iwamatsu #define CONFIG_SH_TMU_CLK_FREQ	(CONFIG_SYS_CLK_FREQ / 2)
551251e490SNobuhiro Iwamatsu #define CONFIG_SYS_TMU_CLK_DIV	4
561251e490SNobuhiro Iwamatsu 
57bb611cceSNobuhiro Iwamatsu /* i2c */
58bb611cceSNobuhiro Iwamatsu #define CONFIG_SYS_I2C
59bb611cceSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH
60bb611cceSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SLAVE	0x7F
61bb611cceSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	3
62bb611cceSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED0	400000
63bb611cceSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED1	400000
64bb611cceSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED2	400000
65bb611cceSNobuhiro Iwamatsu #define CONFIG_SH_I2C_DATA_HIGH	4
66bb611cceSNobuhiro Iwamatsu #define CONFIG_SH_I2C_DATA_LOW	5
67bb611cceSNobuhiro Iwamatsu #define CONFIG_SH_I2C_CLOCK	10000000
68bb611cceSNobuhiro Iwamatsu 
69b8f383b8SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
70b8f383b8SNobuhiro Iwamatsu 
71aa44ae32SNobuhiro Iwamatsu /* USB */
72aa44ae32SNobuhiro Iwamatsu #define CONFIG_USB_EHCI_RMOBILE
735906fadeSNobuhiro Iwamatsu #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
74aa44ae32SNobuhiro Iwamatsu 
758e2e5886SNobuhiro Iwamatsu /* Module stop status bits */
768e2e5886SNobuhiro Iwamatsu /* INTC-RT */
778e2e5886SNobuhiro Iwamatsu #define CONFIG_SMSTP0_ENA	0x00400000
788e2e5886SNobuhiro Iwamatsu /* MSIF*/
798e2e5886SNobuhiro Iwamatsu #define CONFIG_SMSTP2_ENA	0x00002000
808e2e5886SNobuhiro Iwamatsu /* INTC-SYS, IRQC */
818e2e5886SNobuhiro Iwamatsu #define CONFIG_SMSTP4_ENA	0x00000180
828e2e5886SNobuhiro Iwamatsu /* SCIF0 */
838e2e5886SNobuhiro Iwamatsu #define CONFIG_SMSTP7_ENA	0x00200000
848e2e5886SNobuhiro Iwamatsu 
8511e32910SNobuhiro Iwamatsu /* SD */
8611e32910SNobuhiro Iwamatsu #define CONFIG_SH_SDHI_FREQ	97500000
8711e32910SNobuhiro Iwamatsu 
881251e490SNobuhiro Iwamatsu #endif	/* __KOELSCH_H */
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