xref: /rk3399_rockchip-uboot/include/configs/kmp204x.h (revision 1ad6364eeb4f578e423081d1748e8a3fdf1ab01d)
1877bfe37SValentin Longchamp /*
2877bfe37SValentin Longchamp  * (C) Copyright 2013 Keymile AG
3877bfe37SValentin Longchamp  * Valentin Longchamp <valentin.longchamp@keymile.com>
4877bfe37SValentin Longchamp  *
5877bfe37SValentin Longchamp  * SPDX-License-Identifier:	GPL-2.0+
6877bfe37SValentin Longchamp  */
7877bfe37SValentin Longchamp 
8877bfe37SValentin Longchamp #ifndef __CONFIG_H
9877bfe37SValentin Longchamp #define __CONFIG_H
10877bfe37SValentin Longchamp 
11877bfe37SValentin Longchamp /* KMLION1 */
12877bfe37SValentin Longchamp #if defined(CONFIG_KMLION1)
13877bfe37SValentin Longchamp #define CONFIG_HOSTNAME		kmlion1
14877bfe37SValentin Longchamp #define CONFIG_KM_BOARD_NAME	"kmlion1"
15877bfe37SValentin Longchamp 
16*e95bbc8bSValentin Longchamp /* KMCOGE4 */
17*e95bbc8bSValentin Longchamp #elif defined(CONFIG_KMCOGE4)
18*e95bbc8bSValentin Longchamp #define CONFIG_HOSTNAME		kmcoge4
19*e95bbc8bSValentin Longchamp #define CONFIG_KM_BOARD_NAME	"kmcoge4"
20*e95bbc8bSValentin Longchamp 
21877bfe37SValentin Longchamp #else
22877bfe37SValentin Longchamp #error ("Board not supported")
23877bfe37SValentin Longchamp #endif
24877bfe37SValentin Longchamp 
25877bfe37SValentin Longchamp #define CONFIG_KMP204X
26877bfe37SValentin Longchamp 
27877bfe37SValentin Longchamp #include "km/kmp204x-common.h"
28877bfe37SValentin Longchamp 
29877bfe37SValentin Longchamp #if defined(CONFIG_KMLION1)
30877bfe37SValentin Longchamp /* App1 Local bus */
31877bfe37SValentin Longchamp #define CONFIG_SYS_LBAPP1_BASE		0xD0000000
32877bfe37SValentin Longchamp #define CONFIG_SYS_LBAPP1_BASE_PHYS	0xFD0000000ull
33877bfe37SValentin Longchamp 
34877bfe37SValentin Longchamp #define CONFIG_SYS_LBAPP1_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_LBAPP1_BASE_PHYS) \
35877bfe37SValentin Longchamp 				| BR_PS_8	/* Port Size 8 bits */ \
36877bfe37SValentin Longchamp 				| BR_DECC_OFF	/* no error corr */ \
37877bfe37SValentin Longchamp 				| BR_MS_GPCM	/* MSEL = GPCM */ \
38877bfe37SValentin Longchamp 				| BR_V)		/* valid */
39877bfe37SValentin Longchamp 
40877bfe37SValentin Longchamp #define CONFIG_SYS_LBAPP1_OR_PRELIM (OR_AM_256MB	/* length 256MB */ \
41877bfe37SValentin Longchamp 				| OR_GPCM_ACS_DIV2 /* LCS 1/2 clk after */ \
42877bfe37SValentin Longchamp 				| OR_GPCM_CSNT /* LCS 1/4 clk before */ \
43877bfe37SValentin Longchamp 				| OR_GPCM_SCY_2 /* 2 clk wait cycles */ \
44877bfe37SValentin Longchamp 				| OR_GPCM_TRLX /* relaxed tmgs */ \
45877bfe37SValentin Longchamp 				| OR_GPCM_EAD) /* extra bus clk cycles */
46877bfe37SValentin Longchamp /* Local bus app1 Base Address */
47877bfe37SValentin Longchamp #define CONFIG_SYS_BR2_PRELIM  CONFIG_SYS_LBAPP1_BR_PRELIM
48877bfe37SValentin Longchamp /* Local bus app1 Options */
49877bfe37SValentin Longchamp #define CONFIG_SYS_OR2_PRELIM  CONFIG_SYS_LBAPP1_OR_PRELIM
50*e95bbc8bSValentin Longchamp #endif
51877bfe37SValentin Longchamp 
52877bfe37SValentin Longchamp /* App2 Local bus */
53877bfe37SValentin Longchamp #define CONFIG_SYS_LBAPP2_BASE		0xE0000000
54877bfe37SValentin Longchamp #define CONFIG_SYS_LBAPP2_BASE_PHYS	0xFE0000000ull
55877bfe37SValentin Longchamp 
56877bfe37SValentin Longchamp #define CONFIG_SYS_LBAPP2_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_LBAPP2_BASE_PHYS) \
57877bfe37SValentin Longchamp 				| BR_PS_8	/* Port Size 8 bits */ \
58877bfe37SValentin Longchamp 				| BR_DECC_OFF	/* no error corr */ \
59877bfe37SValentin Longchamp 				| BR_MS_GPCM	/* MSEL = GPCM */ \
60877bfe37SValentin Longchamp 				| BR_V)		/* valid */
61877bfe37SValentin Longchamp 
62877bfe37SValentin Longchamp #define CONFIG_SYS_LBAPP2_OR_PRELIM (OR_AM_256MB	/* length 256MB */ \
63877bfe37SValentin Longchamp 				| OR_GPCM_ACS_DIV2 /* LCS 1/2 clk after */ \
64877bfe37SValentin Longchamp 				| OR_GPCM_CSNT /* LCS 1/4 clk before */ \
65877bfe37SValentin Longchamp 				| OR_GPCM_SCY_2 /* 2 clk wait cycles */ \
66877bfe37SValentin Longchamp 				| OR_GPCM_TRLX /* relaxed tmgs */ \
67877bfe37SValentin Longchamp 				| OR_GPCM_EAD) /* extra bus clk cycles */
68877bfe37SValentin Longchamp /* Local bus app2 Base Address */
69877bfe37SValentin Longchamp #define CONFIG_SYS_BR3_PRELIM  CONFIG_SYS_LBAPP2_BR_PRELIM
70877bfe37SValentin Longchamp /* Local bus app2 Options */
71877bfe37SValentin Longchamp #define CONFIG_SYS_OR3_PRELIM  CONFIG_SYS_LBAPP2_OR_PRELIM
72877bfe37SValentin Longchamp 
73877bfe37SValentin Longchamp #endif	/* __CONFIG_H */
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