xref: /rk3399_rockchip-uboot/include/configs/km/km_arm.h (revision dfeafde4fc0b22c47b2e17fc14b4e736c40cdb40)
1264eaa0eSValentin Longchamp /*
2264eaa0eSValentin Longchamp  * (C) Copyright 2009
3264eaa0eSValentin Longchamp  * Marvell Semiconductor <www.marvell.com>
4264eaa0eSValentin Longchamp  * Prafulla Wadaskar <prafulla@marvell.com>
5264eaa0eSValentin Longchamp  *
6264eaa0eSValentin Longchamp  * (C) Copyright 2009
7264eaa0eSValentin Longchamp  * Stefan Roese, DENX Software Engineering, sr@denx.de.
8264eaa0eSValentin Longchamp  *
9264eaa0eSValentin Longchamp  * (C) Copyright 2010-2011
10264eaa0eSValentin Longchamp  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
11264eaa0eSValentin Longchamp  *
12264eaa0eSValentin Longchamp  * See file CREDITS for list of people who contributed to this
13264eaa0eSValentin Longchamp  * project.
14264eaa0eSValentin Longchamp  *
15264eaa0eSValentin Longchamp  * This program is free software; you can redistribute it and/or
16264eaa0eSValentin Longchamp  * modify it under the terms of the GNU General Public License as
17264eaa0eSValentin Longchamp  * published by the Free Software Foundation; either version 2 of
18264eaa0eSValentin Longchamp  * the License, or (at your option) any later version.
19264eaa0eSValentin Longchamp  *
20264eaa0eSValentin Longchamp  * This program is distributed in the hope that it will be useful,
21264eaa0eSValentin Longchamp  * but WITHOUT ANY WARRANTY; without even the implied warranty of
22264eaa0eSValentin Longchamp  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
23264eaa0eSValentin Longchamp  * GNU General Public License for more details.
24264eaa0eSValentin Longchamp  *
25264eaa0eSValentin Longchamp  * You should have received a copy of the GNU General Public License
26264eaa0eSValentin Longchamp  * along with this program; if not, write to the Free Software
27264eaa0eSValentin Longchamp  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
28264eaa0eSValentin Longchamp  * MA 02110-1301 USA
29264eaa0eSValentin Longchamp  */
30264eaa0eSValentin Longchamp 
31264eaa0eSValentin Longchamp /*
32264eaa0eSValentin Longchamp  * for linking errors see
33264eaa0eSValentin Longchamp  * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
34264eaa0eSValentin Longchamp  */
35264eaa0eSValentin Longchamp 
36264eaa0eSValentin Longchamp #ifndef _CONFIG_KM_ARM_H
37264eaa0eSValentin Longchamp #define _CONFIG_KM_ARM_H
38264eaa0eSValentin Longchamp 
398620ca2aSValentin Longchamp /* We got removed from Linux mach-types.h */
408620ca2aSValentin Longchamp #define MACH_TYPE_KM_KIRKWOOD          2255
418620ca2aSValentin Longchamp 
42264eaa0eSValentin Longchamp /*
43264eaa0eSValentin Longchamp  * High Level Configuration Options (easy to change)
44264eaa0eSValentin Longchamp  */
45264eaa0eSValentin Longchamp #define CONFIG_MARVELL
46264eaa0eSValentin Longchamp #define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
47264eaa0eSValentin Longchamp #define CONFIG_KIRKWOOD			/* SOC Family Name */
48264eaa0eSValentin Longchamp #define CONFIG_KW88F6281		/* SOC Name */
49264eaa0eSValentin Longchamp #define CONFIG_MACH_KM_KIRKWOOD		/* Machine type */
50264eaa0eSValentin Longchamp 
518620ca2aSValentin Longchamp #define CONFIG_MACH_TYPE	MACH_TYPE_KM_KIRKWOOD
528620ca2aSValentin Longchamp 
53*dfeafde4SHolger Brunck #define CONFIG_NAND_ECC_BCH
54*dfeafde4SHolger Brunck #define CONFIG_BCH
55*dfeafde4SHolger Brunck 
56264eaa0eSValentin Longchamp /* include common defines/options for all Keymile boards */
57264eaa0eSValentin Longchamp #include "keymile-common.h"
58264eaa0eSValentin Longchamp 
59b5befd82SHolger Brunck #define CONFIG_CMD_NAND
60b5befd82SHolger Brunck #define CONFIG_CMD_SF
61b5befd82SHolger Brunck #define CONFIG_SOFT_I2C		/* I2C bit-banged	*/
62b5befd82SHolger Brunck 
63f46b4a1aSValentin Longchamp /* SPI NOR Flash default params, used by sf commands */
64f46b4a1aSValentin Longchamp #define CONFIG_SF_DEFAULT_SPEED		8100000
65f46b4a1aSValentin Longchamp #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
66f46b4a1aSValentin Longchamp 
678170aefcSHolger Brunck #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
688170aefcSHolger Brunck #define CONFIG_ENV_SPI_BUS		0
698170aefcSHolger Brunck #define CONFIG_ENV_SPI_CS		0
7005c8e81fSValentin Longchamp #define CONFIG_ENV_SPI_MAX_HZ		8100000
718170aefcSHolger Brunck #define CONFIG_ENV_SPI_MODE		SPI_MODE_3
728170aefcSHolger Brunck #endif
738170aefcSHolger Brunck 
74b5befd82SHolger Brunck #include "asm/arch/config.h"
75b5befd82SHolger Brunck 
76e5847b77SValentin Longchamp #define CONFIG_SYS_TEXT_BASE	0x07d00000	/* code address before reloc */
77264eaa0eSValentin Longchamp #define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
78264eaa0eSValentin Longchamp #define CONFIG_SYS_MEMTEST_END	0x007fffff	/*(_8M -1) */
79264eaa0eSValentin Longchamp #define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */
80264eaa0eSValentin Longchamp 
81264eaa0eSValentin Longchamp /* pseudo-non volatile RAM [hex] */
82264eaa0eSValentin Longchamp #define CONFIG_KM_PNVRAM	0x80000
83264eaa0eSValentin Longchamp /* physical RAM MTD size [hex] */
84264eaa0eSValentin Longchamp #define CONFIG_KM_PHRAM		0x17F000
85264eaa0eSValentin Longchamp 
86264eaa0eSValentin Longchamp #define CONFIG_KM_CRAMFS_ADDR	0x2400000
87264eaa0eSValentin Longchamp #define CONFIG_KM_KERNEL_ADDR	0x2000000	/* 4096KBytes */
88264eaa0eSValentin Longchamp 
89db0bb572SHolger Brunck /* architecture specific default bootargs */
90db0bb572SHolger Brunck #define CONFIG_KM_DEF_BOOT_ARGS_CPU					\
9166072a8cSHolger Brunck 		"bootcountaddr=${bootcountaddr} ${mtdparts}"		\
9266072a8cSHolger Brunck 		" boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}"
93db0bb572SHolger Brunck 
94264eaa0eSValentin Longchamp #define CONFIG_KM_DEF_ENV_CPU						\
95db0bb572SHolger Brunck 	"boot=bootm ${load_addr_r} - -\0"				\
962d9528e3SHolger Brunck 	"cramfsloadfdt=true\0"						\
9793ea89f0SMarek Vasut 	"u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0"		\
98af85f085SHolger Brunck 	CONFIG_KM_UPDATE_UBOOT						\
99264eaa0eSValentin Longchamp 	""
100264eaa0eSValentin Longchamp 
101264eaa0eSValentin Longchamp #define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
102264eaa0eSValentin Longchamp #define CONFIG_MISC_INIT_R
103264eaa0eSValentin Longchamp 
104264eaa0eSValentin Longchamp /*
105264eaa0eSValentin Longchamp  * NS16550 Configuration
106264eaa0eSValentin Longchamp  */
107264eaa0eSValentin Longchamp #define CONFIG_SYS_NS16550
108264eaa0eSValentin Longchamp #define CONFIG_SYS_NS16550_SERIAL
109264eaa0eSValentin Longchamp #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
110264eaa0eSValentin Longchamp #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
111264eaa0eSValentin Longchamp #define CONFIG_SYS_NS16550_COM1		KW_UART0_BASE
1123d3c7096SHolger Brunck #define CONFIG_SYS_NS16550_COM2		KW_UART1_BASE
113264eaa0eSValentin Longchamp 
114264eaa0eSValentin Longchamp /*
115264eaa0eSValentin Longchamp  * Serial Port configuration
116264eaa0eSValentin Longchamp  * The following definitions let you select what serial you want to use
117264eaa0eSValentin Longchamp  * for your console driver.
118264eaa0eSValentin Longchamp  */
119264eaa0eSValentin Longchamp 
120264eaa0eSValentin Longchamp #define CONFIG_CONS_INDEX	1	/* Console on UART0 */
121264eaa0eSValentin Longchamp 
122264eaa0eSValentin Longchamp /*
123264eaa0eSValentin Longchamp  * For booting Linux, the board info and command line data
124264eaa0eSValentin Longchamp  * have to be in the first 8 MB of memory, since this is
125264eaa0eSValentin Longchamp  * the maximum mapped by the Linux kernel during initialization.
126264eaa0eSValentin Longchamp  */
127264eaa0eSValentin Longchamp #define CONFIG_BOOTMAPSZ	(8 << 20)	/* Initial Memmap for Linux */
128264eaa0eSValentin Longchamp #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs  */
129264eaa0eSValentin Longchamp #define CONFIG_INITRD_TAG		/* enable INITRD tag */
130264eaa0eSValentin Longchamp #define CONFIG_SETUP_MEMORY_TAGS	/* enable memory tag */
131264eaa0eSValentin Longchamp 
132264eaa0eSValentin Longchamp /*
133264eaa0eSValentin Longchamp  * Commands configuration
134264eaa0eSValentin Longchamp  */
135264eaa0eSValentin Longchamp #define CONFIG_CMD_ELF
136264eaa0eSValentin Longchamp #define CONFIG_CMD_MTDPARTS
137264eaa0eSValentin Longchamp #define CONFIG_CMD_NFS
138264eaa0eSValentin Longchamp 
139264eaa0eSValentin Longchamp /*
140264eaa0eSValentin Longchamp  * Without NOR FLASH we need this
141264eaa0eSValentin Longchamp  */
142264eaa0eSValentin Longchamp #define CONFIG_SYS_NO_FLASH
143264eaa0eSValentin Longchamp #undef CONFIG_CMD_FLASH
144264eaa0eSValentin Longchamp #undef CONFIG_CMD_IMLS
145264eaa0eSValentin Longchamp 
146264eaa0eSValentin Longchamp /*
147264eaa0eSValentin Longchamp  * NAND Flash configuration
148264eaa0eSValentin Longchamp  */
149264eaa0eSValentin Longchamp #define CONFIG_SYS_MAX_NAND_DEVICE	1
150264eaa0eSValentin Longchamp 
151264eaa0eSValentin Longchamp #define BOOTFLASH_START		0x0
152264eaa0eSValentin Longchamp 
1533d3c7096SHolger Brunck /* Kirkwood has two serial IF */
1543d3c7096SHolger Brunck #if (CONFIG_CONS_INDEX == 2)
1553d3c7096SHolger Brunck #define CONFIG_KM_CONSOLE_TTY	"ttyS1"
1563d3c7096SHolger Brunck #else
157264eaa0eSValentin Longchamp #define CONFIG_KM_CONSOLE_TTY	"ttyS0"
1583d3c7096SHolger Brunck #endif
159264eaa0eSValentin Longchamp 
160264eaa0eSValentin Longchamp /*
161264eaa0eSValentin Longchamp  * Other required minimal configurations
162264eaa0eSValentin Longchamp  */
163264eaa0eSValentin Longchamp #define CONFIG_CONSOLE_INFO_QUIET	/* some code reduction */
164264eaa0eSValentin Longchamp #define CONFIG_ARCH_CPU_INIT		/* call arch_cpu_init() */
165264eaa0eSValentin Longchamp #define CONFIG_ARCH_MISC_INIT		/* call arch_misc_init() */
166264eaa0eSValentin Longchamp #define CONFIG_DISPLAY_CPUINFO		/* Display cpu info */
167264eaa0eSValentin Longchamp #define CONFIG_NR_DRAM_BANKS	4
168264eaa0eSValentin Longchamp #define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
169264eaa0eSValentin Longchamp 
170264eaa0eSValentin Longchamp /*
171264eaa0eSValentin Longchamp  * Ethernet Driver configuration
172264eaa0eSValentin Longchamp  */
173264eaa0eSValentin Longchamp #define CONFIG_NETCONSOLE	/* include NetConsole support   */
174264eaa0eSValentin Longchamp #define CONFIG_MII		/* expose smi ove miiphy interface */
175002ec08dSValentin Longchamp #define CONFIG_CMD_MII		/* to debug mdio phy config */
176264eaa0eSValentin Longchamp #define CONFIG_MVGBE		/* Enable Marvell Gbe Controller Driver */
177264eaa0eSValentin Longchamp #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
178264eaa0eSValentin Longchamp #define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
179264eaa0eSValentin Longchamp #define CONFIG_PHY_BASE_ADR	0
180264eaa0eSValentin Longchamp #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
181264eaa0eSValentin Longchamp 
182264eaa0eSValentin Longchamp /*
183264eaa0eSValentin Longchamp  * UBI related stuff
184264eaa0eSValentin Longchamp  */
185264eaa0eSValentin Longchamp #define CONFIG_SYS_USE_UBI
186264eaa0eSValentin Longchamp 
187264eaa0eSValentin Longchamp /*
188264eaa0eSValentin Longchamp  * I2C related stuff
189264eaa0eSValentin Longchamp  */
190264eaa0eSValentin Longchamp #define	CONFIG_KIRKWOOD_GPIO		/* Enable GPIO Support */
191264eaa0eSValentin Longchamp #if defined(CONFIG_SOFT_I2C)
192264eaa0eSValentin Longchamp #ifndef __ASSEMBLY__
193264eaa0eSValentin Longchamp #include <asm/arch-kirkwood/gpio.h>
194264eaa0eSValentin Longchamp extern void __set_direction(unsigned pin, int high);
195264eaa0eSValentin Longchamp void set_sda(int state);
196264eaa0eSValentin Longchamp void set_scl(int state);
197264eaa0eSValentin Longchamp int get_sda(void);
198264eaa0eSValentin Longchamp int get_scl(void);
199264eaa0eSValentin Longchamp #define KM_KIRKWOOD_SDA_PIN	8
200264eaa0eSValentin Longchamp #define KM_KIRKWOOD_SCL_PIN	9
201c471d848SHolger Brunck #define KM_KIRKWOOD_SOFT_I2C_GPIOS	0x0300
202264eaa0eSValentin Longchamp #define KM_KIRKWOOD_ENV_WP	38
203264eaa0eSValentin Longchamp 
204264eaa0eSValentin Longchamp #define I2C_ACTIVE	__set_direction(KM_KIRKWOOD_SDA_PIN, 0)
205264eaa0eSValentin Longchamp #define I2C_TRISTATE	__set_direction(KM_KIRKWOOD_SDA_PIN, 1)
206264eaa0eSValentin Longchamp #define I2C_READ	(kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
207264eaa0eSValentin Longchamp #define I2C_SDA(bit)	kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
208264eaa0eSValentin Longchamp #define I2C_SCL(bit)	kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
209264eaa0eSValentin Longchamp #endif
210264eaa0eSValentin Longchamp 
2119e9c6d7cSHolger Brunck #define I2C_DELAY	udelay(1)
212264eaa0eSValentin Longchamp #define I2C_SOFT_DECLARATIONS
213264eaa0eSValentin Longchamp 
214264eaa0eSValentin Longchamp #endif
215264eaa0eSValentin Longchamp 
2164daea6ffSStefan Bigler /* EEprom support 24C128, 24C256 valid for environment eeprom */
2174daea6ffSStefan Bigler #define CONFIG_SYS_I2C_MULTI_EEPROMS
2184daea6ffSStefan Bigler #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
2194daea6ffSStefan Bigler #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	6 /* 64 Byte write page */
2204daea6ffSStefan Bigler #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10
2214daea6ffSStefan Bigler 
222264eaa0eSValentin Longchamp #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
223264eaa0eSValentin Longchamp #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
224264eaa0eSValentin Longchamp 
225264eaa0eSValentin Longchamp /*
226264eaa0eSValentin Longchamp  *  Environment variables configurations
227264eaa0eSValentin Longchamp  */
2288170aefcSHolger Brunck #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
2298170aefcSHolger Brunck #define CONFIG_ENV_IS_IN_SPI_FLASH  /* use SPI-Flash for environment vars */
2308170aefcSHolger Brunck #define CONFIG_ENV_OFFSET		0xc0000     /* no bracets! */
2318170aefcSHolger Brunck #define CONFIG_ENV_SIZE			0x02000     /* Size of Environment */
2328170aefcSHolger Brunck #define CONFIG_ENV_SECT_SIZE		0x10000
2338170aefcSHolger Brunck #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + \
2348170aefcSHolger Brunck 					CONFIG_ENV_SECT_SIZE)
2358170aefcSHolger Brunck #define CONFIG_ENV_TOTAL_SIZE		0x20000     /* no bracets! */
2368170aefcSHolger Brunck #else
237264eaa0eSValentin Longchamp #define CONFIG_ENV_IS_IN_EEPROM		/* use EEPROM for environment vars */
238264eaa0eSValentin Longchamp #define CONFIG_SYS_DEF_EEPROM_ADDR	0x50
239264eaa0eSValentin Longchamp #define CONFIG_ENV_EEPROM_IS_ON_I2C
240264eaa0eSValentin Longchamp #define CONFIG_SYS_EEPROM_WREN
241264eaa0eSValentin Longchamp #define CONFIG_ENV_OFFSET		0x0 /* no bracets! */
242264eaa0eSValentin Longchamp #define CONFIG_ENV_SIZE			(0x2000 - CONFIG_ENV_OFFSET)
243680cfaf8SValentin Longchamp #define CONFIG_I2C_ENV_EEPROM_BUS	KM_ENV_BUS "\0"
244264eaa0eSValentin Longchamp #define CONFIG_ENV_OFFSET_REDUND	0x2000 /* no bracets! */
245264eaa0eSValentin Longchamp #define CONFIG_ENV_SIZE_REDUND		(CONFIG_ENV_SIZE)
2468170aefcSHolger Brunck #endif
2478170aefcSHolger Brunck 
2488170aefcSHolger Brunck #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
249264eaa0eSValentin Longchamp 
250264eaa0eSValentin Longchamp #define CONFIG_SPI_FLASH
251264eaa0eSValentin Longchamp #define CONFIG_SPI_FLASH_STMICRO
252264eaa0eSValentin Longchamp 
2530c25defcSValentin Longchamp /* SPI bus claim MPP configuration */
2540c25defcSValentin Longchamp #define CONFIG_SYS_KW_SPI_MPP	0x0
2550c25defcSValentin Longchamp 
256264eaa0eSValentin Longchamp #define FLASH_GPIO_PIN			0x00010000
2570c25defcSValentin Longchamp #define KM_FLASH_GPIO_PIN	16
258264eaa0eSValentin Longchamp 
259cf73639dSAndreas Huber #ifndef MTDIDS_DEFAULT
260264eaa0eSValentin Longchamp # define MTDIDS_DEFAULT		"nand0=orion_nand"
261cf73639dSAndreas Huber #endif /* MTDIDS_DEFAULT */
262cf73639dSAndreas Huber 
263cf73639dSAndreas Huber #ifndef MTDPARTS_DEFAULT
264264eaa0eSValentin Longchamp # define MTDPARTS_DEFAULT	"mtdparts="			\
265264eaa0eSValentin Longchamp 	"orion_nand:"						\
266cf73639dSAndreas Huber 		"-(" CONFIG_KM_UBI_PARTITION_NAME_BOOT ");"
267cf73639dSAndreas Huber #endif /* MTDPARTS_DEFAULT */
268264eaa0eSValentin Longchamp 
269af85f085SHolger Brunck #define	CONFIG_KM_UPDATE_UBOOT						\
270264eaa0eSValentin Longchamp 	"update="							\
2710c25defcSValentin Longchamp 		"sf probe 0;sf erase 0 +${filesize};"			\
2720c25defcSValentin Longchamp 		"sf write ${load_addr_r} 0 ${filesize};\0"
273264eaa0eSValentin Longchamp 
2748170aefcSHolger Brunck #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
2758170aefcSHolger Brunck #define CONFIG_KM_NEW_ENV						\
2768170aefcSHolger Brunck 	"newenv=sf probe 0;"						\
27793ea89f0SMarek Vasut 		"sf erase " __stringify(CONFIG_ENV_OFFSET) " "		\
27893ea89f0SMarek Vasut 		__stringify(CONFIG_ENV_TOTAL_SIZE)"\0"
2798170aefcSHolger Brunck #else
2808170aefcSHolger Brunck #define CONFIG_KM_NEW_ENV						\
281ea616d4dSValentin Longchamp 	"newenv=setenv addr 0x100000 && "				\
282ea616d4dSValentin Longchamp 		"i2c dev 1; mw.b ${addr} 0 4 && "			\
28393ea89f0SMarek Vasut 		"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR)	\
28493ea89f0SMarek Vasut 		" ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && "	\
28593ea89f0SMarek Vasut 		"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR)	\
28693ea89f0SMarek Vasut 		" ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
2878170aefcSHolger Brunck #endif
2888170aefcSHolger Brunck 
2898170aefcSHolger Brunck /*
2908170aefcSHolger Brunck  * Default environment variables
2918170aefcSHolger Brunck  */
2928170aefcSHolger Brunck #define CONFIG_EXTRA_ENV_SETTINGS					\
2938170aefcSHolger Brunck 	CONFIG_KM_DEF_ENV						\
2948170aefcSHolger Brunck 	CONFIG_KM_NEW_ENV						\
295b648bfc2SHolger Brunck 	"arch=arm\0"							\
296ea616d4dSValentin Longchamp 	"EEprom_ivm=" KM_IVM_BUS "\0"					\
297ea616d4dSValentin Longchamp 	""
298ea616d4dSValentin Longchamp 
299264eaa0eSValentin Longchamp #if defined(CONFIG_SYS_NO_FLASH)
300264eaa0eSValentin Longchamp #undef	CONFIG_FLASH_CFI_MTD
301264eaa0eSValentin Longchamp #undef	CONFIG_JFFS2_CMDLINE
302264eaa0eSValentin Longchamp #endif
303264eaa0eSValentin Longchamp 
304264eaa0eSValentin Longchamp /* additions for new relocation code, must be added to all boards */
305264eaa0eSValentin Longchamp #define CONFIG_SYS_SDRAM_BASE		0x00000000
306264eaa0eSValentin Longchamp /* Do early setups now in board_init_f() */
307264eaa0eSValentin Longchamp #define CONFIG_BOARD_EARLY_INIT_F
308264eaa0eSValentin Longchamp 
309264eaa0eSValentin Longchamp /*
310264eaa0eSValentin Longchamp  * resereved pram area at the end of memroy [hex]
311264eaa0eSValentin Longchamp  * 8Mbytes for switch + 4Kbytes for bootcount
312264eaa0eSValentin Longchamp  */
313264eaa0eSValentin Longchamp #define CONFIG_KM_RESERVED_PRAM 0x801000
314264eaa0eSValentin Longchamp /* address for the bootcount (taken from end of RAM) */
315264eaa0eSValentin Longchamp #define BOOTCOUNT_ADDR          (CONFIG_KM_RESERVED_PRAM)
3160044c42eSStefan Roese /* Use generic bootcount RAM driver */
3170044c42eSStefan Roese #define CONFIG_BOOTCOUNT_RAM
318264eaa0eSValentin Longchamp 
3199400f8faSValentin Longchamp /* enable POST tests */
3209400f8faSValentin Longchamp #define CONFIG_POST	(CONFIG_SYS_POST_MEM_REGIONS)
3219400f8faSValentin Longchamp #define CONFIG_POST_SKIP_ENV_FLAGS
3229400f8faSValentin Longchamp #define CONFIG_POST_EXTERNAL_WORD_FUNCS
3239400f8faSValentin Longchamp #define CONFIG_CMD_DIAG
3249400f8faSValentin Longchamp 
325b37f7724SValentin Longchamp /* we do the whole PCIe FPGA config stuff here */
32645bd01efSHolger Brunck #define	CONFIG_BOARD_LATE_INIT
327b37f7724SValentin Longchamp 
328264eaa0eSValentin Longchamp #endif /* _CONFIG_KM_ARM_H */
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