1264eaa0eSValentin Longchamp /* 2264eaa0eSValentin Longchamp * (C) Copyright 2009 3264eaa0eSValentin Longchamp * Marvell Semiconductor <www.marvell.com> 4264eaa0eSValentin Longchamp * Prafulla Wadaskar <prafulla@marvell.com> 5264eaa0eSValentin Longchamp * 6264eaa0eSValentin Longchamp * (C) Copyright 2009 7264eaa0eSValentin Longchamp * Stefan Roese, DENX Software Engineering, sr@denx.de. 8264eaa0eSValentin Longchamp * 9264eaa0eSValentin Longchamp * (C) Copyright 2010-2011 10264eaa0eSValentin Longchamp * Heiko Schocher, DENX Software Engineering, hs@denx.de. 11264eaa0eSValentin Longchamp * 121a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 13264eaa0eSValentin Longchamp */ 14264eaa0eSValentin Longchamp 15264eaa0eSValentin Longchamp /* 16264eaa0eSValentin Longchamp * for linking errors see 17264eaa0eSValentin Longchamp * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html 18264eaa0eSValentin Longchamp */ 19264eaa0eSValentin Longchamp 20264eaa0eSValentin Longchamp #ifndef _CONFIG_KM_ARM_H 21264eaa0eSValentin Longchamp #define _CONFIG_KM_ARM_H 22264eaa0eSValentin Longchamp 238e59f8bbSValentin Longchamp 248620ca2aSValentin Longchamp /* We got removed from Linux mach-types.h */ 258620ca2aSValentin Longchamp #define MACH_TYPE_KM_KIRKWOOD 2255 268620ca2aSValentin Longchamp 27264eaa0eSValentin Longchamp /* 28264eaa0eSValentin Longchamp * High Level Configuration Options (easy to change) 29264eaa0eSValentin Longchamp */ 30264eaa0eSValentin Longchamp #define CONFIG_MARVELL 31264eaa0eSValentin Longchamp #define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ 32264eaa0eSValentin Longchamp #define CONFIG_KW88F6281 /* SOC Name */ 33264eaa0eSValentin Longchamp #define CONFIG_MACH_KM_KIRKWOOD /* Machine type */ 34264eaa0eSValentin Longchamp 358620ca2aSValentin Longchamp #define CONFIG_MACH_TYPE MACH_TYPE_KM_KIRKWOOD 368620ca2aSValentin Longchamp 37dfeafde4SHolger Brunck #define CONFIG_NAND_ECC_BCH 38dfeafde4SHolger Brunck #define CONFIG_BCH 39dfeafde4SHolger Brunck 40264eaa0eSValentin Longchamp /* include common defines/options for all Keymile boards */ 41264eaa0eSValentin Longchamp #include "keymile-common.h" 42264eaa0eSValentin Longchamp 43b5befd82SHolger Brunck #define CONFIG_CMD_NAND 44b5befd82SHolger Brunck #define CONFIG_CMD_SF 45b5befd82SHolger Brunck 46f46b4a1aSValentin Longchamp /* SPI NOR Flash default params, used by sf commands */ 47f46b4a1aSValentin Longchamp #define CONFIG_SF_DEFAULT_SPEED 8100000 48f46b4a1aSValentin Longchamp #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 49f46b4a1aSValentin Longchamp 508170aefcSHolger Brunck #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR 518170aefcSHolger Brunck #define CONFIG_ENV_SPI_BUS 0 528170aefcSHolger Brunck #define CONFIG_ENV_SPI_CS 0 5305c8e81fSValentin Longchamp #define CONFIG_ENV_SPI_MAX_HZ 8100000 548170aefcSHolger Brunck #define CONFIG_ENV_SPI_MODE SPI_MODE_3 558170aefcSHolger Brunck #endif 568170aefcSHolger Brunck 57ac5b00e0SValentin Longchamp /* Reserve 4 MB for malloc */ 58ac5b00e0SValentin Longchamp #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 59ac5b00e0SValentin Longchamp 60b5befd82SHolger Brunck #include "asm/arch/config.h" 61b5befd82SHolger Brunck 62e5847b77SValentin Longchamp #define CONFIG_SYS_TEXT_BASE 0x07d00000 /* code address before reloc */ 63264eaa0eSValentin Longchamp #define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ 64264eaa0eSValentin Longchamp #define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ 65264eaa0eSValentin Longchamp #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ 66264eaa0eSValentin Longchamp 67264eaa0eSValentin Longchamp /* pseudo-non volatile RAM [hex] */ 68264eaa0eSValentin Longchamp #define CONFIG_KM_PNVRAM 0x80000 69264eaa0eSValentin Longchamp /* physical RAM MTD size [hex] */ 70264eaa0eSValentin Longchamp #define CONFIG_KM_PHRAM 0x17F000 71264eaa0eSValentin Longchamp 72264eaa0eSValentin Longchamp #define CONFIG_KM_CRAMFS_ADDR 0x2400000 737b2268b8SGerlando Falauto #define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 3098KBytes */ 747b2268b8SGerlando Falauto #define CONFIG_KM_FDT_ADDR 0x23E0000 /* 128KBytes */ 75264eaa0eSValentin Longchamp 76db0bb572SHolger Brunck /* architecture specific default bootargs */ 77db0bb572SHolger Brunck #define CONFIG_KM_DEF_BOOT_ARGS_CPU \ 7866072a8cSHolger Brunck "bootcountaddr=${bootcountaddr} ${mtdparts}" \ 7966072a8cSHolger Brunck " boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}" 80db0bb572SHolger Brunck 81264eaa0eSValentin Longchamp #define CONFIG_KM_DEF_ENV_CPU \ 8293ea89f0SMarek Vasut "u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0" \ 83af85f085SHolger Brunck CONFIG_KM_UPDATE_UBOOT \ 84b1c2a7aeSGerlando Falauto "set_fdthigh=setenv fdt_high ${kernelmem}\0" \ 85*c6d32dfdSValentin Longchamp "checkfdt=" \ 86*c6d32dfdSValentin Longchamp "if cramfsls fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb; " \ 87*c6d32dfdSValentin Longchamp "then true; else setenv cramfsloadfdt true; " \ 88*c6d32dfdSValentin Longchamp "setenv boot bootm ${load_addr_r}; " \ 89*c6d32dfdSValentin Longchamp "echo No FDT found, booting with the kernel " \ 90*c6d32dfdSValentin Longchamp "appended one; fi\0" \ 91264eaa0eSValentin Longchamp "" 92264eaa0eSValentin Longchamp 93264eaa0eSValentin Longchamp #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ 94264eaa0eSValentin Longchamp #define CONFIG_MISC_INIT_R 95264eaa0eSValentin Longchamp 967b2268b8SGerlando Falauto /* Pass open firmware flat tree */ 977b2268b8SGerlando Falauto #define CONFIG_OF_LIBFDT 987b2268b8SGerlando Falauto 99264eaa0eSValentin Longchamp /* 100264eaa0eSValentin Longchamp * NS16550 Configuration 101264eaa0eSValentin Longchamp */ 102264eaa0eSValentin Longchamp #define CONFIG_SYS_NS16550 103264eaa0eSValentin Longchamp #define CONFIG_SYS_NS16550_SERIAL 104264eaa0eSValentin Longchamp #define CONFIG_SYS_NS16550_REG_SIZE (-4) 105264eaa0eSValentin Longchamp #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK 106264eaa0eSValentin Longchamp #define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE 1073d3c7096SHolger Brunck #define CONFIG_SYS_NS16550_COM2 KW_UART1_BASE 108264eaa0eSValentin Longchamp 109264eaa0eSValentin Longchamp /* 110264eaa0eSValentin Longchamp * Serial Port configuration 111264eaa0eSValentin Longchamp * The following definitions let you select what serial you want to use 112264eaa0eSValentin Longchamp * for your console driver. 113264eaa0eSValentin Longchamp */ 114264eaa0eSValentin Longchamp 115264eaa0eSValentin Longchamp #define CONFIG_CONS_INDEX 1 /* Console on UART0 */ 116264eaa0eSValentin Longchamp 117264eaa0eSValentin Longchamp /* 118264eaa0eSValentin Longchamp * For booting Linux, the board info and command line data 119264eaa0eSValentin Longchamp * have to be in the first 8 MB of memory, since this is 120264eaa0eSValentin Longchamp * the maximum mapped by the Linux kernel during initialization. 121264eaa0eSValentin Longchamp */ 122264eaa0eSValentin Longchamp #define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */ 123264eaa0eSValentin Longchamp #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 124264eaa0eSValentin Longchamp #define CONFIG_INITRD_TAG /* enable INITRD tag */ 125264eaa0eSValentin Longchamp #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ 126264eaa0eSValentin Longchamp 127264eaa0eSValentin Longchamp /* 128264eaa0eSValentin Longchamp * Commands configuration 129264eaa0eSValentin Longchamp */ 130264eaa0eSValentin Longchamp #define CONFIG_CMD_MTDPARTS 131264eaa0eSValentin Longchamp 132264eaa0eSValentin Longchamp /* 133264eaa0eSValentin Longchamp * Without NOR FLASH we need this 134264eaa0eSValentin Longchamp */ 135264eaa0eSValentin Longchamp #define CONFIG_SYS_NO_FLASH 136264eaa0eSValentin Longchamp 137264eaa0eSValentin Longchamp /* 138264eaa0eSValentin Longchamp * NAND Flash configuration 139264eaa0eSValentin Longchamp */ 140264eaa0eSValentin Longchamp #define CONFIG_SYS_MAX_NAND_DEVICE 1 141264eaa0eSValentin Longchamp 142264eaa0eSValentin Longchamp #define BOOTFLASH_START 0x0 143264eaa0eSValentin Longchamp 1443d3c7096SHolger Brunck /* Kirkwood has two serial IF */ 1453d3c7096SHolger Brunck #if (CONFIG_CONS_INDEX == 2) 1463d3c7096SHolger Brunck #define CONFIG_KM_CONSOLE_TTY "ttyS1" 1473d3c7096SHolger Brunck #else 148264eaa0eSValentin Longchamp #define CONFIG_KM_CONSOLE_TTY "ttyS0" 1493d3c7096SHolger Brunck #endif 150264eaa0eSValentin Longchamp 151264eaa0eSValentin Longchamp /* 152264eaa0eSValentin Longchamp * Other required minimal configurations 153264eaa0eSValentin Longchamp */ 154264eaa0eSValentin Longchamp #define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ 155264eaa0eSValentin Longchamp #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ 156264eaa0eSValentin Longchamp #define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ 157264eaa0eSValentin Longchamp #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ 158264eaa0eSValentin Longchamp #define CONFIG_NR_DRAM_BANKS 4 159264eaa0eSValentin Longchamp #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ 160264eaa0eSValentin Longchamp 161264eaa0eSValentin Longchamp /* 162264eaa0eSValentin Longchamp * Ethernet Driver configuration 163264eaa0eSValentin Longchamp */ 164264eaa0eSValentin Longchamp #define CONFIG_NETCONSOLE /* include NetConsole support */ 165264eaa0eSValentin Longchamp #define CONFIG_MII /* expose smi ove miiphy interface */ 166002ec08dSValentin Longchamp #define CONFIG_CMD_MII /* to debug mdio phy config */ 167264eaa0eSValentin Longchamp #define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */ 168264eaa0eSValentin Longchamp #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ 169264eaa0eSValentin Longchamp #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ 170264eaa0eSValentin Longchamp #define CONFIG_PHY_BASE_ADR 0 171264eaa0eSValentin Longchamp #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ 17299f6249aSValentin Longchamp #define CONFIG_KM_COMMON_ETH_INIT /* standard km ethernet_present for piggy */ 173264eaa0eSValentin Longchamp 174264eaa0eSValentin Longchamp /* 175264eaa0eSValentin Longchamp * UBI related stuff 176264eaa0eSValentin Longchamp */ 177264eaa0eSValentin Longchamp #define CONFIG_SYS_USE_UBI 178264eaa0eSValentin Longchamp 179264eaa0eSValentin Longchamp /* 180264eaa0eSValentin Longchamp * I2C related stuff 181264eaa0eSValentin Longchamp */ 182ea818dbbSHeiko Schocher #undef CONFIG_I2C_MVTWSI 183ea818dbbSHeiko Schocher #define CONFIG_SYS_I2C 184ea818dbbSHeiko Schocher #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ 1850a4f88b9SValentin Longchamp #define CONFIG_SYS_I2C_INIT_BOARD 186ea818dbbSHeiko Schocher 187264eaa0eSValentin Longchamp #define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */ 188ea818dbbSHeiko Schocher #define CONFIG_SYS_NUM_I2C_BUSES 6 189ea818dbbSHeiko Schocher #define CONFIG_SYS_I2C_MAX_HOPS 1 190ea818dbbSHeiko Schocher #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ 191ea818dbbSHeiko Schocher {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \ 192ea818dbbSHeiko Schocher {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \ 193ea818dbbSHeiko Schocher {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \ 194ea818dbbSHeiko Schocher {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \ 195ea818dbbSHeiko Schocher {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \ 196ea818dbbSHeiko Schocher } 197ea818dbbSHeiko Schocher 198264eaa0eSValentin Longchamp #ifndef __ASSEMBLY__ 199ea385723SMasahiro Yamada #include <asm/arch/gpio.h> 200264eaa0eSValentin Longchamp extern void __set_direction(unsigned pin, int high); 201264eaa0eSValentin Longchamp void set_sda(int state); 202264eaa0eSValentin Longchamp void set_scl(int state); 203264eaa0eSValentin Longchamp int get_sda(void); 204264eaa0eSValentin Longchamp int get_scl(void); 205264eaa0eSValentin Longchamp #define KM_KIRKWOOD_SDA_PIN 8 206264eaa0eSValentin Longchamp #define KM_KIRKWOOD_SCL_PIN 9 207c471d848SHolger Brunck #define KM_KIRKWOOD_SOFT_I2C_GPIOS 0x0300 208264eaa0eSValentin Longchamp #define KM_KIRKWOOD_ENV_WP 38 209264eaa0eSValentin Longchamp 210264eaa0eSValentin Longchamp #define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0) 211264eaa0eSValentin Longchamp #define I2C_TRISTATE __set_direction(KM_KIRKWOOD_SDA_PIN, 1) 212264eaa0eSValentin Longchamp #define I2C_READ (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0) 213264eaa0eSValentin Longchamp #define I2C_SDA(bit) kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit) 214264eaa0eSValentin Longchamp #define I2C_SCL(bit) kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit) 215264eaa0eSValentin Longchamp #endif 216264eaa0eSValentin Longchamp 2179e9c6d7cSHolger Brunck #define I2C_DELAY udelay(1) 218264eaa0eSValentin Longchamp #define I2C_SOFT_DECLARATIONS 219264eaa0eSValentin Longchamp 220ea818dbbSHeiko Schocher #define CONFIG_SYS_I2C_SOFT_SLAVE 0x0 221ea818dbbSHeiko Schocher #define CONFIG_SYS_I2C_SOFT_SPEED 100000 222264eaa0eSValentin Longchamp 2234daea6ffSStefan Bigler /* EEprom support 24C128, 24C256 valid for environment eeprom */ 2244daea6ffSStefan Bigler #define CONFIG_SYS_I2C_MULTI_EEPROMS 2254daea6ffSStefan Bigler #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE 2264daea6ffSStefan Bigler #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 Byte write page */ 2274daea6ffSStefan Bigler #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 2284daea6ffSStefan Bigler 229264eaa0eSValentin Longchamp #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 230264eaa0eSValentin Longchamp #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 231264eaa0eSValentin Longchamp 232264eaa0eSValentin Longchamp /* 233264eaa0eSValentin Longchamp * Environment variables configurations 234264eaa0eSValentin Longchamp */ 2358170aefcSHolger Brunck #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR 2368170aefcSHolger Brunck #define CONFIG_ENV_IS_IN_SPI_FLASH /* use SPI-Flash for environment vars */ 2378170aefcSHolger Brunck #define CONFIG_ENV_OFFSET 0xc0000 /* no bracets! */ 2388170aefcSHolger Brunck #define CONFIG_ENV_SIZE 0x02000 /* Size of Environment */ 2398170aefcSHolger Brunck #define CONFIG_ENV_SECT_SIZE 0x10000 2408170aefcSHolger Brunck #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 2418170aefcSHolger Brunck CONFIG_ENV_SECT_SIZE) 2428170aefcSHolger Brunck #define CONFIG_ENV_TOTAL_SIZE 0x20000 /* no bracets! */ 2438170aefcSHolger Brunck #else 244264eaa0eSValentin Longchamp #define CONFIG_ENV_IS_IN_EEPROM /* use EEPROM for environment vars */ 245264eaa0eSValentin Longchamp #define CONFIG_SYS_DEF_EEPROM_ADDR 0x50 246264eaa0eSValentin Longchamp #define CONFIG_ENV_EEPROM_IS_ON_I2C 247264eaa0eSValentin Longchamp #define CONFIG_SYS_EEPROM_WREN 248264eaa0eSValentin Longchamp #define CONFIG_ENV_OFFSET 0x0 /* no bracets! */ 249264eaa0eSValentin Longchamp #define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET) 250716e4ffeSValentin Longchamp #define CONFIG_I2C_ENV_EEPROM_BUS 5 /* I2C2 (Mux-Port 5) */ 251264eaa0eSValentin Longchamp #define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */ 252264eaa0eSValentin Longchamp #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 2538170aefcSHolger Brunck #endif 2548170aefcSHolger Brunck 2558170aefcSHolger Brunck #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 256264eaa0eSValentin Longchamp 257264eaa0eSValentin Longchamp #define CONFIG_SPI_FLASH_STMICRO 258264eaa0eSValentin Longchamp 2590c25defcSValentin Longchamp /* SPI bus claim MPP configuration */ 2600c25defcSValentin Longchamp #define CONFIG_SYS_KW_SPI_MPP 0x0 2610c25defcSValentin Longchamp 262264eaa0eSValentin Longchamp #define FLASH_GPIO_PIN 0x00010000 2630c25defcSValentin Longchamp #define KM_FLASH_GPIO_PIN 16 264264eaa0eSValentin Longchamp 265cf73639dSAndreas Huber #ifndef MTDIDS_DEFAULT 266264eaa0eSValentin Longchamp # define MTDIDS_DEFAULT "nand0=orion_nand" 267cf73639dSAndreas Huber #endif /* MTDIDS_DEFAULT */ 268cf73639dSAndreas Huber 269cf73639dSAndreas Huber #ifndef MTDPARTS_DEFAULT 270264eaa0eSValentin Longchamp # define MTDPARTS_DEFAULT "mtdparts=" \ 271264eaa0eSValentin Longchamp "orion_nand:" \ 272cf73639dSAndreas Huber "-(" CONFIG_KM_UBI_PARTITION_NAME_BOOT ");" 273cf73639dSAndreas Huber #endif /* MTDPARTS_DEFAULT */ 274264eaa0eSValentin Longchamp 275af85f085SHolger Brunck #define CONFIG_KM_UPDATE_UBOOT \ 276264eaa0eSValentin Longchamp "update=" \ 2770c25defcSValentin Longchamp "sf probe 0;sf erase 0 +${filesize};" \ 2780c25defcSValentin Longchamp "sf write ${load_addr_r} 0 ${filesize};\0" 279264eaa0eSValentin Longchamp 2808170aefcSHolger Brunck #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR 2818170aefcSHolger Brunck #define CONFIG_KM_NEW_ENV \ 2828170aefcSHolger Brunck "newenv=sf probe 0;" \ 28393ea89f0SMarek Vasut "sf erase " __stringify(CONFIG_ENV_OFFSET) " " \ 28493ea89f0SMarek Vasut __stringify(CONFIG_ENV_TOTAL_SIZE)"\0" 2858170aefcSHolger Brunck #else 2868170aefcSHolger Brunck #define CONFIG_KM_NEW_ENV \ 287ea616d4dSValentin Longchamp "newenv=setenv addr 0x100000 && " \ 28867bfae36SHolger Brunck "i2c dev " __stringify(CONFIG_I2C_ENV_EEPROM_BUS) "; " \ 28967bfae36SHolger Brunck "mw.b ${addr} 0 4 && " \ 29093ea89f0SMarek Vasut "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \ 29193ea89f0SMarek Vasut " ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && " \ 29293ea89f0SMarek Vasut "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \ 29393ea89f0SMarek Vasut " ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0" 2948170aefcSHolger Brunck #endif 2958170aefcSHolger Brunck 29656cde177SHolger Brunck #ifndef CONFIG_KM_BOARD_EXTRA_ENV 29756cde177SHolger Brunck #define CONFIG_KM_BOARD_EXTRA_ENV "" 29856cde177SHolger Brunck #endif 29956cde177SHolger Brunck 3008170aefcSHolger Brunck /* 3018170aefcSHolger Brunck * Default environment variables 3028170aefcSHolger Brunck */ 3038170aefcSHolger Brunck #define CONFIG_EXTRA_ENV_SETTINGS \ 30456cde177SHolger Brunck CONFIG_KM_BOARD_EXTRA_ENV \ 3058170aefcSHolger Brunck CONFIG_KM_DEF_ENV \ 3068170aefcSHolger Brunck CONFIG_KM_NEW_ENV \ 307b648bfc2SHolger Brunck "arch=arm\0" \ 308ea616d4dSValentin Longchamp "" 309ea616d4dSValentin Longchamp 310264eaa0eSValentin Longchamp #if defined(CONFIG_SYS_NO_FLASH) 311264eaa0eSValentin Longchamp #undef CONFIG_FLASH_CFI_MTD 312264eaa0eSValentin Longchamp #undef CONFIG_JFFS2_CMDLINE 313264eaa0eSValentin Longchamp #endif 314264eaa0eSValentin Longchamp 315264eaa0eSValentin Longchamp /* additions for new relocation code, must be added to all boards */ 316264eaa0eSValentin Longchamp #define CONFIG_SYS_SDRAM_BASE 0x00000000 317264eaa0eSValentin Longchamp /* Do early setups now in board_init_f() */ 318264eaa0eSValentin Longchamp #define CONFIG_BOARD_EARLY_INIT_F 319264eaa0eSValentin Longchamp 320264eaa0eSValentin Longchamp /* 321264eaa0eSValentin Longchamp * resereved pram area at the end of memroy [hex] 322264eaa0eSValentin Longchamp * 8Mbytes for switch + 4Kbytes for bootcount 323264eaa0eSValentin Longchamp */ 324264eaa0eSValentin Longchamp #define CONFIG_KM_RESERVED_PRAM 0x801000 325264eaa0eSValentin Longchamp /* address for the bootcount (taken from end of RAM) */ 326264eaa0eSValentin Longchamp #define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM) 3270044c42eSStefan Roese /* Use generic bootcount RAM driver */ 3280044c42eSStefan Roese #define CONFIG_BOOTCOUNT_RAM 329264eaa0eSValentin Longchamp 3309400f8faSValentin Longchamp /* enable POST tests */ 3319400f8faSValentin Longchamp #define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS) 3329400f8faSValentin Longchamp #define CONFIG_POST_SKIP_ENV_FLAGS 3339400f8faSValentin Longchamp #define CONFIG_POST_EXTERNAL_WORD_FUNCS 3349400f8faSValentin Longchamp #define CONFIG_CMD_DIAG 3359400f8faSValentin Longchamp 336b37f7724SValentin Longchamp /* we do the whole PCIe FPGA config stuff here */ 33745bd01efSHolger Brunck #define CONFIG_BOARD_LATE_INIT 338b37f7724SValentin Longchamp 339264eaa0eSValentin Longchamp #endif /* _CONFIG_KM_ARM_H */ 340