xref: /rk3399_rockchip-uboot/include/configs/k2hk_evm.h (revision ef509b9063fb702ce69d1a64ff293698a04075d6)
1*ef509b90SVitaly Andrianov /*
2*ef509b90SVitaly Andrianov  * Configuration header file for TI's k2hk-evm
3*ef509b90SVitaly Andrianov  *
4*ef509b90SVitaly Andrianov  * (C) Copyright 2012-2014
5*ef509b90SVitaly Andrianov  *     Texas Instruments Incorporated, <www.ti.com>
6*ef509b90SVitaly Andrianov  *
7*ef509b90SVitaly Andrianov  * SPDX-License-Identifier:     GPL-2.0+
8*ef509b90SVitaly Andrianov  */
9*ef509b90SVitaly Andrianov 
10*ef509b90SVitaly Andrianov #ifndef __CONFIG_K2HK_EVM_H
11*ef509b90SVitaly Andrianov #define __CONFIG_K2HK_EVM_H
12*ef509b90SVitaly Andrianov 
13*ef509b90SVitaly Andrianov /* Platform type */
14*ef509b90SVitaly Andrianov #define CONFIG_SOC_K2HK
15*ef509b90SVitaly Andrianov #define CONFIG_K2HK_EVM
16*ef509b90SVitaly Andrianov 
17*ef509b90SVitaly Andrianov /* U-Boot Build Configuration */
18*ef509b90SVitaly Andrianov #define CONFIG_SKIP_LOWLEVEL_INIT       /* U-Boot is a 2nd stage loader */
19*ef509b90SVitaly Andrianov #define CONFIG_SYS_NO_FLASH             /* that is, no *NOR* flash */
20*ef509b90SVitaly Andrianov #define CONFIG_SYS_CONSOLE_INFO_QUIET
21*ef509b90SVitaly Andrianov #define CONFIG_BOARD_EARLY_INIT_F
22*ef509b90SVitaly Andrianov #define CONFIG_SYS_THUMB_BUILD
23*ef509b90SVitaly Andrianov 
24*ef509b90SVitaly Andrianov /* SoC Configuration */
25*ef509b90SVitaly Andrianov #define CONFIG_ARMV7
26*ef509b90SVitaly Andrianov #define CONFIG_ARCH_CPU_INIT
27*ef509b90SVitaly Andrianov #define CONFIG_SYS_ARCH_TIMER
28*ef509b90SVitaly Andrianov #define CONFIG_SYS_HZ                   1000
29*ef509b90SVitaly Andrianov #define CONFIG_SYS_TEXT_BASE            0x0c001000
30*ef509b90SVitaly Andrianov #define CONFIG_SPL_TARGET               "u-boot-spi.gph"
31*ef509b90SVitaly Andrianov #define CONFIG_SYS_DCACHE_OFF
32*ef509b90SVitaly Andrianov 
33*ef509b90SVitaly Andrianov /* Memory Configuration */
34*ef509b90SVitaly Andrianov #define CONFIG_NR_DRAM_BANKS            2
35*ef509b90SVitaly Andrianov #define CONFIG_SYS_SDRAM_BASE           0x80000000
36*ef509b90SVitaly Andrianov #define CONFIG_SYS_LPAE_SDRAM_BASE      0x800000000
37*ef509b90SVitaly Andrianov #define CONFIG_MAX_RAM_BANK_SIZE        (2 << 30)       /* 2GB */
38*ef509b90SVitaly Andrianov #define CONFIG_STACKSIZE                (512 << 10)     /* 512 KiB */
39*ef509b90SVitaly Andrianov #define CONFIG_SYS_MALLOC_LEN           (4 << 20)       /* 4 MiB */
40*ef509b90SVitaly Andrianov #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_TEXT_BASE - \
41*ef509b90SVitaly Andrianov 					 GENERATED_GBL_DATA_SIZE)
42*ef509b90SVitaly Andrianov 
43*ef509b90SVitaly Andrianov /* SPL SPI Loader Configuration */
44*ef509b90SVitaly Andrianov #define CONFIG_SPL_TEXT_BASE            0x0c200000
45*ef509b90SVitaly Andrianov #define CONFIG_SPL_PAD_TO               65536
46*ef509b90SVitaly Andrianov #define CONFIG_SPL_MAX_SIZE             (CONFIG_SPL_PAD_TO - 8)
47*ef509b90SVitaly Andrianov #define CONFIG_SPL_BSS_START_ADDR       (CONFIG_SPL_TEXT_BASE + \
48*ef509b90SVitaly Andrianov 					 CONFIG_SPL_MAX_SIZE)
49*ef509b90SVitaly Andrianov #define CONFIG_SPL_BSS_MAX_SIZE         (32 * 1024)
50*ef509b90SVitaly Andrianov #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
51*ef509b90SVitaly Andrianov 					 CONFIG_SPL_BSS_MAX_SIZE)
52*ef509b90SVitaly Andrianov #define CONFIG_SYS_SPL_MALLOC_SIZE      (32 * 1024)
53*ef509b90SVitaly Andrianov #define CONFIG_SPL_STACK_SIZE           (8 * 1024)
54*ef509b90SVitaly Andrianov #define CONFIG_SPL_STACK                (CONFIG_SYS_SPL_MALLOC_START + \
55*ef509b90SVitaly Andrianov 					 CONFIG_SYS_SPL_MALLOC_SIZE + \
56*ef509b90SVitaly Andrianov 					 CONFIG_SPL_STACK_SIZE - 4)
57*ef509b90SVitaly Andrianov #define CONFIG_SPL_LIBCOMMON_SUPPORT
58*ef509b90SVitaly Andrianov #define CONFIG_SPL_LIBGENERIC_SUPPORT
59*ef509b90SVitaly Andrianov #define CONFIG_SPL_SERIAL_SUPPORT
60*ef509b90SVitaly Andrianov #define CONFIG_SPL_SPI_FLASH_SUPPORT
61*ef509b90SVitaly Andrianov #define CONFIG_SPL_SPI_SUPPORT
62*ef509b90SVitaly Andrianov #define CONFIG_SPL_BOARD_INIT
63*ef509b90SVitaly Andrianov #define CONFIG_SPL_SPI_LOAD
64*ef509b90SVitaly Andrianov #define CONFIG_SPL_SPI_BUS              0
65*ef509b90SVitaly Andrianov #define CONFIG_SPL_SPI_CS               0
66*ef509b90SVitaly Andrianov #define CONFIG_SYS_SPI_U_BOOT_OFFS      CONFIG_SPL_PAD_TO
67*ef509b90SVitaly Andrianov #define CONFIG_SPL_FRAMEWORK
68*ef509b90SVitaly Andrianov 
69*ef509b90SVitaly Andrianov /* UART Configuration */
70*ef509b90SVitaly Andrianov #define CONFIG_SYS_NS16550
71*ef509b90SVitaly Andrianov #define CONFIG_SYS_NS16550_SERIAL
72*ef509b90SVitaly Andrianov #define CONFIG_SYS_NS16550_MEM32
73*ef509b90SVitaly Andrianov #define CONFIG_SYS_NS16550_REG_SIZE     -4
74*ef509b90SVitaly Andrianov #define CONFIG_SYS_NS16550_COM1         K2HK_UART0_BASE
75*ef509b90SVitaly Andrianov #define CONFIG_SYS_NS16550_CLK          clk_get_rate(K2HK_CLK1_6)
76*ef509b90SVitaly Andrianov #define CONFIG_CONS_INDEX               1
77*ef509b90SVitaly Andrianov #define CONFIG_BAUDRATE                 115200
78*ef509b90SVitaly Andrianov 
79*ef509b90SVitaly Andrianov /* SPI Configuration */
80*ef509b90SVitaly Andrianov #define CONFIG_SPI
81*ef509b90SVitaly Andrianov #define CONFIG_SPI_FLASH
82*ef509b90SVitaly Andrianov #define CONFIG_SPI_FLASH_STMICRO
83*ef509b90SVitaly Andrianov #define CONFIG_DAVINCI_SPI
84*ef509b90SVitaly Andrianov #define CONFIG_SYS_SPI_BASE             K2HK_SPI_BASE
85*ef509b90SVitaly Andrianov #define CONFIG_SYS_SPI_CLK              clk_get_rate(K2HK_LPSC_EMIF25_SPI)
86*ef509b90SVitaly Andrianov #define CONFIG_SF_DEFAULT_SPEED         30000000
87*ef509b90SVitaly Andrianov #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
88*ef509b90SVitaly Andrianov 
89*ef509b90SVitaly Andrianov /* I2C Configuration */
90*ef509b90SVitaly Andrianov #define CONFIG_SYS_I2C
91*ef509b90SVitaly Andrianov #define CONFIG_SYS_I2C_DAVINCI
92*ef509b90SVitaly Andrianov #define CONFIG_SYS_DAVINCI_I2C_SPEED    100000
93*ef509b90SVitaly Andrianov #define CONFIG_SYS_DAVINCI_I2C_SLAVE    0x10 /* SMBus host address */
94*ef509b90SVitaly Andrianov #define CONFIG_SYS_DAVINCI_I2C_SPEED1   100000
95*ef509b90SVitaly Andrianov #define CONFIG_SYS_DAVINCI_I2C_SLAVE1   0x10 /* SMBus host address */
96*ef509b90SVitaly Andrianov #define CONFIG_SYS_DAVINCI_I2C_SPEED2   100000
97*ef509b90SVitaly Andrianov #define CONFIG_SYS_DAVINCI_I2C_SLAVE2   0x10 /* SMBus host address */
98*ef509b90SVitaly Andrianov #define I2C_BUS_MAX                     3
99*ef509b90SVitaly Andrianov 
100*ef509b90SVitaly Andrianov /* EEPROM definitions */
101*ef509b90SVitaly Andrianov #define CONFIG_SYS_I2C_MULTI_EEPROMS
102*ef509b90SVitaly Andrianov #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN         2
103*ef509b90SVitaly Andrianov #define CONFIG_SYS_I2C_EEPROM_ADDR             0x50
104*ef509b90SVitaly Andrianov #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS      6
105*ef509b90SVitaly Andrianov #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  20
106*ef509b90SVitaly Andrianov #define CONFIG_ENV_EEPROM_IS_ON_I2C
107*ef509b90SVitaly Andrianov 
108*ef509b90SVitaly Andrianov /* NAND Configuration */
109*ef509b90SVitaly Andrianov #define CONFIG_NAND_DAVINCI
110*ef509b90SVitaly Andrianov #define CONFIG_SYS_NAND_CS                     2
111*ef509b90SVitaly Andrianov #define CONFIG_SYS_NAND_USE_FLASH_BBT
112*ef509b90SVitaly Andrianov #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
113*ef509b90SVitaly Andrianov #define CONFIG_SYS_NAND_PAGE_2K
114*ef509b90SVitaly Andrianov 
115*ef509b90SVitaly Andrianov #define CONFIG_SYS_NAND_LARGEPAGE
116*ef509b90SVitaly Andrianov #define CONFIG_SYS_NAND_BASE_LIST       { 0x30000000, }
117*ef509b90SVitaly Andrianov #define CONFIG_SYS_MAX_NAND_DEVICE      1
118*ef509b90SVitaly Andrianov #define CONFIG_SYS_NAND_MAX_CHIPS       1
119*ef509b90SVitaly Andrianov #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
120*ef509b90SVitaly Andrianov #define CONFIG_ENV_SIZE                 (256 << 10)  /* 256 KiB */
121*ef509b90SVitaly Andrianov #define CONFIG_ENV_IS_IN_NAND
122*ef509b90SVitaly Andrianov #define CONFIG_ENV_OFFSET               0x100000
123*ef509b90SVitaly Andrianov #define CONFIG_MTD_PARTITIONS
124*ef509b90SVitaly Andrianov #define CONFIG_MTD_DEVICE
125*ef509b90SVitaly Andrianov #define CONFIG_RBTREE
126*ef509b90SVitaly Andrianov #define CONFIG_LZO
127*ef509b90SVitaly Andrianov #define MTDPARTS_DEFAULT                "mtdparts=davinci_nand.0:" \
128*ef509b90SVitaly Andrianov 					"1024k(bootloader)ro,512k(params)ro," \
129*ef509b90SVitaly Andrianov 					"-(ubifs)"
130*ef509b90SVitaly Andrianov /* U-Boot command configuration */
131*ef509b90SVitaly Andrianov #include <config_cmd_default.h>
132*ef509b90SVitaly Andrianov #define CONFIG_CMD_ASKENV
133*ef509b90SVitaly Andrianov #define CONFIG_CMD_DHCP
134*ef509b90SVitaly Andrianov #define CONFIG_CMD_I2C
135*ef509b90SVitaly Andrianov #define CONFIG_CMD_PING
136*ef509b90SVitaly Andrianov #define CONFIG_CMD_SAVES
137*ef509b90SVitaly Andrianov #define CONFIG_CMD_MTDPARTS
138*ef509b90SVitaly Andrianov #define CONFIG_CMD_NAND
139*ef509b90SVitaly Andrianov #define CONFIG_CMD_UBI
140*ef509b90SVitaly Andrianov #define CONFIG_CMD_UBIFS
141*ef509b90SVitaly Andrianov #define CONFIG_CMD_SF
142*ef509b90SVitaly Andrianov #define CONFIG_CMD_EEPROM
143*ef509b90SVitaly Andrianov 
144*ef509b90SVitaly Andrianov /* U-Boot general configuration */
145*ef509b90SVitaly Andrianov #define CONFIG_SYS_PROMPT               "K2HK EVM # "
146*ef509b90SVitaly Andrianov #define CONFIG_SYS_CBSIZE               1024
147*ef509b90SVitaly Andrianov #define CONFIG_SYS_PBSIZE		2048
148*ef509b90SVitaly Andrianov #define CONFIG_SYS_MAXARGS              16
149*ef509b90SVitaly Andrianov #define CONFIG_SYS_HUSH_PARSER
150*ef509b90SVitaly Andrianov #define CONFIG_SYS_LONGHELP
151*ef509b90SVitaly Andrianov #define CONFIG_CRC32_VERIFY
152*ef509b90SVitaly Andrianov #define CONFIG_MX_CYCLIC
153*ef509b90SVitaly Andrianov #define CONFIG_CMDLINE_EDITING
154*ef509b90SVitaly Andrianov #define CONFIG_VERSION_VARIABLE
155*ef509b90SVitaly Andrianov #define CONFIG_TIMESTAMP
156*ef509b90SVitaly Andrianov 
157*ef509b90SVitaly Andrianov #define CONFIG_BOOTDELAY                3
158*ef509b90SVitaly Andrianov #define CONFIG_BOOTFILE                 "uImage"
159*ef509b90SVitaly Andrianov #define CONFIG_EXTRA_ENV_SETTINGS					\
160*ef509b90SVitaly Andrianov 	"boot=ramfs\0"							\
161*ef509b90SVitaly Andrianov 	"tftp_root=/\0"							\
162*ef509b90SVitaly Andrianov 	"nfs_root=/export\0"						\
163*ef509b90SVitaly Andrianov 	"mem_lpae=1\0"							\
164*ef509b90SVitaly Andrianov 	"mem_reserve=512M\0"						\
165*ef509b90SVitaly Andrianov 	"addr_fdt=0x87000000\0"						\
166*ef509b90SVitaly Andrianov 	"addr_kern=0x88000000\0"					\
167*ef509b90SVitaly Andrianov 	"addr_mon=0x0c5f0000\0"						\
168*ef509b90SVitaly Andrianov 	"addr_uboot=0x87000000\0"					\
169*ef509b90SVitaly Andrianov 	"addr_fs=0x82000000\0"						\
170*ef509b90SVitaly Andrianov 	"addr_ubi=0x82000000\0"						\
171*ef509b90SVitaly Andrianov 	"fdt_high=0xffffffff\0"						\
172*ef509b90SVitaly Andrianov 	"run_mon=mon_install ${addr_mon}\0"				\
173*ef509b90SVitaly Andrianov 	"run_kern=bootm ${addr_kern} - ${addr_fdt}\0"			\
174*ef509b90SVitaly Andrianov 	"init_ubi=run args_all args_ubi; "				\
175*ef509b90SVitaly Andrianov 		"ubi part ubifs; ubifsmount boot\0"			\
176*ef509b90SVitaly Andrianov 	"get_fdt_ubi=ubifsload ${addr_fdt} ${name_fdt}\0"		\
177*ef509b90SVitaly Andrianov 	"get_kern_ubi=ubifsload ${addr_kern} ${name_kern}\0"		\
178*ef509b90SVitaly Andrianov 	"get_mon_ubi=ubifsload ${addr_mon} ${name_mon}\0"		\
179*ef509b90SVitaly Andrianov 	"burn_uboot=sf probe; sf erase 0 0x100000; "			\
180*ef509b90SVitaly Andrianov 		"sf write ${addr_uboot} 0 ${filesize}\0"		\
181*ef509b90SVitaly Andrianov 	"args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1\0"	\
182*ef509b90SVitaly Andrianov 	"args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs "	\
183*ef509b90SVitaly Andrianov 		"root=ubi0:rootfs rootflags=sync rw ubi.mtd=2,2048\0"	\
184*ef509b90SVitaly Andrianov 	"burn_ubi=nand erase.part ubifs; "				\
185*ef509b90SVitaly Andrianov 		"nand write ${addr_ubi} ubifs ${filesize}\0"		\
186*ef509b90SVitaly Andrianov 	"init_ramfs=run args_all args_ramfs get_fs_ramfs\0"		\
187*ef509b90SVitaly Andrianov 	"args_ramfs=setenv bootargs ${bootargs} earlyprintk "		\
188*ef509b90SVitaly Andrianov 		"rdinit=/sbin/init rw root=/dev/ram0 "			\
189*ef509b90SVitaly Andrianov 		"initrd=0x802000000,9M\0"				\
190*ef509b90SVitaly Andrianov 	"mtdparts=mtdparts=davinci_nand.0:"				\
191*ef509b90SVitaly Andrianov 		"1024k(bootloader)ro,512k(params)ro,522752k(ubifs)\0"
192*ef509b90SVitaly Andrianov #define CONFIG_BOOTCOMMAND						\
193*ef509b90SVitaly Andrianov 	"run init_${boot} get_fdt_${boot} get_mon_${boot} "		\
194*ef509b90SVitaly Andrianov 		"get_kern_${boot} run_mon run_kern"
195*ef509b90SVitaly Andrianov #define CONFIG_BOOTARGS							\
196*ef509b90SVitaly Andrianov 
197*ef509b90SVitaly Andrianov /* Linux interfacing */
198*ef509b90SVitaly Andrianov #define CONFIG_CMDLINE_TAG
199*ef509b90SVitaly Andrianov #define CONFIG_SETUP_MEMORY_TAGS
200*ef509b90SVitaly Andrianov #define CONFIG_OF_LIBFDT                1
201*ef509b90SVitaly Andrianov #define CONFIG_OF_BOARD_SETUP
202*ef509b90SVitaly Andrianov #define CONFIG_SYS_BARGSIZE             1024
203*ef509b90SVitaly Andrianov #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 0x08000000)
204*ef509b90SVitaly Andrianov 
205*ef509b90SVitaly Andrianov #define CONFIG_SUPPORT_RAW_INITRD
206*ef509b90SVitaly Andrianov 
207*ef509b90SVitaly Andrianov /* we may include files below only after all above definitions */
208*ef509b90SVitaly Andrianov #include <asm/arch/hardware.h>
209*ef509b90SVitaly Andrianov #include <asm/arch/clock.h>
210*ef509b90SVitaly Andrianov #define CONFIG_SYS_HZ_CLOCK             clk_get_rate(K2HK_CLK1_6)
211*ef509b90SVitaly Andrianov 
212*ef509b90SVitaly Andrianov #endif /* __CONFIG_K2HK_EVM_H */
213