xref: /rk3399_rockchip-uboot/include/configs/jetson-tk1.h (revision 21f0fd245e311fdb0d8a79747437595d9fab1536)
1e04bfdacSStephen Warren /*
2e04bfdacSStephen Warren  * (C) Copyright 2013-2014
3e04bfdacSStephen Warren  * NVIDIA Corporation <www.nvidia.com>
4e04bfdacSStephen Warren  *
5e04bfdacSStephen Warren  * SPDX-License-Identifier:     GPL-2.0
6e04bfdacSStephen Warren  */
7e04bfdacSStephen Warren 
8e04bfdacSStephen Warren #ifndef __CONFIG_H
9e04bfdacSStephen Warren #define __CONFIG_H
10e04bfdacSStephen Warren 
11e04bfdacSStephen Warren #include <linux/sizes.h>
12e04bfdacSStephen Warren 
136e2fca94SThierry Reding /* enable PMIC */
146e2fca94SThierry Reding #define CONFIG_AS3722_POWER
156e2fca94SThierry Reding 
16e04bfdacSStephen Warren #include "tegra124-common.h"
17e04bfdacSStephen Warren 
18e04bfdacSStephen Warren /* High-level configuration options */
19e04bfdacSStephen Warren #define V_PROMPT			"Tegra124 (Jetson TK1) # "
20e04bfdacSStephen Warren #define CONFIG_TEGRA_BOARD_STRING	"NVIDIA Jetson TK1"
21e04bfdacSStephen Warren 
22e04bfdacSStephen Warren /* Board-specific serial config */
23e04bfdacSStephen Warren #define CONFIG_SERIAL_MULTI
24e04bfdacSStephen Warren #define CONFIG_TEGRA_ENABLE_UARTD
25e04bfdacSStephen Warren #define CONFIG_SYS_NS16550_COM1		NV_PA_APB_UARTD_BASE
26e04bfdacSStephen Warren 
27e04bfdacSStephen Warren /* I2C */
28e04bfdacSStephen Warren #define CONFIG_SYS_I2C_TEGRA
29e04bfdacSStephen Warren #define CONFIG_CMD_I2C
30e04bfdacSStephen Warren 
31e04bfdacSStephen Warren /* SD/MMC */
32e04bfdacSStephen Warren #define CONFIG_MMC
33e04bfdacSStephen Warren #define CONFIG_GENERIC_MMC
34e04bfdacSStephen Warren #define CONFIG_TEGRA_MMC
35e04bfdacSStephen Warren #define CONFIG_CMD_MMC
36e04bfdacSStephen Warren 
37e04bfdacSStephen Warren /* Environment in eMMC, at the end of 2nd "boot sector" */
38e04bfdacSStephen Warren #define CONFIG_ENV_IS_IN_MMC
39e04bfdacSStephen Warren #define CONFIG_ENV_OFFSET		(-CONFIG_ENV_SIZE)
40e04bfdacSStephen Warren #define CONFIG_SYS_MMC_ENV_DEV		0
41e04bfdacSStephen Warren #define CONFIG_SYS_MMC_ENV_PART		2
42e04bfdacSStephen Warren 
43e04bfdacSStephen Warren /* SPI */
44e04bfdacSStephen Warren #define CONFIG_TEGRA114_SPI		/* Compatible w/ Tegra114 SPI */
45e04bfdacSStephen Warren #define CONFIG_TEGRA114_SPI_CTRLS	6
46e04bfdacSStephen Warren #define CONFIG_SPI_FLASH
47e04bfdacSStephen Warren #define CONFIG_SPI_FLASH_WINBOND
48e04bfdacSStephen Warren #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
49e04bfdacSStephen Warren #define CONFIG_SF_DEFAULT_SPEED		24000000
50e04bfdacSStephen Warren #define CONFIG_CMD_SPI
51e04bfdacSStephen Warren #define CONFIG_CMD_SF
52e04bfdacSStephen Warren #define CONFIG_SPI_FLASH_SIZE		(4 << 20)
53e04bfdacSStephen Warren 
54e04bfdacSStephen Warren /* USB Host support */
55e04bfdacSStephen Warren #define CONFIG_USB_EHCI
56e04bfdacSStephen Warren #define CONFIG_USB_EHCI_TEGRA
57e6607cffSStephen Warren #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
58e04bfdacSStephen Warren #define CONFIG_USB_STORAGE
59e04bfdacSStephen Warren #define CONFIG_CMD_USB
60e04bfdacSStephen Warren 
61e04bfdacSStephen Warren /* USB networking support */
62e04bfdacSStephen Warren #define CONFIG_USB_HOST_ETHER
63e04bfdacSStephen Warren #define CONFIG_USB_ETHER_ASIX
64e04bfdacSStephen Warren 
656e2fca94SThierry Reding /* PCI host support */
666e2fca94SThierry Reding #define CONFIG_PCI
676e2fca94SThierry Reding #define CONFIG_PCI_TEGRA
686e2fca94SThierry Reding #define CONFIG_PCI_PNP
696e2fca94SThierry Reding #define CONFIG_CMD_PCI
706e2fca94SThierry Reding #define CONFIG_CMD_PCI_ENUM
716e2fca94SThierry Reding 
726e2fca94SThierry Reding /* PCI networking support */
736e2fca94SThierry Reding #define CONFIG_RTL8169
746e2fca94SThierry Reding 
75e04bfdacSStephen Warren /* General networking support */
76e04bfdacSStephen Warren #define CONFIG_CMD_NET
77e04bfdacSStephen Warren #define CONFIG_CMD_DHCP
78e04bfdacSStephen Warren 
7939446bceSStephen Warren #include "tegra-common-usb-gadget.h"
80e04bfdacSStephen Warren #include "tegra-common-post.h"
81e04bfdacSStephen Warren 
82*21f0fd24SIan Campbell #define CONFIG_ARMV7_PSCI			1
83*21f0fd24SIan Campbell /* Reserve top 1M for secure RAM */
84*21f0fd24SIan Campbell #define CONFIG_ARMV7_SECURE_BASE		0xfff00000
85*21f0fd24SIan Campbell #define CONFIG_ARMV7_SECURE_RESERVE_SIZE	0x00100000
86*21f0fd24SIan Campbell 
87e04bfdacSStephen Warren #endif /* __CONFIG_H */
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