1*3d3befa7Swdenk /* 2*3d3befa7Swdenk * (C) Copyright 2003 3*3d3befa7Swdenk * Texas Instruments. 4*3d3befa7Swdenk * Kshitij Gupta <kshitij@ti.com> 5*3d3befa7Swdenk * Configuation settings for the TI OMAP Innovator board. 6*3d3befa7Swdenk * 7*3d3befa7Swdenk * (C) Copyright 2004 8*3d3befa7Swdenk * ARM Ltd. 9*3d3befa7Swdenk * Philippe Robin, <philippe.robin@arm.com> 10*3d3befa7Swdenk * Configuration for Compact Integrator board. 11*3d3befa7Swdenk * 12*3d3befa7Swdenk * See file CREDITS for list of people who contributed to this 13*3d3befa7Swdenk * project. 14*3d3befa7Swdenk * 15*3d3befa7Swdenk * This program is free software; you can redistribute it and/or 16*3d3befa7Swdenk * modify it under the terms of the GNU General Public License as 17*3d3befa7Swdenk * published by the Free Software Foundation; either version 2 of 18*3d3befa7Swdenk * the License, or (at your option) any later version. 19*3d3befa7Swdenk * 20*3d3befa7Swdenk * This program is distributed in the hope that it will be useful, 21*3d3befa7Swdenk * but WITHOUT ANY WARRANTY; without even the implied warranty of 22*3d3befa7Swdenk * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23*3d3befa7Swdenk * GNU General Public License for more details. 24*3d3befa7Swdenk * 25*3d3befa7Swdenk * You should have received a copy of the GNU General Public License 26*3d3befa7Swdenk * along with this program; if not, write to the Free Software 27*3d3befa7Swdenk * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 28*3d3befa7Swdenk * MA 02111-1307 USA 29*3d3befa7Swdenk */ 30*3d3befa7Swdenk 31*3d3befa7Swdenk #ifndef __CONFIG_H 32*3d3befa7Swdenk #define __CONFIG_H 33*3d3befa7Swdenk 34*3d3befa7Swdenk /* 35*3d3befa7Swdenk * High Level Configuration Options 36*3d3befa7Swdenk * (easy to change) 37*3d3befa7Swdenk */ 38*3d3befa7Swdenk #define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */ 39*3d3befa7Swdenk #define CONFIG_INTEGRATOR 1 /* in an Integrator board */ 40*3d3befa7Swdenk #define CONFIG_ARCH_CINTEGRATOR 1 /* Specifically, a CP */ 41*3d3befa7Swdenk 42*3d3befa7Swdenk 43*3d3befa7Swdenk #define CFG_MEMTEST_START 0x100000 44*3d3befa7Swdenk #define CFG_MEMTEST_END 0x10000000 45*3d3befa7Swdenk #define CFG_HZ (1000000 / 256) /* Timer 1 is clocked at 1Mhz, with 256 divider */ 46*3d3befa7Swdenk #define CFG_TIMERBASE 0x13000100 47*3d3befa7Swdenk 48*3d3befa7Swdenk #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 49*3d3befa7Swdenk #define CONFIG_SETUP_MEMORY_TAGS 1 50*3d3befa7Swdenk #define CONFIG_MISC_INIT_R 1 /* call misc_init_r during start up */ 51*3d3befa7Swdenk /* 52*3d3befa7Swdenk * Size of malloc() pool 53*3d3befa7Swdenk */ 54*3d3befa7Swdenk #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) 55*3d3befa7Swdenk 56*3d3befa7Swdenk /* 57*3d3befa7Swdenk * Hardware drivers 58*3d3befa7Swdenk */ 59*3d3befa7Swdenk #define CONFIG_DRIVER_SMC91111 60*3d3befa7Swdenk #define CONFIG_SMC_USE_32_BIT 61*3d3befa7Swdenk #define CONFIG_SMC91111_BASE 0xC8000000 62*3d3befa7Swdenk #undef CONFIG_SMC91111_EXT_PHY 63*3d3befa7Swdenk 64*3d3befa7Swdenk /* 65*3d3befa7Swdenk * NS16550 Configuration 66*3d3befa7Swdenk */ 67*3d3befa7Swdenk #define CFG_PL011_SERIAL 68*3d3befa7Swdenk #define CONFIG_CONS_INDEX 0 69*3d3befa7Swdenk #define CONFIG_BAUDRATE 38400 70*3d3befa7Swdenk #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 71*3d3befa7Swdenk #define CFG_SERIAL0 0x16000000 72*3d3befa7Swdenk #define CFG_SERIAL1 0x17000000 73*3d3befa7Swdenk 74*3d3befa7Swdenk #define CONFIG_COMMANDS (CFG_CMD_DHCP | CFG_CMD_IMI | CFG_CMD_NET | CFG_CMD_PING | CFG_CMD_BDI | CFG_CMD_MEMORY) 75*3d3befa7Swdenk #define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT 76*3d3befa7Swdenk 77*3d3befa7Swdenk /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ 78*3d3befa7Swdenk #include <cmd_confdefs.h> 79*3d3befa7Swdenk 80*3d3befa7Swdenk #define CONFIG_BOOTDELAY 2 81*3d3befa7Swdenk #define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0" 82*3d3befa7Swdenk #define CONFIG_BOOTCOMMAND "bootp ; bootm" 83*3d3befa7Swdenk 84*3d3befa7Swdenk /* 85*3d3befa7Swdenk * Miscellaneous configurable options 86*3d3befa7Swdenk */ 87*3d3befa7Swdenk #define CFG_LONGHELP /* undef to save memory */ 88*3d3befa7Swdenk #define CFG_PROMPT "Integrator-CP # " /* Monitor Command Prompt */ 89*3d3befa7Swdenk #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ 90*3d3befa7Swdenk /* Print Buffer Size */ 91*3d3befa7Swdenk #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) 92*3d3befa7Swdenk #define CFG_MAXARGS 16 /* max number of command args */ 93*3d3befa7Swdenk #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ 94*3d3befa7Swdenk 95*3d3befa7Swdenk #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ 96*3d3befa7Swdenk #define CFG_LOAD_ADDR 0x7fc0 /* default load address */ 97*3d3befa7Swdenk 98*3d3befa7Swdenk /*----------------------------------------------------------------------- 99*3d3befa7Swdenk * Stack sizes 100*3d3befa7Swdenk * 101*3d3befa7Swdenk * The stack sizes are set up in start.S using the settings below 102*3d3befa7Swdenk */ 103*3d3befa7Swdenk #define CONFIG_STACKSIZE (128*1024) /* regular stack */ 104*3d3befa7Swdenk #ifdef CONFIG_USE_IRQ 105*3d3befa7Swdenk #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ 106*3d3befa7Swdenk #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ 107*3d3befa7Swdenk #endif 108*3d3befa7Swdenk 109*3d3befa7Swdenk /*----------------------------------------------------------------------- 110*3d3befa7Swdenk * Physical Memory Map 111*3d3befa7Swdenk */ 112*3d3befa7Swdenk #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ 113*3d3befa7Swdenk #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ 114*3d3befa7Swdenk #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ 115*3d3befa7Swdenk 116*3d3befa7Swdenk #define CFG_FLASH_BASE 0x24000000 117*3d3befa7Swdenk #define PHYS_FLASH_1 (CFG_FLASH_BASE) 118*3d3befa7Swdenk 119*3d3befa7Swdenk /*----------------------------------------------------------------------- 120*3d3befa7Swdenk * FLASH and environment organization 121*3d3befa7Swdenk */ 122*3d3befa7Swdenk #define CFG_ENV_IS_NOWHERE 123*3d3befa7Swdenk #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ 124*3d3befa7Swdenk #define PHYS_FLASH_SIZE 0x01000000 /* 16MB */ 125*3d3befa7Swdenk /* timeout values are in ticks */ 126*3d3befa7Swdenk #define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */ 127*3d3befa7Swdenk #define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */ 128*3d3befa7Swdenk #define CFG_MAX_FLASH_SECT 128 129*3d3befa7Swdenk #define CFG_ENV_SIZE 32768 130*3d3befa7Swdenk 131*3d3befa7Swdenk #endif /* __CONFIG_H */ 132