13d3befa7Swdenk /* 23d3befa7Swdenk * (C) Copyright 2003 33d3befa7Swdenk * Texas Instruments. 43d3befa7Swdenk * Kshitij Gupta <kshitij@ti.com> 53d3befa7Swdenk * Configuation settings for the TI OMAP Innovator board. 63d3befa7Swdenk * 73d3befa7Swdenk * (C) Copyright 2004 83d3befa7Swdenk * ARM Ltd. 93d3befa7Swdenk * Philippe Robin, <philippe.robin@arm.com> 103d3befa7Swdenk * Configuration for Compact Integrator board. 113d3befa7Swdenk * 123d3befa7Swdenk * See file CREDITS for list of people who contributed to this 133d3befa7Swdenk * project. 143d3befa7Swdenk * 153d3befa7Swdenk * This program is free software; you can redistribute it and/or 163d3befa7Swdenk * modify it under the terms of the GNU General Public License as 173d3befa7Swdenk * published by the Free Software Foundation; either version 2 of 183d3befa7Swdenk * the License, or (at your option) any later version. 193d3befa7Swdenk * 203d3befa7Swdenk * This program is distributed in the hope that it will be useful, 213d3befa7Swdenk * but WITHOUT ANY WARRANTY; without even the implied warranty of 223d3befa7Swdenk * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 233d3befa7Swdenk * GNU General Public License for more details. 243d3befa7Swdenk * 253d3befa7Swdenk * You should have received a copy of the GNU General Public License 263d3befa7Swdenk * along with this program; if not, write to the Free Software 273d3befa7Swdenk * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 283d3befa7Swdenk * MA 02111-1307 USA 293d3befa7Swdenk */ 303d3befa7Swdenk 313d3befa7Swdenk #ifndef __CONFIG_H 323d3befa7Swdenk #define __CONFIG_H 333d3befa7Swdenk 343d3befa7Swdenk /* 353d3befa7Swdenk * High Level Configuration Options 363d3befa7Swdenk * (easy to change) 373d3befa7Swdenk */ 383d3befa7Swdenk #define CFG_MEMTEST_START 0x100000 393d3befa7Swdenk #define CFG_MEMTEST_END 0x10000000 4074f4304eSWolfgang Denk #define CFG_HZ 1000 4174f4304eSWolfgang Denk #define CFG_HZ_CLOCK 1000000 /* Timer 1 is clocked at 1Mhz */ 423d3befa7Swdenk #define CFG_TIMERBASE 0x13000100 433d3befa7Swdenk 443d3befa7Swdenk #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 453d3befa7Swdenk #define CONFIG_SETUP_MEMORY_TAGS 1 463d3befa7Swdenk #define CONFIG_MISC_INIT_R 1 /* call misc_init_r during start up */ 473d3befa7Swdenk /* 483d3befa7Swdenk * Size of malloc() pool 493d3befa7Swdenk */ 50*0e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CFG_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) 5142dfe7a1Swdenk #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ 523d3befa7Swdenk 533d3befa7Swdenk /* 543d3befa7Swdenk * Hardware drivers 553d3befa7Swdenk */ 563d3befa7Swdenk #define CONFIG_DRIVER_SMC91111 573d3befa7Swdenk #define CONFIG_SMC_USE_32_BIT 583d3befa7Swdenk #define CONFIG_SMC91111_BASE 0xC8000000 593d3befa7Swdenk #undef CONFIG_SMC91111_EXT_PHY 603d3befa7Swdenk 613d3befa7Swdenk /* 623d3befa7Swdenk * NS16550 Configuration 633d3befa7Swdenk */ 6448d0192fSAndreas Engel #define CONFIG_PL011_SERIAL 656705d81eSwdenk #define CONFIG_PL011_CLOCK 14745600 666705d81eSwdenk #define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1 } 673d3befa7Swdenk #define CONFIG_CONS_INDEX 0 683d3befa7Swdenk #define CONFIG_BAUDRATE 38400 693d3befa7Swdenk #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 703d3befa7Swdenk #define CFG_SERIAL0 0x16000000 713d3befa7Swdenk #define CFG_SERIAL1 0x17000000 723d3befa7Swdenk 731d2c6bc4SJon Loeliger 745a95f6fbSwdenk /* 75079a136cSJon Loeliger * BOOTP options 76079a136cSJon Loeliger */ 77079a136cSJon Loeliger #define CONFIG_BOOTP_BOOTFILESIZE 78079a136cSJon Loeliger #define CONFIG_BOOTP_BOOTPATH 79079a136cSJon Loeliger #define CONFIG_BOOTP_GATEWAY 80079a136cSJon Loeliger #define CONFIG_BOOTP_HOSTNAME 81079a136cSJon Loeliger 82079a136cSJon Loeliger 83079a136cSJon Loeliger /* 841d2c6bc4SJon Loeliger * Command line configuration. 855a95f6fbSwdenk */ 861d2c6bc4SJon Loeliger #define CONFIG_CMD_BDI 871d2c6bc4SJon Loeliger #define CONFIG_CMD_DHCP 881d2c6bc4SJon Loeliger #define CONFIG_CMD_ENV 891d2c6bc4SJon Loeliger #define CONFIG_CMD_FLASH 901d2c6bc4SJon Loeliger #define CONFIG_CMD_IMI 911d2c6bc4SJon Loeliger #define CONFIG_CMD_MEMORY 921d2c6bc4SJon Loeliger #define CONFIG_CMD_NET 931d2c6bc4SJon Loeliger #define CONFIG_CMD_PING 941d2c6bc4SJon Loeliger 955a95f6fbSwdenk 965a95f6fbSwdenk #if 0 973d3befa7Swdenk #define CONFIG_BOOTDELAY 2 989b880bd4SWolfgang Denk #define CONFIG_BOOTARGS "root=/dev/nfs nfsroot=<IP address>:/<exported rootfs> mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" 993d3befa7Swdenk #define CONFIG_BOOTCOMMAND "bootp ; bootm" 1005a95f6fbSwdenk #endif 1019b880bd4SWolfgang Denk /* The kernel command line & boot command below are for a platform flashed with afu.axf 1023d3befa7Swdenk 1039b880bd4SWolfgang Denk Image 666 Block 0 End Block 0 address 0x24000000 exec 0x24000000- name u-boot 1049b880bd4SWolfgang Denk Image 667 Block 1 End Block 13 address 0x24040000 exec 0x24040000- name u-linux 1059b880bd4SWolfgang Denk Image 668 Block 14 End Block 33 address 0x24380000 exec 0x24380000- name rootfs 1069b880bd4SWolfgang Denk SIB at Block62 End Block62 address 0x24f80000 1079b880bd4SWolfgang Denk 10874f4304eSWolfgang Denk */ 10974f4304eSWolfgang Denk #define CONFIG_BOOTDELAY 2 1109b880bd4SWolfgang Denk #define CONFIG_BOOTARGS "root=/dev/mtdblock2 mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0 console=ttyAMA0" 1119b880bd4SWolfgang Denk #define CONFIG_BOOTCOMMAND "cp 0x24080000 0x7fc0 0x100000; bootm" 11274f4304eSWolfgang Denk 1133d3befa7Swdenk /* 1143d3befa7Swdenk * Miscellaneous configurable options 1153d3befa7Swdenk */ 1163d3befa7Swdenk #define CFG_LONGHELP /* undef to save memory */ 1173d3befa7Swdenk #define CFG_PROMPT "Integrator-CP # " /* Monitor Command Prompt */ 1183d3befa7Swdenk #define CFG_CBSIZE 256 /* Console I/O Buffer Size*/ 1193d3befa7Swdenk /* Print Buffer Size */ 1203d3befa7Swdenk #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) 1213d3befa7Swdenk #define CFG_MAXARGS 16 /* max number of command args */ 1223d3befa7Swdenk #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size*/ 1233d3befa7Swdenk 1243d3befa7Swdenk #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ 1253d3befa7Swdenk #define CFG_LOAD_ADDR 0x7fc0 /* default load address */ 1263d3befa7Swdenk 1273d3befa7Swdenk /*----------------------------------------------------------------------- 1283d3befa7Swdenk * Stack sizes 1293d3befa7Swdenk * 1303d3befa7Swdenk * The stack sizes are set up in start.S using the settings below 1313d3befa7Swdenk */ 1323d3befa7Swdenk #define CONFIG_STACKSIZE (128*1024) /* regular stack */ 1333d3befa7Swdenk #ifdef CONFIG_USE_IRQ 1343d3befa7Swdenk #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ 1353d3befa7Swdenk #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ 1363d3befa7Swdenk #endif 1373d3befa7Swdenk 1383d3befa7Swdenk /*----------------------------------------------------------------------- 1393d3befa7Swdenk * Physical Memory Map 1403d3befa7Swdenk */ 1413d3befa7Swdenk #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ 1423d3befa7Swdenk #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ 1435a95f6fbSwdenk #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ 1443d3befa7Swdenk 1453d3befa7Swdenk /*----------------------------------------------------------------------- 1463d3befa7Swdenk * FLASH and environment organization 1479b880bd4SWolfgang Denk 1489b880bd4SWolfgang Denk * Top varies according to amount fitted 1499b880bd4SWolfgang Denk * Reserve top 4 blocks of flash 1509b880bd4SWolfgang Denk * - ARM Boot Monitor 1519b880bd4SWolfgang Denk * - Unused 1529b880bd4SWolfgang Denk * - SIB block 1539b880bd4SWolfgang Denk * - U-Boot environment 1549b880bd4SWolfgang Denk * 1559b880bd4SWolfgang Denk * Base is always 0x24000000 1569b880bd4SWolfgang Denk 1573d3befa7Swdenk */ 1585a95f6fbSwdenk #define CFG_FLASH_BASE 0x24000000 1595a95f6fbSwdenk #define CFG_MAX_FLASH_SECT 64 1603d3befa7Swdenk #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ 1613d3befa7Swdenk #define PHYS_FLASH_SIZE 0x01000000 /* 16MB */ 16274f4304eSWolfgang Denk #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */ 16374f4304eSWolfgang Denk #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */ 1645a95f6fbSwdenk 1659b880bd4SWolfgang Denk #define CFG_MONITOR_LEN 0x00100000 1665a1aceb0SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_FLASH 1 1679b880bd4SWolfgang Denk 1689b880bd4SWolfgang Denk /* 1699b880bd4SWolfgang Denk * Move up the U-Boot & monitor area if more flash is fitted. 1709b880bd4SWolfgang Denk * If this U-Boot is to be run on Integrators with varying flash sizes, 1717817cb20SMarcel Ziswiler * drivers/mtd/cfi_flash.c::flash_init() can read the Integrator CP_FLASHPROG 172*0e8d1586SJean-Christophe PLAGNIOL-VILLARD * register and dynamically assign CONFIG_ENV_ADDR & CFG_MONITOR_BASE 1739b880bd4SWolfgang Denk * - CFG_MONITOR_BASE is set to indicate that the environment is not 1749b880bd4SWolfgang Denk * embedded in the boot monitor(s) area 1759b880bd4SWolfgang Denk */ 1769b880bd4SWolfgang Denk #if ( PHYS_FLASH_SIZE == 0x04000000 ) 1779b880bd4SWolfgang Denk 178*0e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR 0x27F00000 1799b880bd4SWolfgang Denk #define CFG_MONITOR_BASE 0x27F40000 1809b880bd4SWolfgang Denk 1819b880bd4SWolfgang Denk #elif (PHYS_FLASH_SIZE == 0x02000000 ) 1829b880bd4SWolfgang Denk 183*0e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR 0x25F00000 1849b880bd4SWolfgang Denk #define CFG_MONITOR_BASE 0x25F40000 1859b880bd4SWolfgang Denk 1869b880bd4SWolfgang Denk #else 1879b880bd4SWolfgang Denk 188*0e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR 0x24F00000 1899b880bd4SWolfgang Denk #define CFG_MONITOR_BASE 0x27F40000 1909b880bd4SWolfgang Denk 1919b880bd4SWolfgang Denk #endif 1929b880bd4SWolfgang Denk 193*0e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */ 194*0e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 8192 /* 8KB */ 1959b880bd4SWolfgang Denk /*----------------------------------------------------------------------- 1969b880bd4SWolfgang Denk * CP control registers 1979b880bd4SWolfgang Denk */ 1989b880bd4SWolfgang Denk #define CPCR_BASE 0xCB000000 /* CP Registers*/ 1999b880bd4SWolfgang Denk #define OS_FLASHPROG 0x00000004 /* Flash register*/ 2009b880bd4SWolfgang Denk #define CPMASK_EXTRABANK 0x8 2019b880bd4SWolfgang Denk #define CPMASK_FLASHSIZE 0x4 2029b880bd4SWolfgang Denk #define CPMASK_FLWREN 0x2 2039b880bd4SWolfgang Denk #define CPMASK_FLVPPEN 0x1 2043d3befa7Swdenk 2059b880bd4SWolfgang Denk /* 2069b880bd4SWolfgang Denk * The ARM boot monitor initializes the board. 2079b880bd4SWolfgang Denk * However, the default U-Boot code also performs the initialization. 2089b880bd4SWolfgang Denk * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT 2099b880bd4SWolfgang Denk * - see documentation supplied with board for details of how to choose the 2109b880bd4SWolfgang Denk * image to run at reset/power up 2119b880bd4SWolfgang Denk * e.g. whether the ARM Boot Monitor runs before U-Boot 2129b880bd4SWolfgang Denk 2139b880bd4SWolfgang Denk #define CONFIG_SKIP_LOWLEVEL_INIT 2149b880bd4SWolfgang Denk 2159b880bd4SWolfgang Denk */ 2169b880bd4SWolfgang Denk 2179b880bd4SWolfgang Denk /* 2189b880bd4SWolfgang Denk * The ARM boot monitor does not relocate U-Boot. 2199b880bd4SWolfgang Denk * However, the default U-Boot code performs the relocation check, 2209b880bd4SWolfgang Denk * and may relocate the code if the memory map is changed. 2219b880bd4SWolfgang Denk * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT 2229b880bd4SWolfgang Denk 2239b880bd4SWolfgang Denk #define SKIP_CONFIG_RELOCATE_UBOOT 2249b880bd4SWolfgang Denk 2259b880bd4SWolfgang Denk */ 22674f4304eSWolfgang Denk /*----------------------------------------------------------------------- 22774f4304eSWolfgang Denk * There are various dependencies on the core module (CM) fitted 22874f4304eSWolfgang Denk * Users should refer to their CM user guide 22974f4304eSWolfgang Denk * - when porting adjust u-boot/Makefile accordingly 23074f4304eSWolfgang Denk * to define the necessary CONFIG_ s for the CM involved 2319b880bd4SWolfgang Denk * see e.g. cp_926ejs_config 23274f4304eSWolfgang Denk */ 23374f4304eSWolfgang Denk 2349b880bd4SWolfgang Denk #include "armcoremodule.h" 23574f4304eSWolfgang Denk 2369b880bd4SWolfgang Denk /* 2379b880bd4SWolfgang Denk * If CONFIG_SKIP_LOWLEVEL_INIT is not defined & 2389b880bd4SWolfgang Denk * the core module has a CM_INIT register 2399b880bd4SWolfgang Denk * then the U-Boot initialisation code will 2409b880bd4SWolfgang Denk * e.g. ARM Boot Monitor or pre-loader is repeated once 2419b880bd4SWolfgang Denk * (to re-initialise any existing CM_INIT settings to safe values). 2429b880bd4SWolfgang Denk * 2439b880bd4SWolfgang Denk * This is usually not the desired behaviour since the platform 2449b880bd4SWolfgang Denk * will either reboot into the ARM monitor (or pre-loader) 2459b880bd4SWolfgang Denk * or continuously cycle thru it without U-Boot running, 2469b880bd4SWolfgang Denk * depending upon the setting of Integrator/CP switch S2-4. 2479b880bd4SWolfgang Denk * 2489b880bd4SWolfgang Denk * However it may be needed if Integrator/CP switch S2-1 2499b880bd4SWolfgang Denk * is set OFF to boot direct into U-Boot. 2509b880bd4SWolfgang Denk * In that case comment out the line below. 25174f4304eSWolfgang Denk #undef CONFIG_CM_INIT 2529b880bd4SWolfgang Denk */ 25374f4304eSWolfgang Denk 2543d3befa7Swdenk #endif /* __CONFIG_H */ 255