1 /* 2 * (C) Copyright 2012 3 * Linaro 4 * Linus Walleij <linus.walleij@linaro.org> 5 * Common ARM Integrator configuration settings 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #define CONFIG_SYS_TEXT_BASE 0x01000000 11 #define CONFIG_SYS_MEMTEST_START 0x100000 12 #define CONFIG_SYS_MEMTEST_END 0x10000000 13 #define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */ 14 #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ 15 #define CONFIG_SYS_LONGHELP 16 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 17 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size*/ 18 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */ 19 20 /* Serial port PL010/PL011 through the device model */ 21 #define CONFIG_PL01X_SERIAL 22 #define CONFIG_CONS_INDEX 0 23 24 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 25 #define CONFIG_SETUP_MEMORY_TAGS 26 #define CONFIG_MISC_INIT_R /* call misc_init_r during start up */ 27 28 /* 29 * There are various dependencies on the core module (CM) fitted 30 * Users should refer to their CM user guide 31 */ 32 #include "armcoremodule.h" 33 34 /* 35 * Initialize and remap the core module, use SPD to detect memory size 36 * If CONFIG_SKIP_LOWLEVEL_INIT is not defined & 37 * the core module has a CM_INIT register 38 * then the U-Boot initialisation code will 39 * e.g. ARM Boot Monitor or pre-loader is repeated once 40 * (to re-initialise any existing CM_INIT settings to safe values). 41 * 42 * This is usually not the desired behaviour since the platform 43 * will either reboot into the ARM monitor (or pre-loader) 44 * or continuously cycle thru it without U-Boot running, 45 * depending upon the setting of Integrator/CP switch S2-4. 46 * 47 * However it may be needed if Integrator/CP switch S2-1 48 * is set OFF to boot direct into U-Boot. 49 * In that case comment out the line below. 50 */ 51 #define CONFIG_CM_INIT 52 #define CONFIG_CM_REMAP 53 #define CONFIG_CM_SPD_DETECT 54 55 /* 56 * The ARM boot monitor initializes the board. 57 * However, the default U-Boot code also performs the initialization. 58 * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT 59 * - see documentation supplied with board for details of how to choose the 60 * image to run at reset/power up 61 * e.g. whether the ARM Boot Monitor runs before U-Boot 62 */ 63 /* #define CONFIG_SKIP_LOWLEVEL_INIT */ 64 65 /* 66 * The ARM boot monitor does not relocate U-Boot. 67 * However, the default U-Boot code performs the relocation check, 68 * and may relocate the code if the memory map is changed. 69 * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT 70 */ 71 /* #define SKIP_CONFIG_RELOCATE_UBOOT */ 72 73 /* 74 * Physical Memory Map 75 */ 76 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ 77 #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ 78 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ 79 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 80 #define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE 81 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \ 82 CONFIG_SYS_INIT_RAM_SIZE - \ 83 GENERATED_GBL_DATA_SIZE) 84 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET 85 86 /* 87 * FLASH and environment organization 88 * Top varies according to amount fitted 89 * Reserve top 4 blocks of flash 90 * - ARM Boot Monitor 91 * - Unused 92 * - SIB block 93 * - U-Boot environment 94 */ 95 #define CONFIG_SYS_FLASH_CFI 1 96 #define CONFIG_FLASH_CFI_DRIVER 1 97 #define CONFIG_SYS_FLASH_BASE 0x24000000 98 #define CONFIG_SYS_MAX_FLASH_BANKS 1 99 100 /* Timeout values in ticks */ 101 #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */ 102 #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */ 103 #define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ 104 #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ 105