xref: /rk3399_rockchip-uboot/include/configs/integrator-common.h (revision a7b00a7bf6d92648827d94f4f1dcdb0b5336fe0e)
1e62b008fSLinus Walleij /*
2e62b008fSLinus Walleij  * (C) Copyright 2012
3e62b008fSLinus Walleij  * Linaro
4e62b008fSLinus Walleij  * Linus Walleij <linus.walleij@linaro.org>
5e62b008fSLinus Walleij  * Common ARM Integrator configuration settings
6e62b008fSLinus Walleij  *
71a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
8e62b008fSLinus Walleij  */
9e62b008fSLinus Walleij 
10e62b008fSLinus Walleij #define CONFIG_INTEGRATOR
11e62b008fSLinus Walleij 
12e62b008fSLinus Walleij #define CONFIG_SYS_TEXT_BASE		0x01000000
13e62b008fSLinus Walleij #define CONFIG_SYS_MEMTEST_START	0x100000
14e62b008fSLinus Walleij #define CONFIG_SYS_MEMTEST_END		0x10000000
15e62b008fSLinus Walleij #define CONFIG_SYS_TIMERBASE		0x13000100	/* Timer1 */
16e62b008fSLinus Walleij #define CONFIG_SYS_LOAD_ADDR		0x7fc0	/* default load address */
17e62b008fSLinus Walleij #define CONFIG_SYS_LONGHELP
18e62b008fSLinus Walleij #define CONFIG_SYS_HUSH_PARSER
19e62b008fSLinus Walleij #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size*/
20e62b008fSLinus Walleij #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
21e62b008fSLinus Walleij #define CONFIG_SYS_MAXARGS		16	/* max number of command args */
22e62b008fSLinus Walleij #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size*/
23e62b008fSLinus Walleij #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
24e62b008fSLinus Walleij 
25e62b008fSLinus Walleij #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs  */
26e62b008fSLinus Walleij #define CONFIG_SETUP_MEMORY_TAGS
275e7ffaa4SLinus Walleij #define CONFIG_OF_LIBFDT		/* enable passing a Device Tree */
28e62b008fSLinus Walleij #define CONFIG_MISC_INIT_R		/* call misc_init_r during start up */
297285c095SLinus Walleij #define CONFIG_SYS_GENERIC_BOARD
30e62b008fSLinus Walleij 
31e62b008fSLinus Walleij /*
32e62b008fSLinus Walleij  * There are various dependencies on the core module (CM) fitted
33e62b008fSLinus Walleij  * Users should refer to their CM user guide
34e62b008fSLinus Walleij  */
35e62b008fSLinus Walleij #include "armcoremodule.h"
36e62b008fSLinus Walleij 
37e62b008fSLinus Walleij /*
38e62b008fSLinus Walleij  * Initialize and remap the core module, use SPD to detect memory size
39e62b008fSLinus Walleij  * If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
40e62b008fSLinus Walleij  * the core module has a CM_INIT register
41e62b008fSLinus Walleij  * then the U-Boot initialisation code will
42e62b008fSLinus Walleij  * e.g. ARM Boot Monitor or pre-loader is repeated once
43e62b008fSLinus Walleij  * (to re-initialise any existing CM_INIT settings to safe values).
44e62b008fSLinus Walleij  *
45e62b008fSLinus Walleij  * This is usually not the desired behaviour since the platform
46e62b008fSLinus Walleij  * will either reboot into the ARM monitor (or pre-loader)
47e62b008fSLinus Walleij  * or continuously cycle thru it without U-Boot running,
48e62b008fSLinus Walleij  * depending upon the setting of Integrator/CP switch S2-4.
49e62b008fSLinus Walleij  *
50e62b008fSLinus Walleij  * However it may be needed if Integrator/CP switch S2-1
51e62b008fSLinus Walleij  * is set OFF to boot direct into U-Boot.
52e62b008fSLinus Walleij  * In that case comment out the line below.
53e62b008fSLinus Walleij  */
54e62b008fSLinus Walleij #define CONFIG_CM_INIT
55e62b008fSLinus Walleij #define CONFIG_CM_REMAP
56e62b008fSLinus Walleij #define CONFIG_CM_SPD_DETECT
57e62b008fSLinus Walleij 
58e62b008fSLinus Walleij /*
59e62b008fSLinus Walleij  * The ARM boot monitor initializes the board.
60e62b008fSLinus Walleij  * However, the default U-Boot code also performs the initialization.
61e62b008fSLinus Walleij  * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
62e62b008fSLinus Walleij  * - see documentation supplied with board for details of how to choose the
63e62b008fSLinus Walleij  * image to run at reset/power up
64e62b008fSLinus Walleij  * e.g. whether the ARM Boot Monitor runs before U-Boot
65e62b008fSLinus Walleij  */
66e62b008fSLinus Walleij /* #define CONFIG_SKIP_LOWLEVEL_INIT */
67e62b008fSLinus Walleij 
68e62b008fSLinus Walleij /*
69e62b008fSLinus Walleij  * The ARM boot monitor does not relocate U-Boot.
70e62b008fSLinus Walleij  * However, the default U-Boot code performs the relocation check,
71e62b008fSLinus Walleij  * and may relocate the code if the memory map is changed.
72e62b008fSLinus Walleij  * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
73e62b008fSLinus Walleij  */
74e62b008fSLinus Walleij /* #define SKIP_CONFIG_RELOCATE_UBOOT */
75e62b008fSLinus Walleij 
76e62b008fSLinus Walleij 
77e62b008fSLinus Walleij /*
78e62b008fSLinus Walleij  * Physical Memory Map
79e62b008fSLinus Walleij  */
80e62b008fSLinus Walleij #define CONFIG_NR_DRAM_BANKS	1		/* we have 1 bank of DRAM */
81e62b008fSLinus Walleij #define PHYS_SDRAM_1		0x00000000	/* SDRAM Bank #1 */
82e62b008fSLinus Walleij #define PHYS_SDRAM_1_SIZE	0x08000000	/* 128 MB */
83e62b008fSLinus Walleij #define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
84e62b008fSLinus Walleij #define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
85e62b008fSLinus Walleij #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
86e62b008fSLinus Walleij 				    CONFIG_SYS_INIT_RAM_SIZE - \
87e62b008fSLinus Walleij 				    GENERATED_GBL_DATA_SIZE)
88e62b008fSLinus Walleij #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
89*a7b00a7bSLinus Walleij 
90*a7b00a7bSLinus Walleij /*
91*a7b00a7bSLinus Walleij  * FLASH and environment organization
92*a7b00a7bSLinus Walleij  * Top varies according to amount fitted
93*a7b00a7bSLinus Walleij  * Reserve top 4 blocks of flash
94*a7b00a7bSLinus Walleij  * - ARM Boot Monitor
95*a7b00a7bSLinus Walleij  * - Unused
96*a7b00a7bSLinus Walleij  * - SIB block
97*a7b00a7bSLinus Walleij  * - U-Boot environment
98*a7b00a7bSLinus Walleij  */
99*a7b00a7bSLinus Walleij #define CONFIG_CMD_FLASH
100*a7b00a7bSLinus Walleij #define CONFIG_CMD_ARMFLASH
101*a7b00a7bSLinus Walleij #define CONFIG_SYS_FLASH_CFI		1
102*a7b00a7bSLinus Walleij #define CONFIG_FLASH_CFI_DRIVER		1
103*a7b00a7bSLinus Walleij #define CONFIG_SYS_FLASH_BASE		0x24000000
104*a7b00a7bSLinus Walleij #define CONFIG_SYS_MAX_FLASH_BANKS	1
105*a7b00a7bSLinus Walleij 
106*a7b00a7bSLinus Walleij /* Timeout values in ticks */
107*a7b00a7bSLinus Walleij #define CONFIG_SYS_FLASH_ERASE_TOUT	(2 * CONFIG_SYS_HZ) /* Erase Timeout */
108*a7b00a7bSLinus Walleij #define CONFIG_SYS_FLASH_WRITE_TOUT	(2 * CONFIG_SYS_HZ) /* Write Timeout */
109*a7b00a7bSLinus Walleij #define CONFIG_SYS_FLASH_PROTECTION	/* The devices have real protection */
110*a7b00a7bSLinus Walleij #define CONFIG_SYS_FLASH_EMPTY_INFO	/* flinfo indicates empty blocks */
111