1 /* 2 * (C) Copyright 2004 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Kshitij Gupta <kshitij@ti.com> 6 * 7 * Configuration settings for the phyCORE-i.MX31 board. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __CONFIG_H 13 #define __CONFIG_H 14 15 #include <asm/arch/imx-regs.h> 16 17 /* High Level Configuration Options */ 18 #define CONFIG_ARM1136 /* This is an arm1136 CPU core */ 19 #define CONFIG_MX31 /* in a mx31 */ 20 #define CONFIG_MX31_CLK32 32000 21 22 #define CONFIG_DISPLAY_CPUINFO 23 #define CONFIG_DISPLAY_BOARDINFO 24 25 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 26 #define CONFIG_SETUP_MEMORY_TAGS 27 #define CONFIG_INITRD_TAG 28 29 /* 30 * Size of malloc() pool 31 */ 32 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 512 * 1024) 33 34 /* 35 * Hardware drivers 36 */ 37 38 #define CONFIG_SYS_I2C 39 #define CONFIG_SYS_I2C_MXC 40 #define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */ 41 #define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET 42 43 #define CONFIG_MXC_UART 44 #define CONFIG_MXC_UART_BASE UART1_BASE 45 46 /* allow to overwrite serial and ethaddr */ 47 #define CONFIG_ENV_OVERWRITE 48 #define CONFIG_CONS_INDEX 1 49 #define CONFIG_BAUDRATE 115200 50 51 /*********************************************************** 52 * Command definition 53 ***********************************************************/ 54 55 #include <config_cmd_default.h> 56 57 #define CONFIG_CMD_PING 58 #define CONFIG_CMD_EEPROM 59 #define CONFIG_CMD_I2C 60 61 #define CONFIG_BOOTDELAY 3 62 63 #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:128k(uboot)ro," \ 64 "1536k(kernel),-(root)" 65 66 #define CONFIG_NETMASK 255.255.255.0 67 #define CONFIG_IPADDR 192.168.23.168 68 #define CONFIG_SERVERIP 192.168.23.2 69 70 #define CONFIG_EXTRA_ENV_SETTINGS \ 71 "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \ 72 "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \ 73 "ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \ 74 "bootargs_flash=setenv bootargs $(bootargs) " \ 75 "root=/dev/mtdblock2 rootfstype=jffs2\0" \ 76 "bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)\0" \ 77 "bootcmd=run bootcmd_net\0" \ 78 "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs;" \ 79 "tftpboot 0x80000000 $(uimage);bootm\0" \ 80 "bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash;" \ 81 "bootm 0x80000000\0" \ 82 "unlock=yes\0" \ 83 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 84 "prg_uboot=tftpboot 0x80000000 $(uboot);" \ 85 "protect off 0xa0000000 +0x20000;" \ 86 "erase 0xa0000000 +0x20000;" \ 87 "cp.b 0x80000000 0xa0000000 $(filesize)\0" \ 88 "prg_kernel=tftpboot 0x80000000 $(uimage);" \ 89 "erase 0xa0040000 +0x180000;" \ 90 "cp.b 0x80000000 0xa0040000 $(filesize)\0" \ 91 "prg_jffs2=tftpboot 0x80000000 $(jffs2);" \ 92 "erase 0xa01c0000 0xa1ffffff;" \ 93 "cp.b 0x80000000 0xa01c0000 $(filesize)\0" \ 94 "videomode=video=ctfb:x:240,y:320,depth:16,mode:0," \ 95 "pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1," \ 96 "sync:1241513985,vmode:0\0" 97 98 99 #define CONFIG_SMC911X 100 #define CONFIG_SMC911X_BASE 0xa8000000 101 #define CONFIG_SMC911X_32_BIT 102 103 /* 104 * Miscellaneous configurable options 105 */ 106 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 107 #define CONFIG_SYS_PROMPT "uboot> " 108 /* Console I/O Buffer Size */ 109 #define CONFIG_SYS_CBSIZE 256 110 /* Print Buffer Size */ 111 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 112 sizeof(CONFIG_SYS_PROMPT) + 16) 113 /* max number of command args */ 114 #define CONFIG_SYS_MAXARGS 16 115 /* Boot Argument Buffer Size */ 116 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 117 118 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 119 #define CONFIG_SYS_MEMTEST_END 0x10000 120 121 #define CONFIG_SYS_LOAD_ADDR 0 /* default load address */ 122 123 #define CONFIG_SYS_HZ 1000 124 125 #define CONFIG_CMDLINE_EDITING 126 127 /* 128 * Physical Memory Map 129 */ 130 #define CONFIG_NR_DRAM_BANKS 1 131 #define PHYS_SDRAM_1 0x80000000 132 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 133 #define CONFIG_BOARD_EARLY_INIT_F 134 #define CONFIG_SYS_TEXT_BASE 0xA0000000 135 136 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 137 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 138 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 139 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 140 GENERATED_GBL_DATA_SIZE) 141 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 142 CONFIG_SYS_GBL_DATA_OFFSET) 143 144 /* 145 * FLASH and environment organization 146 */ 147 #define CONFIG_SYS_FLASH_BASE 0xa0000000 148 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */ 149 #define CONFIG_SYS_MAX_FLASH_SECT 259 /* max # of sectors/chip */ 150 /* Monitor at beginning of flash */ 151 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 152 153 #define CONFIG_ENV_IS_IN_EEPROM 154 #define CONFIG_ENV_OFFSET 0x00 /* env. starts here */ 155 #define CONFIG_ENV_SIZE 4096 156 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 157 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 5 bits = 32 octets */ 158 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10 ms delay */ 159 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* byte addr. lenght */ 160 161 /* 162 * CFI FLASH driver setup 163 */ 164 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 165 #define CONFIG_FLASH_CFI_DRIVER /* Use drivers/mtd/cfi_flash.c */ 166 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffered writes (~10x faster) */ 167 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 168 169 /* 170 * Timeout for Flash Erase and Flash Write 171 * timeout values are in ticks 172 */ 173 #define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ) 174 #define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ) 175 176 /* 177 * JFFS2 partitions 178 */ 179 #undef CONFIG_CMD_MTDPARTS 180 #define CONFIG_JFFS2_DEV "nor0" 181 182 /* EET platform additions */ 183 #ifdef CONFIG_IMX31_PHYCORE_EET 184 #define CONFIG_BOARD_LATE_INIT 185 186 #define CONFIG_MXC_GPIO 187 188 #define CONFIG_HARD_SPI 189 #define CONFIG_MXC_SPI 190 #define CONFIG_CMD_SPI 191 192 #define CONFIG_S6E63D6 193 194 #define CONFIG_VIDEO 195 #define CONFIG_CFB_CONSOLE 196 #define CONFIG_VIDEO_MX3 197 #define CONFIG_VIDEO_LOGO 198 #define CONFIG_VIDEO_SW_CURSOR 199 #define CONFIG_VGA_AS_SINGLE_DEVICE 200 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 201 #define CONFIG_SPLASH_SCREEN 202 #define CONFIG_CMD_BMP 203 #define CONFIG_BMP_16BPP 204 #endif 205 206 #endif /* __CONFIG_H */ 207