1 /* 2 * (C) Copyright 2004 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Kshitij Gupta <kshitij@ti.com> 6 * 7 * Configuration settings for the phyCORE-i.MX31 board. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __CONFIG_H 13 #define __CONFIG_H 14 15 #include <asm/arch/imx-regs.h> 16 17 /* High Level Configuration Options */ 18 #define CONFIG_ARM1136 /* This is an arm1136 CPU core */ 19 #define CONFIG_MX31 /* in a mx31 */ 20 #define CONFIG_MX31_CLK32 32000 21 22 #define CONFIG_DISPLAY_CPUINFO 23 #define CONFIG_DISPLAY_BOARDINFO 24 25 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 26 #define CONFIG_SETUP_MEMORY_TAGS 27 #define CONFIG_INITRD_TAG 28 29 /* 30 * Size of malloc() pool 31 */ 32 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 512 * 1024) 33 34 /* 35 * Hardware drivers 36 */ 37 38 #define CONFIG_HARD_I2C 39 #define CONFIG_I2C_MXC 40 #define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR 41 #define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET 42 #define CONFIG_SYS_I2C_SPEED 100000 43 44 #define CONFIG_MXC_UART 45 #define CONFIG_MXC_UART_BASE UART1_BASE 46 47 /* allow to overwrite serial and ethaddr */ 48 #define CONFIG_ENV_OVERWRITE 49 #define CONFIG_CONS_INDEX 1 50 #define CONFIG_BAUDRATE 115200 51 52 /*********************************************************** 53 * Command definition 54 ***********************************************************/ 55 56 #include <config_cmd_default.h> 57 58 #define CONFIG_CMD_PING 59 #define CONFIG_CMD_EEPROM 60 #define CONFIG_CMD_I2C 61 62 #define CONFIG_BOOTDELAY 3 63 64 #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:128k(uboot)ro," \ 65 "1536k(kernel),-(root)" 66 67 #define CONFIG_NETMASK 255.255.255.0 68 #define CONFIG_IPADDR 192.168.23.168 69 #define CONFIG_SERVERIP 192.168.23.2 70 71 #define CONFIG_EXTRA_ENV_SETTINGS \ 72 "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \ 73 "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \ 74 "ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \ 75 "bootargs_flash=setenv bootargs $(bootargs) " \ 76 "root=/dev/mtdblock2 rootfstype=jffs2\0" \ 77 "bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)\0" \ 78 "bootcmd=run bootcmd_net\0" \ 79 "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs;" \ 80 "tftpboot 0x80000000 $(uimage);bootm\0" \ 81 "bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash;" \ 82 "bootm 0x80000000\0" \ 83 "unlock=yes\0" \ 84 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 85 "prg_uboot=tftpboot 0x80000000 $(uboot);" \ 86 "protect off 0xa0000000 +0x20000;" \ 87 "erase 0xa0000000 +0x20000;" \ 88 "cp.b 0x80000000 0xa0000000 $(filesize)\0" \ 89 "prg_kernel=tftpboot 0x80000000 $(uimage);" \ 90 "erase 0xa0040000 +0x180000;" \ 91 "cp.b 0x80000000 0xa0040000 $(filesize)\0" \ 92 "prg_jffs2=tftpboot 0x80000000 $(jffs2);" \ 93 "erase 0xa01c0000 0xa1ffffff;" \ 94 "cp.b 0x80000000 0xa01c0000 $(filesize)\0" \ 95 "videomode=video=ctfb:x:240,y:320,depth:16,mode:0," \ 96 "pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1," \ 97 "sync:1241513985,vmode:0\0" 98 99 100 #define CONFIG_SMC911X 101 #define CONFIG_SMC911X_BASE 0xa8000000 102 #define CONFIG_SMC911X_32_BIT 103 104 /* 105 * Miscellaneous configurable options 106 */ 107 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 108 #define CONFIG_SYS_PROMPT "uboot> " 109 /* Console I/O Buffer Size */ 110 #define CONFIG_SYS_CBSIZE 256 111 /* Print Buffer Size */ 112 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 113 sizeof(CONFIG_SYS_PROMPT) + 16) 114 /* max number of command args */ 115 #define CONFIG_SYS_MAXARGS 16 116 /* Boot Argument Buffer Size */ 117 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 118 119 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 120 #define CONFIG_SYS_MEMTEST_END 0x10000 121 122 #define CONFIG_SYS_LOAD_ADDR 0 /* default load address */ 123 124 #define CONFIG_SYS_HZ 1000 125 126 #define CONFIG_CMDLINE_EDITING 127 128 /* 129 * Physical Memory Map 130 */ 131 #define CONFIG_NR_DRAM_BANKS 1 132 #define PHYS_SDRAM_1 0x80000000 133 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 134 #define CONFIG_BOARD_EARLY_INIT_F 135 #define CONFIG_SYS_TEXT_BASE 0xA0000000 136 137 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 138 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 139 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 140 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 141 GENERATED_GBL_DATA_SIZE) 142 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 143 CONFIG_SYS_GBL_DATA_OFFSET) 144 145 /* 146 * FLASH and environment organization 147 */ 148 #define CONFIG_SYS_FLASH_BASE 0xa0000000 149 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */ 150 #define CONFIG_SYS_MAX_FLASH_SECT 259 /* max # of sectors/chip */ 151 /* Monitor at beginning of flash */ 152 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 153 154 #define CONFIG_ENV_IS_IN_EEPROM 155 #define CONFIG_ENV_OFFSET 0x00 /* env. starts here */ 156 #define CONFIG_ENV_SIZE 4096 157 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 158 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 5 bits = 32 octets */ 159 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10 ms delay */ 160 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* byte addr. lenght */ 161 162 /* 163 * CFI FLASH driver setup 164 */ 165 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 166 #define CONFIG_FLASH_CFI_DRIVER /* Use drivers/mtd/cfi_flash.c */ 167 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffered writes (~10x faster) */ 168 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 169 170 /* 171 * Timeout for Flash Erase and Flash Write 172 * timeout values are in ticks 173 */ 174 #define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ) 175 #define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ) 176 177 /* 178 * JFFS2 partitions 179 */ 180 #undef CONFIG_CMD_MTDPARTS 181 #define CONFIG_JFFS2_DEV "nor0" 182 183 /* EET platform additions */ 184 #ifdef CONFIG_IMX31_PHYCORE_EET 185 #define CONFIG_BOARD_LATE_INIT 186 187 #define CONFIG_MXC_GPIO 188 189 #define CONFIG_HARD_SPI 190 #define CONFIG_MXC_SPI 191 #define CONFIG_CMD_SPI 192 193 #define CONFIG_S6E63D6 194 195 #define CONFIG_VIDEO 196 #define CONFIG_CFB_CONSOLE 197 #define CONFIG_VIDEO_MX3 198 #define CONFIG_VIDEO_LOGO 199 #define CONFIG_VIDEO_SW_CURSOR 200 #define CONFIG_VGA_AS_SINGLE_DEVICE 201 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 202 #define CONFIG_SPLASH_SCREEN 203 #define CONFIG_CMD_BMP 204 #define CONFIG_BMP_16BPP 205 #endif 206 207 #endif /* __CONFIG_H */ 208