1 /* 2 * (C) Copyright 2004 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Kshitij Gupta <kshitij@ti.com> 6 * 7 * Configuration settings for the phyCORE-i.MX31 board. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __CONFIG_H 13 #define __CONFIG_H 14 15 #include <asm/arch/imx-regs.h> 16 17 /* High Level Configuration Options */ 18 #define CONFIG_MX31 /* This is a mx31 */ 19 #define CONFIG_MX31_CLK32 32000 20 21 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 22 #define CONFIG_SETUP_MEMORY_TAGS 23 #define CONFIG_INITRD_TAG 24 25 /* 26 * Size of malloc() pool 27 */ 28 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 512 * 1024) 29 30 /* 31 * Hardware drivers 32 */ 33 34 #define CONFIG_SYS_I2C 35 #define CONFIG_SYS_I2C_MXC 36 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 37 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 38 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 39 #define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET 40 41 #define CONFIG_MXC_UART 42 #define CONFIG_MXC_UART_BASE UART1_BASE 43 44 /* allow to overwrite serial and ethaddr */ 45 #define CONFIG_ENV_OVERWRITE 46 #define CONFIG_CONS_INDEX 1 47 #define CONFIG_BAUDRATE 115200 48 49 /*********************************************************** 50 * Command definition 51 ***********************************************************/ 52 #define CONFIG_CMD_EEPROM 53 54 55 #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:128k(uboot)ro," \ 56 "1536k(kernel),-(root)" 57 58 #define CONFIG_NETMASK 255.255.255.0 59 #define CONFIG_IPADDR 192.168.23.168 60 #define CONFIG_SERVERIP 192.168.23.2 61 62 #define CONFIG_EXTRA_ENV_SETTINGS \ 63 "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \ 64 "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \ 65 "ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \ 66 "bootargs_flash=setenv bootargs $(bootargs) " \ 67 "root=/dev/mtdblock2 rootfstype=jffs2\0" \ 68 "bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)\0" \ 69 "bootcmd=run bootcmd_net\0" \ 70 "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs;" \ 71 "tftpboot 0x80000000 $(uimage);bootm\0" \ 72 "bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash;" \ 73 "bootm 0x80000000\0" \ 74 "unlock=yes\0" \ 75 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 76 "prg_uboot=tftpboot 0x80000000 $(uboot);" \ 77 "protect off 0xa0000000 +0x20000;" \ 78 "erase 0xa0000000 +0x20000;" \ 79 "cp.b 0x80000000 0xa0000000 $(filesize)\0" \ 80 "prg_kernel=tftpboot 0x80000000 $(uimage);" \ 81 "erase 0xa0040000 +0x180000;" \ 82 "cp.b 0x80000000 0xa0040000 $(filesize)\0" \ 83 "prg_jffs2=tftpboot 0x80000000 $(jffs2);" \ 84 "erase 0xa01c0000 0xa1ffffff;" \ 85 "cp.b 0x80000000 0xa01c0000 $(filesize)\0" \ 86 "videomode=video=ctfb:x:240,y:320,depth:16,mode:0," \ 87 "pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1," \ 88 "sync:1241513985,vmode:0\0" 89 90 #define CONFIG_SMC911X 91 #define CONFIG_SMC911X_BASE 0xa8000000 92 #define CONFIG_SMC911X_32_BIT 93 94 /* 95 * Miscellaneous configurable options 96 */ 97 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 98 /* Console I/O Buffer Size */ 99 #define CONFIG_SYS_CBSIZE 256 100 /* Print Buffer Size */ 101 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 102 sizeof(CONFIG_SYS_PROMPT) + 16) 103 /* max number of command args */ 104 #define CONFIG_SYS_MAXARGS 16 105 /* Boot Argument Buffer Size */ 106 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 107 108 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 109 #define CONFIG_SYS_MEMTEST_END 0x10000 110 111 #define CONFIG_SYS_LOAD_ADDR 0 /* default load address */ 112 113 #define CONFIG_CMDLINE_EDITING 114 115 /* 116 * Physical Memory Map 117 */ 118 #define CONFIG_NR_DRAM_BANKS 1 119 #define PHYS_SDRAM_1 0x80000000 120 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 121 #define CONFIG_SYS_TEXT_BASE 0xA0000000 122 123 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 124 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 125 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 126 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 127 GENERATED_GBL_DATA_SIZE) 128 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 129 CONFIG_SYS_GBL_DATA_OFFSET) 130 131 /* 132 * FLASH and environment organization 133 */ 134 #define CONFIG_SYS_FLASH_BASE 0xa0000000 135 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */ 136 #define CONFIG_SYS_MAX_FLASH_SECT 259 /* max # of sectors/chip */ 137 /* Monitor at beginning of flash */ 138 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 139 140 #define CONFIG_ENV_IS_IN_EEPROM 141 #define CONFIG_ENV_OFFSET 0x00 /* env. starts here */ 142 #define CONFIG_ENV_SIZE 4096 143 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 144 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 5 bits = 32 octets */ 145 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10 ms delay */ 146 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* byte addr. lenght */ 147 148 /* 149 * CFI FLASH driver setup 150 */ 151 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 152 #define CONFIG_FLASH_CFI_DRIVER /* Use drivers/mtd/cfi_flash.c */ 153 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffered writes (~10x faster) */ 154 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 155 156 /* 157 * Timeout for Flash Erase and Flash Write 158 * timeout values are in ticks 159 */ 160 #define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ) 161 #define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ) 162 163 /* 164 * JFFS2 partitions 165 */ 166 #undef CONFIG_CMD_MTDPARTS 167 #define CONFIG_JFFS2_DEV "nor0" 168 169 /* EET platform additions */ 170 #ifdef CONFIG_TARGET_IMX31_PHYCORE_EET 171 #define CONFIG_MXC_GPIO 172 173 #define CONFIG_HARD_SPI 174 #define CONFIG_MXC_SPI 175 176 #define CONFIG_S6E63D6 177 178 #define CONFIG_VIDEO_MX3 179 #define CONFIG_VIDEO_LOGO 180 #define CONFIG_SPLASH_SCREEN 181 #define CONFIG_CMD_BMP 182 #define CONFIG_BMP_16BPP 183 #endif 184 185 #endif /* __CONFIG_H */ 186