xref: /rk3399_rockchip-uboot/include/configs/highbank.h (revision 877012df309329a9264e6e9558d4f71bfa0cddbe)
1 /*
2  * Copyright 2010-2011 Calxeda, Inc.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms of the GNU General Public License as published by the Free
6  * Software Foundation; either version 2 of the License, or (at your option)
7  * any later version.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program.  If not, see <http://www.gnu.org/licenses/>.
16  */
17 
18 #ifndef __CONFIG_H
19 #define __CONFIG_H
20 
21 #define CONFIG_L2_OFF
22 
23 #define CONFIG_SYS_NO_FLASH
24 #define CFG_HZ				1000
25 #define CONFIG_SYS_HZ			CFG_HZ
26 
27 #define CONFIG_OF_LIBFDT
28 #define CONFIG_FIT
29 #define CONFIG_SYS_BOOTMAPSZ		(16 << 20)
30 
31 /*
32  * Size of malloc() pool
33  */
34 #define CONFIG_SYS_MALLOC_LEN		(512 * 1024)
35 
36 #define CONFIG_PL011_SERIAL
37 #define CONFIG_PL011_CLOCK		150000000
38 #define CONFIG_PL01x_PORTS		{ (void *)(0xFFF36000) }
39 #define CONFIG_CONS_INDEX		0
40 
41 #define CONFIG_BAUDRATE			38400
42 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
43 
44 #define CONFIG_BOOTCOUNT_LIMIT
45 #define CONFIG_SYS_BOOTCOUNT_ADDR	0xfff3cf0c
46 
47 #define CONFIG_MISC_INIT_R
48 #define CONFIG_SCSI_AHCI
49 #define CONFIG_SCSI_AHCI_PLAT
50 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	5
51 #define CONFIG_SYS_SCSI_MAX_LUN		1
52 #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
53 					CONFIG_SYS_SCSI_MAX_LUN)
54 
55 #define CONFIG_DOS_PARTITION
56 
57 #define CONFIG_CALXEDA_XGMAC
58 
59 /* PXE support */
60 #define CONFIG_BOOTP_PXE
61 #define CONFIG_BOOTP_PXE_CLIENTARCH	0x100
62 #define CONFIG_BOOTP_VCI_STRING		"U-boot.armv7.highbank"
63 
64 /*
65  * Command line configuration.
66  */
67 #include <config_cmd_default.h>
68 
69 #define CONFIG_CMD_BDI
70 #define CONFIG_CMD_DHCP
71 #define CONFIG_CMD_ELF
72 #define CONFIG_CMD_MEMORY
73 #define CONFIG_CMD_LOADS
74 #define CONFIG_CMD_SCSI
75 #define CONFIG_CMD_EXT2
76 #define CONFIG_CMD_PXE
77 #define CONFIG_MENU
78 
79 #define CONFIG_BOOTDELAY		2
80 /*
81  * Miscellaneous configurable options
82  */
83 #define CONFIG_CMDLINE_EDITING
84 #define CONFIG_AUTO_COMPLETE
85 #define CONFIG_SYS_LONGHELP		/* undef to save memory		 */
86 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
87 #define CONFIG_SYS_MAXARGS		16	/* max number of cmd args */
88 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
89 #define CONFIG_SYS_PROMPT		"Highbank #"
90 /* Print Buffer Size */
91 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
92 					 sizeof(CONFIG_SYS_PROMPT)+16)
93 
94 #define CONFIG_SYS_LOAD_ADDR		0x800000
95 
96 #define CONFIG_EXTRA_ENV_SETTINGS	\
97 		"fdtaddr_r=0x600000\0" \
98 		"pxefile_addr_r=0x700000\0" \
99 		"kernel_addr_r=0x800000\0" \
100 		"ramdisk_addr_r=0x01000000\0" \
101 
102 /*-----------------------------------------------------------------------
103  * Stack sizes
104  *
105  * The stack sizes are set up in start.S using the settings below
106  */
107 #define CONFIG_STACKSIZE		(128*1024)	/* regular stack */
108 #ifdef CONFIG_USE_IRQ
109 #define CONFIG_STACKSIZE_IRQ		(4*1024)	/* IRQ stack */
110 #define CONFIG_STACKSIZE_FIQ		(4*1024)	/* FIQ stack */
111 #endif
112 
113 /*-----------------------------------------------------------------------
114  * Physical Memory Map
115  */
116 #define CONFIG_NR_DRAM_BANKS		1
117 #define PHYS_SDRAM_1_SIZE		(4089 << 20)
118 #define CONFIG_SYS_MEMTEST_START	0x100000
119 #define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_1_SIZE - 0x100000)
120 
121 /* Room required on the stack for the environment data */
122 #define CONFIG_ENV_SIZE			0x2000
123 #define CONFIG_ENV_IS_NOWHERE
124 
125 #define CONFIG_SYS_SDRAM_BASE		0x00000000
126 #define CONFIG_SYS_TEXT_BASE		0x00008000
127 #define CONFIG_SYS_INIT_SP_ADDR		0x01000000
128 #define CONFIG_SKIP_LOWLEVEL_INIT
129 
130 #endif
131