xref: /rk3399_rockchip-uboot/include/configs/gw_ventana.h (revision d41c8c8ece89132220dc1f60d92c3b8158f1575f)
1 /*
2  * Copyright (C) 2013 Gateworks Corporation
3  *
4  * SPDX-License-Identifier: GPL-2.0+
5  */
6 
7 #ifndef __CONFIG_H
8 #define __CONFIG_H
9 
10 /* SPL */
11 #define CONFIG_SPL_BOARD_INIT
12 #define CONFIG_SPL_NAND_SUPPORT
13 #define CONFIG_SPL_MMC_SUPPORT
14 #define CONFIG_SPL_FAT_SUPPORT
15 /*
16 #define CONFIG_SPL_SATA_SUPPORT
17 */
18 /* Location in NAND to read U-Boot from */
19 #define CONFIG_SYS_NAND_U_BOOT_OFFS     (14 * 1024 * 1024)
20 
21 #include "imx6_spl.h"                  /* common IMX6 SPL configuration */
22 #include "mx6_common.h"
23 #define CONFIG_MX6
24 #define CONFIG_DISPLAY_CPUINFO         /* display cpu info */
25 #define CONFIG_DISPLAY_BOARDINFO_LATE  /* display board info (after reloc) */
26 
27 #define CONFIG_MACH_TYPE	4520   /* Gateworks Ventana Platform */
28 
29 #include <asm/arch/imx-regs.h>
30 #include <asm/imx-common/gpio.h>
31 
32 /* ATAGs */
33 #define CONFIG_CMDLINE_TAG
34 #define CONFIG_SETUP_MEMORY_TAGS
35 #define CONFIG_INITRD_TAG
36 #define CONFIG_SERIAL_TAG
37 #define CONFIG_REVISION_TAG
38 
39 #define CONFIG_SYS_GENERIC_BOARD
40 
41 /* Size of malloc() pool */
42 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
43 
44 /* Init Functions */
45 #define CONFIG_BOARD_EARLY_INIT_F
46 #define CONFIG_MISC_INIT_R
47 
48 /* Driver Model */
49 #ifndef CONFIG_SPL_BUILD
50 #define CONFIG_DM
51 #define CONFIG_DM_GPIO
52 #define CONFIG_DM_SERIAL
53 #define CONFIG_CMD_DM
54 #endif
55 
56 /* GPIO */
57 #define CONFIG_MXC_GPIO
58 #define CONFIG_CMD_GPIO
59 
60 /* Serial */
61 #define CONFIG_MXC_UART
62 #define CONFIG_MXC_UART_BASE	       UART2_BASE
63 
64 #ifdef CONFIG_SPI_FLASH
65 
66 /* SPI */
67 #define CONFIG_CMD_SF
68 #ifdef CONFIG_CMD_SF
69   #define CONFIG_MXC_SPI
70   #define CONFIG_SPI_FLASH_MTD
71   #define CONFIG_SPI_FLASH_BAR
72   #define CONFIG_SPI_FLASH_WINBOND
73   #define CONFIG_SF_DEFAULT_BUS              0
74   #define CONFIG_SF_DEFAULT_CS               0
75 					     /* GPIO 3-19 (21248) */
76   #define CONFIG_SF_DEFAULT_SPEED            30000000
77   #define CONFIG_SF_DEFAULT_MODE             (SPI_MODE_0)
78 #endif
79 
80 #else
81 /* Enable NAND support */
82 #define CONFIG_CMD_TIME
83 #define CONFIG_CMD_NAND
84 #define CONFIG_CMD_NAND_TRIMFFS
85 #ifdef CONFIG_CMD_NAND
86   #define CONFIG_NAND_MXS
87   #define CONFIG_SYS_MAX_NAND_DEVICE	1
88   #define CONFIG_SYS_NAND_BASE		0x40000000
89   #define CONFIG_SYS_NAND_5_ADDR_CYCLE
90   #define CONFIG_SYS_NAND_ONFI_DETECTION
91 
92   /* DMA stuff, needed for GPMI/MXS NAND support */
93   #define CONFIG_APBH_DMA
94   #define CONFIG_APBH_DMA_BURST
95   #define CONFIG_APBH_DMA_BURST8
96 #endif
97 
98 #endif /* CONFIG_SPI_FLASH */
99 
100 /* Flattened Image Tree Suport */
101 #define CONFIG_FIT
102 #define CONFIG_FIT_VERBOSE
103 
104 /* I2C Configs */
105 #define CONFIG_CMD_I2C
106 #define CONFIG_SYS_I2C
107 #define CONFIG_SYS_I2C_MXC
108 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
109 #define CONFIG_SYS_I2C_SPEED		100000
110 #define CONFIG_I2C_GSC			0
111 #define CONFIG_I2C_PMIC			1
112 #define CONFIG_I2C_EDID
113 
114 /* MMC Configs */
115 #define CONFIG_FSL_ESDHC
116 #define CONFIG_FSL_USDHC
117 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
118 #define CONFIG_SYS_FSL_USDHC_NUM       1
119 #define CONFIG_MMC
120 #define CONFIG_CMD_MMC
121 #define CONFIG_GENERIC_MMC
122 #define CONFIG_BOUNCE_BUFFER
123 
124 /* Filesystem support */
125 #define CONFIG_CMD_EXT2
126 #define CONFIG_CMD_EXT4
127 #define CONFIG_CMD_EXT4_WRITE
128 #define CONFIG_CMD_FAT
129 #define CONFIG_CMD_UBIFS
130 #define CONFIG_DOS_PARTITION
131 
132 /*
133  * SATA Configs
134  */
135 #define CONFIG_CMD_SATA
136 #ifdef CONFIG_CMD_SATA
137   #define CONFIG_DWC_AHSATA
138   #define CONFIG_SYS_SATA_MAX_DEVICE	1
139   #define CONFIG_DWC_AHSATA_PORT_ID	0
140   #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
141   #define CONFIG_LBA48
142   #define CONFIG_LIBATA
143 #endif
144 
145 /*
146  * PCI express
147  */
148 #define CONFIG_CMD_PCI
149 #ifdef CONFIG_CMD_PCI
150 #define CONFIG_PCI
151 #define CONFIG_PCI_PNP
152 #define CONFIG_PCI_SCAN_SHOW
153 #define CONFIG_PCI_FIXUP_DEV
154 #define CONFIG_PCIE_IMX
155 #endif
156 
157 /*
158  * PMIC
159  */
160 #define CONFIG_POWER
161 #define CONFIG_POWER_I2C
162 #define CONFIG_POWER_PFUZE100
163 #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
164 #define CONFIG_POWER_LTC3676
165 #define CONFIG_POWER_LTC3676_I2C_ADDR  0x3c
166 
167 /* Various command support */
168 #include <config_cmd_default.h>
169 #undef CONFIG_CMD_IMLS
170 #define CONFIG_CMD_PING
171 #define CONFIG_CMD_DHCP
172 #define CONFIG_CMD_MII
173 #define CONFIG_CMD_NET
174 #define CONFIG_CMD_BMODE         /* set eFUSE shadow for a boot dev and reset */
175 #define CONFIG_CMD_HDMIDETECT    /* detect HDMI output device */
176 #define CONFIG_CMD_SETEXPR
177 #define CONFIG_CMD_BOOTZ
178 #define CONFIG_CMD_GSC
179 #define CONFIG_CMD_EECONFIG      /* Gateworks EEPROM config cmd */
180 #define CONFIG_CMD_UBI
181 #define CONFIG_RBTREE
182 #define CONFIG_LZO
183 #define CONFIG_CMD_FUSE          /* eFUSE read/write support */
184 #ifdef CONFIG_CMD_FUSE
185 #define CONFIG_MXC_OCOTP
186 #endif
187 
188 
189 /* Ethernet support */
190 #define CONFIG_FEC_MXC
191 #define CONFIG_E1000
192 #define CONFIG_MII
193 #define IMX_FEC_BASE             ENET_BASE_ADDR
194 #define CONFIG_FEC_XCV_TYPE      RGMII
195 #define CONFIG_FEC_MXC_PHYADDR   0
196 #define CONFIG_PHYLIB
197 #define CONFIG_ARP_TIMEOUT       200UL
198 
199 /* USB Configs */
200 #define CONFIG_CMD_USB
201 #define CONFIG_USB_EHCI
202 #define CONFIG_USB_EHCI_MX6
203 #define CONFIG_USB_STORAGE
204 #define CONFIG_USB_HOST_ETHER
205 #define CONFIG_USB_ETHER_ASIX
206 #define CONFIG_USB_ETHER_SMSC95XX
207 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
208 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET  /* For OTG port */
209 #define CONFIG_MXC_USB_PORTSC     (PORT_PTS_UTMI | PORT_PTS_PTW)
210 #define CONFIG_MXC_USB_FLAGS      0
211 #define CONFIG_USB_KEYBOARD
212 #define CONFIG_CI_UDC
213 #define CONFIG_USBD_HS
214 #define CONFIG_USB_GADGET_DUALSPEED
215 #define CONFIG_USB_ETHER
216 #define CONFIG_USB_ETH_CDC
217 #define CONFIG_NETCONSOLE
218 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
219 
220 /* USB Mass Storage Gadget */
221 #define CONFIG_USB_GADGET
222 #define CONFIG_CMD_USB_MASS_STORAGE
223 #define CONFIG_USB_GADGET_MASS_STORAGE
224 #define CONFIG_USBDOWNLOAD_GADGET
225 #define CONFIG_USB_GADGET_VBUS_DRAW    2
226 
227 /* Netchip IDs */
228 #define CONFIG_G_DNL_VENDOR_NUM 0x0525
229 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
230 #define CONFIG_G_DNL_MANUFACTURER "Gateworks"
231 
232 /* Framebuffer and LCD */
233 #define CONFIG_VIDEO
234 #define CONFIG_VIDEO_IPUV3
235 #define CONFIG_CFB_CONSOLE
236 #define CONFIG_VGA_AS_SINGLE_DEVICE
237 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
238 #define CONFIG_VIDEO_BMP_RLE8
239 #define CONFIG_SPLASH_SCREEN
240 #define CONFIG_BMP_16BPP
241 #define CONFIG_VIDEO_LOGO
242 #define CONFIG_IPUV3_CLK          260000000
243 #define CONFIG_CMD_HDMIDETECT
244 #define CONFIG_CONSOLE_MUX
245 #define CONFIG_IMX_HDMI
246 #define CONFIG_IMX_VIDEO_SKIP
247 
248 /* serial console (ttymxc1,115200) */
249 #define CONFIG_CONS_INDEX              1
250 #define CONFIG_BAUDRATE                115200
251 
252 /* Miscellaneous configurable options */
253 #define CONFIG_SYS_LONGHELP
254 #define CONFIG_SYS_HUSH_PARSER
255 #define CONFIG_SYS_PROMPT	             "Ventana > "
256 #define CONFIG_SYS_CBSIZE	             1024
257 #define CONFIG_AUTO_COMPLETE
258 #define CONFIG_CMDLINE_EDITING
259 #define CONFIG_HWCONFIG
260 
261 /* Print Buffer Size */
262 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
263 #define CONFIG_SYS_MAXARGS	           16
264 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
265 
266 /* Memory configuration */
267 #define CONFIG_SYS_MEMTEST_START       0x10000000
268 #define CONFIG_SYS_MEMTEST_END	       0x10010000
269 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
270 #define CONFIG_SYS_TEXT_BASE	         0x17800000
271 #define CONFIG_SYS_LOAD_ADDR           0x12000000
272 
273 /* Physical Memory Map */
274 #define CONFIG_NR_DRAM_BANKS           1
275 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
276 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
277 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
278 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
279 
280 #define CONFIG_SYS_INIT_SP_OFFSET \
281 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
282 #define CONFIG_SYS_INIT_SP_ADDR \
283 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
284 
285 /* FLASH and environment organization */
286 #define CONFIG_SYS_NO_FLASH  /* no NOR flash */
287 
288 /*
289  * MTD Command for mtdparts
290  */
291 #define CONFIG_CMD_MTDPARTS
292 #define CONFIG_MTD_DEVICE
293 #define CONFIG_MTD_PARTITIONS
294 #ifdef CONFIG_SPI_FLASH
295 #define MTDIDS_DEFAULT    "nor0=nor"
296 #define MTDPARTS_DEFAULT  \
297 	"mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)"
298 #else
299 #define MTDIDS_DEFAULT    "nand0=nand"
300 #define MTDPARTS_DEFAULT  "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
301 #endif
302 
303 /* Persistent Environment Config */
304 #define CONFIG_ENV_OVERWRITE    /* allow to overwrite serial and ethaddr */
305 #ifdef CONFIG_SPI_FLASH
306 #define CONFIG_ENV_IS_IN_SPI_FLASH
307 #else
308 #define CONFIG_ENV_IS_IN_NAND
309 #endif
310 #if defined(CONFIG_ENV_IS_IN_MMC)
311   #define CONFIG_ENV_OFFSET              (6 * 64 * 1024)
312   #define CONFIG_ENV_SIZE                (8 * 1024)
313   #define CONFIG_SYS_MMC_ENV_DEV         0
314 #elif defined(CONFIG_ENV_IS_IN_NAND)
315   #define CONFIG_ENV_OFFSET              (16 << 20)
316   #define CONFIG_ENV_SECT_SIZE           (128 << 10)
317   #define CONFIG_ENV_SIZE                CONFIG_ENV_SECT_SIZE
318   #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + (512 << 10))
319   #define CONFIG_ENV_SIZE_REDUND         CONFIG_ENV_SIZE
320 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
321   #define CONFIG_ENV_OFFSET              (512 * 1024)
322   #define CONFIG_ENV_SECT_SIZE           (64 * 1024)
323   #define CONFIG_ENV_SIZE                (8 * 1024)
324   #define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
325   #define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
326   #define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
327   #define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
328 #endif
329 
330 /* Environment */
331 #define CONFIG_BOOTDELAY          3
332 #define CONFIG_LOADADDR           CONFIG_SYS_LOAD_ADDR
333 #define CONFIG_IPADDR             192.168.1.1
334 #define CONFIG_SERVERIP           192.168.1.146
335 #define HWCONFIG_DEFAULT \
336 	"hwconfig=rs232;" \
337 	"dio0:mode=gpio;dio1:mode=gpio;dio2:mode=gpio;dio3:mode=gpio\0" \
338 
339 #define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
340 	"usb_pgood_delay=2000\0" \
341 	"console=ttymxc1\0" \
342 	"bootdevs=usb mmc sata flash\0" \
343 	HWCONFIG_DEFAULT \
344 	"video=\0" \
345 	\
346 	"mtdparts=" MTDPARTS_DEFAULT "\0" \
347 	"mtdids=" MTDIDS_DEFAULT "\0" \
348 	\
349 	"fdt_high=0xffffffff\0" \
350 	"fdt_addr=0x18000000\0" \
351 	"initrd_high=0xffffffff\0" \
352 	"bootdir=boot\0" \
353 	"loadfdt=" \
354 		"if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \
355 			"echo Loaded DTB from ${bootdir}/${fdt_file}; " \
356 		"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \
357 			"echo Loaded DTB from ${bootdir}/${fdt_file1}; " \
358 		"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \
359 			"echo Loaded DTB from ${bootdir}/${fdt_file2}; " \
360 		"fi\0" \
361 	\
362 	"script=6x_bootscript-ventana\0" \
363 	"loadscript=" \
364 		"if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \
365 			"source; " \
366 		"fi\0" \
367 	\
368 	"uimage=uImage\0" \
369 	"mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \
370 	"mmc_boot=" \
371 		"setenv fsload 'ext2load mmc 0:1'; " \
372 		"mmc dev 0 && mmc rescan && " \
373 		"setenv dtype mmc; run loadscript; " \
374 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
375 			"setenv bootargs console=${console},${baudrate} " \
376 				"root=/dev/mmcblk0p1 rootfstype=ext4 " \
377 				"rootwait rw ${video} ${extra}; " \
378 			"if run loadfdt && fdt addr ${fdt_addr}; then " \
379 				"bootm ${loadaddr} - ${fdt_addr}; " \
380 			"else " \
381 				"bootm; " \
382 			"fi; " \
383 		"fi\0" \
384 	\
385 	"sata_boot=" \
386 		"setenv fsload 'ext2load sata 0:1'; sata init && " \
387 		"setenv dtype sata; run loadscript; " \
388 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
389 			"setenv bootargs console=${console},${baudrate} " \
390 				"root=/dev/sda1 rootfstype=ext4 " \
391 				"rootwait rw ${video} ${extra}; " \
392 			"if run loadfdt && fdt addr ${fdt_addr}; then " \
393 				"bootm ${loadaddr} - ${fdt_addr}; " \
394 			"else " \
395 				"bootm; " \
396 			"fi; " \
397 		"fi\0" \
398 	"usb_boot=" \
399 		"setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \
400 		"setenv dtype usb; run loadscript; " \
401 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
402 			"setenv bootargs console=${console},${baudrate} " \
403 				"root=/dev/sda1 rootfstype=ext4 " \
404 				"rootwait rw ${video} ${extra}; " \
405 			"if run loadfdt && fdt addr ${fdt_addr}; then " \
406 				"bootm ${loadaddr} - ${fdt_addr}; " \
407 			"else " \
408 				"bootm; " \
409 			"fi; " \
410 		"fi\0"
411 
412 #ifdef CONFIG_SPI_FLASH
413 	#define CONFIG_EXTRA_ENV_SETTINGS \
414 	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
415 	"image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \
416 	"image_uboot=ventana/u-boot_spi.imx\0" \
417 	\
418 	"spi_koffset=0x90000\0" \
419 	"spi_klen=0x200000\0" \
420 	\
421 	"spi_updateuboot=echo Updating uboot from " \
422 		"${serverip}:${image_uboot}...; " \
423 		"tftpboot ${loadaddr} ${image_uboot} && " \
424 		"sf probe && sf erase 0 80000 && " \
425 			"sf write ${loadaddr} 400 ${filesize}\0" \
426 	"spi_update=echo Updating OS from ${serverip}:${image_os} " \
427 		"to ${spi_koffset} ...; " \
428 		"tftp ${loadaddr} ${image_os} && " \
429 		"sf probe && " \
430 		"sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \
431 	\
432 	"flash_boot=" \
433 		"if sf probe && " \
434 		"sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \
435 			"setenv bootargs console=${console},${baudrate} " \
436 				"root=/dev/mtdblock3 " \
437 				"rootfstype=squashfs,jffs2 " \
438 				"${video} ${extra}; " \
439 			"bootm; " \
440 		"fi\0"
441 #else
442 	#define CONFIG_EXTRA_ENV_SETTINGS \
443 	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
444 	\
445 	"image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \
446 	"nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \
447 		"tftp ${loadaddr} ${image_rootfs} && " \
448 		"nand erase.part rootfs && " \
449 		"nand write ${loadaddr} rootfs ${filesize}\0" \
450 	\
451 	"flash_boot=" \
452 		"setenv fsload 'ubifsload'; " \
453 		"ubi part rootfs; " \
454 		"if ubi check boot; then " \
455 			"ubifsmount ubi0:boot; " \
456 			"setenv root ubi0:rootfs ubi.mtd=2 " \
457 				"rootfstype=squashfs,ubifs; " \
458 			"setenv bootdir; " \
459 		"elif ubi check rootfs; then " \
460 			"ubifsmount ubi0:rootfs; " \
461 			"setenv root ubi0:rootfs ubi.mtd=2 " \
462 				"rootfstype=ubifs; " \
463 		"fi; " \
464 		"setenv dtype nand; run loadscript; " \
465 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
466 			"setenv bootargs console=${console},${baudrate} " \
467 				"root=${root} ${video} ${extra}; " \
468 			"if run loadfdt && fdt addr ${fdt_addr}; then " \
469 				"ubifsumount; " \
470 				"bootm ${loadaddr} - ${fdt_addr}; " \
471 			"else " \
472 				"ubifsumount; bootm; " \
473 			"fi; " \
474 		"fi\0"
475 #endif
476 
477 #define CONFIG_BOOTCOMMAND \
478 	"for btype in ${bootdevs}; do " \
479 		"echo; echo Attempting ${btype} boot...; " \
480 		"if run ${btype}_boot; then; fi; " \
481 	"done"
482 
483 /* Device Tree Support */
484 #define CONFIG_OF_BOARD_SETUP
485 #define CONFIG_OF_LIBFDT
486 #define CONFIG_FDT_FIXUP_PARTITIONS
487 
488 #ifndef CONFIG_SYS_DCACHE_OFF
489   #define CONFIG_CMD_CACHE
490 #endif
491 
492 #endif			       /* __CONFIG_H */
493