1 /* 2 * Copyright (C) 2013 Gateworks Corporation 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_H 8 #define __CONFIG_H 9 10 /* SPL */ 11 #define CONFIG_SPL_NAND_SUPPORT 12 #define CONFIG_SPL_MMC_SUPPORT 13 #define CONFIG_SPL_FAT_SUPPORT 14 /* 15 #define CONFIG_SPL_SATA_SUPPORT 16 */ 17 /* Location in NAND to read U-Boot from */ 18 #define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * 1024 * 1024) 19 20 #include "imx6_spl.h" /* common IMX6 SPL configuration */ 21 #include "mx6_common.h" 22 #define CONFIG_MX6 23 #define CONFIG_DISPLAY_CPUINFO /* display cpu info */ 24 #define CONFIG_DISPLAY_BOARDINFO_LATE /* display board info (after reloc) */ 25 26 #define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */ 27 28 #include <asm/arch/imx-regs.h> 29 #include <asm/imx-common/gpio.h> 30 31 /* ATAGs */ 32 #define CONFIG_CMDLINE_TAG 33 #define CONFIG_SETUP_MEMORY_TAGS 34 #define CONFIG_INITRD_TAG 35 #define CONFIG_SERIAL_TAG 36 #define CONFIG_REVISION_TAG 37 38 #define CONFIG_SYS_GENERIC_BOARD 39 40 /* Size of malloc() pool */ 41 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 42 43 /* Init Functions */ 44 #define CONFIG_BOARD_EARLY_INIT_F 45 #define CONFIG_MISC_INIT_R 46 47 /* GPIO */ 48 #define CONFIG_MXC_GPIO 49 50 /* Serial */ 51 #define CONFIG_MXC_UART 52 #define CONFIG_MXC_UART_BASE UART2_BASE 53 54 #ifdef CONFIG_SPI_FLASH 55 56 /* SPI */ 57 #define CONFIG_CMD_SF 58 #ifdef CONFIG_CMD_SF 59 #define CONFIG_MXC_SPI 60 #define CONFIG_SPI_FLASH_MTD 61 #define CONFIG_SPI_FLASH_BAR 62 #define CONFIG_SPI_FLASH_WINBOND 63 #define CONFIG_SF_DEFAULT_BUS 0 64 #define CONFIG_SF_DEFAULT_CS 0 65 /* GPIO 3-19 (21248) */ 66 #define CONFIG_SF_DEFAULT_SPEED 30000000 67 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 68 #endif 69 70 #else 71 /* Enable NAND support */ 72 #define CONFIG_CMD_TIME 73 #define CONFIG_CMD_NAND 74 #define CONFIG_CMD_NAND_TRIMFFS 75 #ifdef CONFIG_CMD_NAND 76 #define CONFIG_NAND_MXS 77 #define CONFIG_SYS_MAX_NAND_DEVICE 1 78 #define CONFIG_SYS_NAND_BASE 0x40000000 79 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 80 #define CONFIG_SYS_NAND_ONFI_DETECTION 81 82 /* DMA stuff, needed for GPMI/MXS NAND support */ 83 #define CONFIG_APBH_DMA 84 #define CONFIG_APBH_DMA_BURST 85 #define CONFIG_APBH_DMA_BURST8 86 #endif 87 88 #endif /* CONFIG_SPI_FLASH */ 89 90 /* Flattened Image Tree Suport */ 91 #define CONFIG_FIT 92 #define CONFIG_FIT_VERBOSE 93 94 /* I2C Configs */ 95 #define CONFIG_CMD_I2C 96 #define CONFIG_SYS_I2C 97 #define CONFIG_SYS_I2C_MXC 98 #define CONFIG_SYS_I2C_SPEED 100000 99 #define CONFIG_I2C_GSC 0 100 #define CONFIG_I2C_PMIC 1 101 102 /* MMC Configs */ 103 #define CONFIG_FSL_ESDHC 104 #define CONFIG_FSL_USDHC 105 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 106 #define CONFIG_SYS_FSL_USDHC_NUM 1 107 #define CONFIG_MMC 108 #define CONFIG_CMD_MMC 109 #define CONFIG_GENERIC_MMC 110 #define CONFIG_BOUNCE_BUFFER 111 112 /* Filesystem support */ 113 #define CONFIG_CMD_EXT2 114 #define CONFIG_CMD_FAT 115 #define CONFIG_CMD_UBIFS 116 #define CONFIG_DOS_PARTITION 117 118 /* 119 * SATA Configs 120 */ 121 #define CONFIG_CMD_SATA 122 #ifdef CONFIG_CMD_SATA 123 #define CONFIG_DWC_AHSATA 124 #define CONFIG_SYS_SATA_MAX_DEVICE 1 125 #define CONFIG_DWC_AHSATA_PORT_ID 0 126 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 127 #define CONFIG_LBA48 128 #define CONFIG_LIBATA 129 #endif 130 131 /* 132 * PCI express 133 */ 134 #define CONFIG_CMD_PCI 135 #ifdef CONFIG_CMD_PCI 136 #define CONFIG_PCI 137 #define CONFIG_PCI_PNP 138 #define CONFIG_PCI_SCAN_SHOW 139 #define CONFIG_PCI_FIXUP_DEV 140 #define CONFIG_PCIE_IMX 141 #endif 142 143 /* 144 * PMIC 145 */ 146 #define CONFIG_POWER 147 #define CONFIG_POWER_I2C 148 #define CONFIG_POWER_PFUZE100 149 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 150 #define CONFIG_POWER_LTC3676 151 #define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c 152 153 /* Various command support */ 154 #include <config_cmd_default.h> 155 #undef CONFIG_CMD_IMLS 156 #define CONFIG_CMD_PING 157 #define CONFIG_CMD_DHCP 158 #define CONFIG_CMD_MII 159 #define CONFIG_CMD_NET 160 #define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */ 161 #define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */ 162 #define CONFIG_CMD_SETEXPR 163 #define CONFIG_CMD_BOOTZ 164 #define CONFIG_CMD_GSC 165 #define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */ 166 #define CONFIG_CMD_UBI 167 #define CONFIG_RBTREE 168 #define CONFIG_LZO 169 #define CONFIG_CMD_FUSE /* eFUSE read/write support */ 170 #ifdef CONFIG_CMD_FUSE 171 #define CONFIG_MXC_OCOTP 172 #endif 173 174 175 /* Ethernet support */ 176 #define CONFIG_FEC_MXC 177 #define CONFIG_E1000 178 #define CONFIG_MII 179 #define IMX_FEC_BASE ENET_BASE_ADDR 180 #define CONFIG_FEC_XCV_TYPE RGMII 181 #define CONFIG_FEC_MXC_PHYADDR 0 182 #define CONFIG_PHYLIB 183 #define CONFIG_ARP_TIMEOUT 200UL 184 185 /* USB Configs */ 186 #define CONFIG_CMD_USB 187 #define CONFIG_USB_EHCI 188 #define CONFIG_USB_EHCI_MX6 189 #define CONFIG_USB_STORAGE 190 #define CONFIG_USB_HOST_ETHER 191 #define CONFIG_USB_ETHER_ASIX 192 #define CONFIG_USB_ETHER_SMSC95XX 193 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 194 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 195 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 196 #define CONFIG_MXC_USB_FLAGS 0 197 #define CONFIG_USB_KEYBOARD 198 #define CONFIG_CI_UDC 199 #define CONFIG_USBD_HS 200 #define CONFIG_USB_GADGET_DUALSPEED 201 #define CONFIG_USB_ETHER 202 #define CONFIG_USB_ETH_CDC 203 #define CONFIG_NETCONSOLE 204 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 205 206 /* USB Mass Storage Gadget */ 207 #define CONFIG_USB_GADGET 208 #define CONFIG_CMD_USB_MASS_STORAGE 209 #define CONFIG_USB_GADGET_MASS_STORAGE 210 #define CONFIG_USBDOWNLOAD_GADGET 211 #define CONFIG_USB_GADGET_VBUS_DRAW 2 212 213 /* Netchip IDs */ 214 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 215 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 216 #define CONFIG_G_DNL_MANUFACTURER "Gateworks" 217 218 /* Framebuffer and LCD */ 219 #define CONFIG_VIDEO 220 #define CONFIG_VIDEO_IPUV3 221 #define CONFIG_CFB_CONSOLE 222 #define CONFIG_VGA_AS_SINGLE_DEVICE 223 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 224 #define CONFIG_VIDEO_BMP_RLE8 225 #define CONFIG_SPLASH_SCREEN 226 #define CONFIG_BMP_16BPP 227 #define CONFIG_VIDEO_LOGO 228 #define CONFIG_IPUV3_CLK 260000000 229 #define CONFIG_CMD_HDMIDETECT 230 #define CONFIG_CONSOLE_MUX 231 #define CONFIG_IMX_HDMI 232 #define CONFIG_IMX_VIDEO_SKIP 233 234 /* serial console (ttymxc1,115200) */ 235 #define CONFIG_CONS_INDEX 1 236 #define CONFIG_BAUDRATE 115200 237 238 /* Miscellaneous configurable options */ 239 #define CONFIG_SYS_LONGHELP 240 #define CONFIG_SYS_HUSH_PARSER 241 #define CONFIG_SYS_PROMPT "Ventana > " 242 #define CONFIG_SYS_CBSIZE 1024 243 #define CONFIG_AUTO_COMPLETE 244 #define CONFIG_CMDLINE_EDITING 245 #define CONFIG_HWCONFIG 246 247 /* Print Buffer Size */ 248 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 249 #define CONFIG_SYS_MAXARGS 16 250 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 251 252 /* Memory configuration */ 253 #define CONFIG_SYS_MEMTEST_START 0x10000000 254 #define CONFIG_SYS_MEMTEST_END 0x10010000 255 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 256 #define CONFIG_SYS_TEXT_BASE 0x17800000 257 #define CONFIG_SYS_LOAD_ADDR 0x12000000 258 259 /* Physical Memory Map */ 260 #define CONFIG_NR_DRAM_BANKS 1 261 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 262 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 263 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 264 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 265 266 #define CONFIG_SYS_INIT_SP_OFFSET \ 267 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 268 #define CONFIG_SYS_INIT_SP_ADDR \ 269 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 270 271 /* FLASH and environment organization */ 272 #define CONFIG_SYS_NO_FLASH /* no NOR flash */ 273 274 /* 275 * MTD Command for mtdparts 276 */ 277 #define CONFIG_CMD_MTDPARTS 278 #define CONFIG_MTD_DEVICE 279 #define CONFIG_MTD_PARTITIONS 280 #ifdef CONFIG_SPI_FLASH 281 #define MTDIDS_DEFAULT "nor0=nor" 282 #define MTDPARTS_DEFAULT \ 283 "mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)" 284 #else 285 #define MTDIDS_DEFAULT "nand0=nand" 286 #define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)" 287 #endif 288 289 /* Persistent Environment Config */ 290 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */ 291 #ifdef CONFIG_SPI_FLASH 292 #define CONFIG_ENV_IS_IN_SPI_FLASH 293 #else 294 #define CONFIG_ENV_IS_IN_NAND 295 #endif 296 #if defined(CONFIG_ENV_IS_IN_MMC) 297 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 298 #define CONFIG_ENV_SIZE (8 * 1024) 299 #define CONFIG_SYS_MMC_ENV_DEV 0 300 #elif defined(CONFIG_ENV_IS_IN_NAND) 301 #define CONFIG_ENV_OFFSET (16 << 20) 302 #define CONFIG_ENV_SECT_SIZE (128 << 10) 303 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 304 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 << 10)) 305 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 306 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) 307 #define CONFIG_ENV_OFFSET (512 * 1024) 308 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 309 #define CONFIG_ENV_SIZE (8 * 1024) 310 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 311 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 312 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 313 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 314 #endif 315 316 /* Environment */ 317 #define CONFIG_BOOTDELAY 3 318 #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR 319 #define CONFIG_IPADDR 192.168.1.1 320 #define CONFIG_SERVERIP 192.168.1.146 321 #define HWCONFIG_DEFAULT \ 322 "hwconfig=rs232;" \ 323 "dio0:mode=gpio;dio1:mode=gpio;dio2:mode=gpio;dio3:mode=gpio\0" \ 324 325 #define CONFIG_EXTRA_ENV_SETTINGS_COMMON \ 326 "console=ttymxc1\0" \ 327 "bootdevs=usb mmc sata flash\0" \ 328 HWCONFIG_DEFAULT \ 329 "video=\0" \ 330 \ 331 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 332 "mtdids=" MTDIDS_DEFAULT "\0" \ 333 \ 334 "fdt_high=0xffffffff\0" \ 335 "fdt_addr=0x18000000\0" \ 336 "loadfdt=" \ 337 "if ${fsload} ${fdt_addr} boot/${fdt_file}; then " \ 338 "echo Loaded DTB from boot/${fdt_file}; " \ 339 "elif ${fsload} ${fdt_addr} boot/${fdt_file1}; then " \ 340 "echo Loaded DTB from boot/${fdt_file1}; " \ 341 "elif ${fsload} ${fdt_addr} boot/${fdt_file2}; then " \ 342 "echo Loaded DTB from boot/${fdt_file2}; " \ 343 "fi\0" \ 344 \ 345 "script=boot/6x_bootscript-ventana\0" \ 346 "loadscript=" \ 347 "if ${fsload} ${loadaddr} ${script}; then " \ 348 "source; " \ 349 "fi\0" \ 350 \ 351 "uimage=boot/uImage\0" \ 352 "mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \ 353 "mmc_boot=" \ 354 "setenv fsload 'ext2load mmc 0:1'; " \ 355 "mmc dev 0 && mmc rescan && " \ 356 "run loadscript; " \ 357 "if ${fsload} ${loadaddr} ${uimage}; then " \ 358 "setenv bootargs console=${console},${baudrate} " \ 359 "root=/dev/mmcblk0p1 rootfstype=ext4 " \ 360 "rootwait rw ${video} ${extra}; " \ 361 "if run loadfdt && fdt addr ${fdt_addr}; then " \ 362 "bootm ${loadaddr} - ${fdt_addr}; " \ 363 "else " \ 364 "bootm; " \ 365 "fi; " \ 366 "fi\0" \ 367 \ 368 "sata_boot=" \ 369 "setenv fsload 'ext2load sata 0:1'; sata init && " \ 370 "run loadscript; " \ 371 "if ${fsload} ${loadaddr} ${uimage}; then " \ 372 "setenv bootargs console=${console},${baudrate} " \ 373 "root=/dev/sda1 rootfstype=ext4 " \ 374 "rootwait rw ${video} ${extra}; " \ 375 "if run loadfdt && fdt addr ${fdt_addr}; then " \ 376 "bootm ${loadaddr} - ${fdt_addr}; " \ 377 "else " \ 378 "bootm; " \ 379 "fi; " \ 380 "fi\0" \ 381 "usb_boot=" \ 382 "setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \ 383 "run loadscript; " \ 384 "if ${fsload} ${loadaddr} ${uimage}; then " \ 385 "setenv bootargs console=${console},${baudrate} " \ 386 "root=/dev/sda1 rootfstype=ext4 " \ 387 "rootwait rw ${video} ${extra}; " \ 388 "if run loadfdt && fdt addr ${fdt_addr}; then " \ 389 "bootm ${loadaddr} - ${fdt_addr}; " \ 390 "else " \ 391 "bootm; " \ 392 "fi; " \ 393 "fi\0" 394 395 #ifdef CONFIG_SPI_FLASH 396 #define CONFIG_EXTRA_ENV_SETTINGS \ 397 CONFIG_EXTRA_ENV_SETTINGS_COMMON \ 398 "image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \ 399 "image_uboot=ventana/u-boot_spi.imx\0" \ 400 \ 401 "spi_koffset=0x90000\0" \ 402 "spi_klen=0x200000\0" \ 403 \ 404 "spi_updateuboot=echo Updating uboot from " \ 405 "${serverip}:${image_uboot}...; " \ 406 "tftpboot ${loadaddr} ${image_uboot} && " \ 407 "sf probe && sf erase 0 80000 && " \ 408 "sf write ${loadaddr} 400 ${filesize}\0" \ 409 "spi_update=echo Updating OS from ${serverip}:${image_os} " \ 410 "to ${spi_koffset} ...; " \ 411 "tftp ${loadaddr} ${image_os} && " \ 412 "sf probe && " \ 413 "sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \ 414 \ 415 "flash_boot=" \ 416 "if sf probe && " \ 417 "sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \ 418 "setenv bootargs console=${console},${baudrate} " \ 419 "root=/dev/mtdblock3 " \ 420 "rootfstype=squashfs,jffs2 " \ 421 "${video} ${extra}; " \ 422 "bootm; " \ 423 "fi\0" 424 #else 425 #define CONFIG_EXTRA_ENV_SETTINGS \ 426 CONFIG_EXTRA_ENV_SETTINGS_COMMON \ 427 "image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \ 428 \ 429 "nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \ 430 "tftp ${loadaddr} ${image_rootfs} && " \ 431 "nand erase.part rootfs && " \ 432 "nand write ${loadaddr} rootfs ${filesize}\0" \ 433 \ 434 "flash_boot=" \ 435 "setenv fsload 'ubifsload'; " \ 436 "ubi part rootfs && ubifsmount ubi0:rootfs; " \ 437 "run loadscript; " \ 438 "if ${fsload} ${loadaddr} ${uimage}; then " \ 439 "setenv bootargs console=${console},${baudrate} " \ 440 "root=ubi0:rootfs ubi.mtd=2 " \ 441 "rootfstype=ubifs ${video} ${extra}; " \ 442 "if run loadfdt && fdt addr ${fdt_addr}; then " \ 443 "ubifsumount; " \ 444 "bootm ${loadaddr} - ${fdt_addr}; " \ 445 "else " \ 446 "ubifsumount; bootm; " \ 447 "fi; " \ 448 "fi\0" 449 #endif 450 451 #define CONFIG_BOOTCOMMAND \ 452 "for btype in ${bootdevs}; do " \ 453 "echo; echo Attempting ${btype} boot...; " \ 454 "if run ${btype}_boot; then; fi; " \ 455 "done" 456 457 /* Device Tree Support */ 458 #define CONFIG_OF_BOARD_SETUP 459 #define CONFIG_OF_LIBFDT 460 #define CONFIG_FDT_FIXUP_PARTITIONS 461 462 #ifndef CONFIG_SYS_DCACHE_OFF 463 #define CONFIG_CMD_CACHE 464 #endif 465 466 #endif /* __CONFIG_H */ 467