1 /* 2 * include/configs/gose.h 3 * 4 * Copyright (C) 2014 Renesas Electronics Corporation 5 * 6 * SPDX-License-Identifier: GPL-2.0 7 */ 8 9 #ifndef __GOSE_H 10 #define __GOSE_H 11 12 #undef DEBUG 13 #define CONFIG_R8A7793 14 #define CONFIG_RMOBILE_BOARD_STRING "Gose" 15 #define CONFIG_SH_GPIO_PFC 16 17 #include <asm/arch/rmobile.h> 18 19 #define CONFIG_CMD_EDITENV 20 #define CONFIG_CMD_SAVEENV 21 #define CONFIG_CMD_MEMORY 22 #define CONFIG_CMD_DFL 23 #define CONFIG_CMD_SDRAM 24 #define CONFIG_CMD_RUN 25 #define CONFIG_CMD_LOADS 26 #define CONFIG_CMD_BOOTZ 27 #define CONFIG_CMD_SF 28 #define CONFIG_CMD_SPI 29 #define CONFIG_CMD_I2C 30 #define CONFIG_CMD_NET 31 #define CONFIG_CMD_PING 32 #define CONFIG_CMD_NFS 33 #define CONFIG_CMD_DHCP 34 #define CONFIG_CMD_MII 35 36 #if defined(CONFIG_RMOBILE_EXTRAM_BOOT) 37 #define CONFIG_SYS_TEXT_BASE 0x70000000 38 #else 39 #define CONFIG_SYS_TEXT_BASE 0xE6304000 40 #endif 41 42 #define CONFIG_SYS_THUMB_BUILD 43 #define CONFIG_SYS_GENERIC_BOARD 44 45 #define CONFIG_CMDLINE_TAG 46 #define CONFIG_SETUP_MEMORY_TAGS 47 #define CONFIG_INITRD_TAG 48 #define CONFIG_CMDLINE_EDITING 49 50 #define CONFIG_OF_LIBFDT 51 52 #define CONFIG_BAUDRATE 38400 53 #define CONFIG_BOOTDELAY 3 54 #define CONFIG_BOOTARGS "" 55 56 #define CONFIG_VERSION_VARIABLE 57 #undef CONFIG_SHOW_BOOT_PROGRESS 58 59 #define CONFIG_ARCH_CPU_INIT 60 #define CONFIG_DISPLAY_CPUINFO 61 #define CONFIG_DISPLAY_BOARDINFO 62 #define CONFIG_BOARD_EARLY_INIT_F 63 #define CONFIG_TMU_TIMER 64 65 /* STACK */ 66 #if defined(CONFIG_RMOBILE_EXTRAM_BOOT) 67 #define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC 68 #else 69 #define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC 70 #endif 71 72 #define STACK_AREA_SIZE 0xC000 73 #define LOW_LEVEL_MERAM_STACK \ 74 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 75 76 /* MEMORY */ 77 #define GOSE_SDRAM_BASE 0x40000000 78 #define GOSE_SDRAM_SIZE 0x40000000 79 #define GOSE_UBOOT_SDRAM_SIZE 0x20000000 80 81 #define CONFIG_SYS_LONGHELP 82 #define CONFIG_SYS_CBSIZE 256 83 #define CONFIG_SYS_PBSIZE 256 84 #define CONFIG_SYS_MAXARGS 16 85 #define CONFIG_SYS_BARGSIZE 512 86 #define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 } 87 88 /* SCIF */ 89 #define CONFIG_SCIF_CONSOLE 90 #define CONFIG_CONS_SCIF0 91 #define CONFIG_SCIF_USE_EXT_CLK 92 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 93 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 94 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 95 96 #define CONFIG_SYS_MEMTEST_START (GOSE_SDRAM_BASE) 97 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 98 504 * 1024 * 1024) 99 #undef CONFIG_SYS_ALT_MEMTEST 100 #undef CONFIG_SYS_MEMTEST_SCRATCH 101 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 102 103 #define CONFIG_SYS_SDRAM_BASE (GOSE_SDRAM_BASE) 104 #define CONFIG_SYS_SDRAM_SIZE (GOSE_UBOOT_SDRAM_SIZE) 105 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fc0) 106 #define CONFIG_NR_DRAM_BANKS 1 107 108 #define CONFIG_SYS_MONITOR_BASE 0x00000000 109 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 110 #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) 111 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 112 113 /* FLASH */ 114 #define CONFIG_SYS_NO_FLASH 115 #define CONFIG_SPI 116 #define CONFIG_SH_QSPI 117 #define CONFIG_SPI_FLASH 118 #define CONFIG_SPI_FLASH_BAR 119 #define CONFIG_SPI_FLASH_SPANSION 120 /* ENV setting */ 121 #define CONFIG_ENV_IS_IN_SPI_FLASH 122 #define CONFIG_ENV_ADDR 0xC0000 123 124 /* Common ENV setting */ 125 #define CONFIG_ENV_OVERWRITE 126 #define CONFIG_ENV_SECT_SIZE (256 * 1024) 127 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) 128 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 129 #define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN) 130 131 /* SH Ether */ 132 #define CONFIG_NET_MULTI 133 #define CONFIG_SH_ETHER 134 #define CONFIG_SH_ETHER_USE_PORT 0 135 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 136 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 137 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 138 #define CONFIG_SH_ETHER_CACHE_INVALIDATE 139 #define CONFIG_PHYLIB 140 #define CONFIG_PHY_MICREL 141 #define CONFIG_BITBANGMII 142 #define CONFIG_BITBANGMII_MULTI 143 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 144 145 /* Board Clock */ 146 #define RMOBILE_XTAL_CLK 20000000u 147 #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 148 #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) 149 #define CONFIG_SH_SCIF_CLK_FREQ 14745600 150 #define CONFIG_SYS_TMU_CLK_DIV 4 151 152 /* I2C */ 153 #define CONFIG_SYS_I2C 154 #define CONFIG_SYS_I2C_SH 155 #define CONFIG_SYS_I2C_SLAVE 0x7F 156 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3 157 #define CONFIG_SYS_I2C_SH_BASE0 0xE6500000 158 #define CONFIG_SYS_I2C_SH_SPEED0 400000 159 #define CONFIG_SYS_I2C_SH_BASE1 0xE6510000 160 #define CONFIG_SYS_I2C_SH_SPEED1 400000 161 #define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000 162 #define CONFIG_SYS_I2C_SH_SPEED2 400000 163 #define CONFIG_SH_I2C_DATA_HIGH 4 164 #define CONFIG_SH_I2C_DATA_LOW 5 165 #define CONFIG_SH_I2C_CLOCK 10000000 166 167 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 168 169 #endif /* __GOSE_H */ 170