xref: /rk3399_rockchip-uboot/include/configs/gose.h (revision 6a994e5bb6ba0193d655e2cd67ff8d93bfe66d82)
1 /*
2  * include/configs/gose.h
3  *
4  * Copyright (C) 2014 Renesas Electronics Corporation
5  *
6  * SPDX-License-Identifier: GPL-2.0
7  */
8 
9 #ifndef __GOSE_H
10 #define __GOSE_H
11 
12 #undef DEBUG
13 #define CONFIG_R8A7793
14 #define CONFIG_RMOBILE_BOARD_STRING "Gose"
15 #define CONFIG_SH_GPIO_PFC
16 
17 #include <asm/arch/rmobile.h>
18 
19 #define CONFIG_CMD_EDITENV
20 #define CONFIG_CMD_SAVEENV
21 #define CONFIG_CMD_MEMORY
22 #define CONFIG_CMD_DFL
23 #define CONFIG_CMD_SDRAM
24 #define CONFIG_CMD_RUN
25 #define CONFIG_CMD_LOADS
26 #define CONFIG_CMD_BOOTZ
27 #define CONFIG_CMD_SF
28 #define CONFIG_CMD_SPI
29 #define CONFIG_CMD_I2C
30 
31 #if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
32 #define CONFIG_SYS_TEXT_BASE	0x70000000
33 #else
34 #define CONFIG_SYS_TEXT_BASE	0xE6304000
35 #endif
36 
37 #define CONFIG_SYS_THUMB_BUILD
38 #define CONFIG_SYS_GENERIC_BOARD
39 
40 #define	CONFIG_CMDLINE_TAG
41 #define	CONFIG_SETUP_MEMORY_TAGS
42 #define	CONFIG_INITRD_TAG
43 #define	CONFIG_CMDLINE_EDITING
44 
45 #define CONFIG_OF_LIBFDT
46 
47 #define CONFIG_BAUDRATE		38400
48 #define CONFIG_BOOTDELAY	3
49 #define CONFIG_BOOTARGS		""
50 
51 #define CONFIG_VERSION_VARIABLE
52 #undef	CONFIG_SHOW_BOOT_PROGRESS
53 
54 #define CONFIG_ARCH_CPU_INIT
55 #define CONFIG_DISPLAY_CPUINFO
56 #define CONFIG_DISPLAY_BOARDINFO
57 #define CONFIG_BOARD_EARLY_INIT_F
58 #define CONFIG_TMU_TIMER
59 
60 /* STACK */
61 #if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
62 #define CONFIG_SYS_INIT_SP_ADDR		0x7003FFFC
63 #else
64 #define CONFIG_SYS_INIT_SP_ADDR		0xE633FFFC
65 #endif
66 
67 #define STACK_AREA_SIZE			0xC000
68 #define LOW_LEVEL_MERAM_STACK	\
69 	(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
70 
71 /* MEMORY */
72 #define GOSE_SDRAM_BASE		0x40000000
73 #define GOSE_SDRAM_SIZE		0x40000000
74 #define GOSE_UBOOT_SDRAM_SIZE	0x20000000
75 
76 #define CONFIG_SYS_LONGHELP
77 #define CONFIG_SYS_CBSIZE		256
78 #define CONFIG_SYS_PBSIZE		256
79 #define CONFIG_SYS_MAXARGS		16
80 #define CONFIG_SYS_BARGSIZE		512
81 #define CONFIG_SYS_BAUDRATE_TABLE	{ 38400, 115200 }
82 
83 /* SCIF */
84 #define CONFIG_SCIF_CONSOLE
85 #define CONFIG_CONS_SCIF0
86 #define CONFIG_SCIF_USE_EXT_CLK
87 #undef	CONFIG_SYS_CONSOLE_INFO_QUIET
88 #undef	CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
89 #undef	CONFIG_SYS_CONSOLE_ENV_OVERWRITE
90 
91 #define CONFIG_SYS_MEMTEST_START	(GOSE_SDRAM_BASE)
92 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
93 					 504 * 1024 * 1024)
94 #undef	CONFIG_SYS_ALT_MEMTEST
95 #undef	CONFIG_SYS_MEMTEST_SCRATCH
96 #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
97 
98 #define CONFIG_SYS_SDRAM_BASE		(GOSE_SDRAM_BASE)
99 #define CONFIG_SYS_SDRAM_SIZE		(GOSE_UBOOT_SDRAM_SIZE)
100 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x7fc0)
101 #define CONFIG_NR_DRAM_BANKS		1
102 
103 #define CONFIG_SYS_MONITOR_BASE		0x00000000
104 #define CONFIG_SYS_MONITOR_LEN		(256 * 1024)
105 #define CONFIG_SYS_MALLOC_LEN		(1 * 1024 * 1024)
106 #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
107 
108 /* FLASH */
109 #define CONFIG_SYS_NO_FLASH
110 #define CONFIG_SPI
111 #define CONFIG_SH_QSPI
112 #define CONFIG_SPI_FLASH
113 #define CONFIG_SPI_FLASH_BAR
114 #define CONFIG_SPI_FLASH_SPANSION
115 /* ENV setting */
116 #define CONFIG_ENV_IS_IN_SPI_FLASH
117 #define CONFIG_ENV_ADDR	0xC0000
118 
119 /* Common ENV setting */
120 #define CONFIG_ENV_OVERWRITE
121 #define CONFIG_ENV_SECT_SIZE	(256 * 1024)
122 #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR)
123 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
124 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_SYS_MONITOR_LEN)
125 
126 /* Board Clock */
127 #define RMOBILE_XTAL_CLK	20000000u
128 #define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
129 #define CONFIG_SH_TMU_CLK_FREQ	(CONFIG_SYS_CLK_FREQ / 2)
130 #define CONFIG_SH_SCIF_CLK_FREQ	14745600
131 #define CONFIG_SYS_TMU_CLK_DIV	4
132 
133 /* I2C */
134 #define CONFIG_SYS_I2C
135 #define CONFIG_SYS_I2C_SH
136 #define CONFIG_SYS_I2C_SLAVE	0x7F
137 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	3
138 #define CONFIG_SYS_I2C_SH_BASE0		0xE6500000
139 #define CONFIG_SYS_I2C_SH_SPEED0	400000
140 #define CONFIG_SYS_I2C_SH_BASE1		0xE6510000
141 #define CONFIG_SYS_I2C_SH_SPEED1	400000
142 #define CONFIG_SYS_I2C_SH_BASE2		0xE60B0000
143 #define CONFIG_SYS_I2C_SH_SPEED2	400000
144 #define CONFIG_SH_I2C_DATA_HIGH	4
145 #define CONFIG_SH_I2C_DATA_LOW	5
146 #define CONFIG_SH_I2C_CLOCK	10000000
147 
148 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
149 
150 #endif	/* __GOSE_H */
151