16a994e5bSNobuhiro Iwamatsu /* 26a994e5bSNobuhiro Iwamatsu * include/configs/gose.h 36a994e5bSNobuhiro Iwamatsu * 46a994e5bSNobuhiro Iwamatsu * Copyright (C) 2014 Renesas Electronics Corporation 56a994e5bSNobuhiro Iwamatsu * 66a994e5bSNobuhiro Iwamatsu * SPDX-License-Identifier: GPL-2.0 76a994e5bSNobuhiro Iwamatsu */ 86a994e5bSNobuhiro Iwamatsu 96a994e5bSNobuhiro Iwamatsu #ifndef __GOSE_H 106a994e5bSNobuhiro Iwamatsu #define __GOSE_H 116a994e5bSNobuhiro Iwamatsu 126a994e5bSNobuhiro Iwamatsu #undef DEBUG 136a994e5bSNobuhiro Iwamatsu #define CONFIG_R8A7793 14*1cc95f6eSNobuhiro Iwamatsu #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Gose" 156a994e5bSNobuhiro Iwamatsu 165ca6dfe6SNobuhiro Iwamatsu #include "rcar-gen2-common.h" 176a994e5bSNobuhiro Iwamatsu 18*1cc95f6eSNobuhiro Iwamatsu #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT) 196a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE 0x70000000 206a994e5bSNobuhiro Iwamatsu #else 216a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE 0xE6304000 226a994e5bSNobuhiro Iwamatsu #endif 236a994e5bSNobuhiro Iwamatsu 246a994e5bSNobuhiro Iwamatsu /* STACK */ 25*1cc95f6eSNobuhiro Iwamatsu #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT) 266a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC 276a994e5bSNobuhiro Iwamatsu #else 286a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC 296a994e5bSNobuhiro Iwamatsu #endif 306a994e5bSNobuhiro Iwamatsu 316a994e5bSNobuhiro Iwamatsu #define STACK_AREA_SIZE 0xC000 326a994e5bSNobuhiro Iwamatsu #define LOW_LEVEL_MERAM_STACK \ 336a994e5bSNobuhiro Iwamatsu (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 346a994e5bSNobuhiro Iwamatsu 356a994e5bSNobuhiro Iwamatsu /* MEMORY */ 365ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_SDRAM_BASE 0x40000000 375ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_SDRAM_SIZE 0x40000000 385ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_UBOOT_SDRAM_SIZE 0x20000000 396a994e5bSNobuhiro Iwamatsu 406a994e5bSNobuhiro Iwamatsu /* SCIF */ 416a994e5bSNobuhiro Iwamatsu #define CONFIG_SCIF_CONSOLE 426a994e5bSNobuhiro Iwamatsu 436a994e5bSNobuhiro Iwamatsu /* FLASH */ 446a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_NO_FLASH 456a994e5bSNobuhiro Iwamatsu #define CONFIG_SPI 466a994e5bSNobuhiro Iwamatsu #define CONFIG_SH_QSPI 476a994e5bSNobuhiro Iwamatsu 48f0261243SNobuhiro Iwamatsu /* SH Ether */ 49f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER 50f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_USE_PORT 0 51f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_ADDR 0x1 52f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 53f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_CACHE_WRITEBACK 54f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_CACHE_INVALIDATE 55f0261243SNobuhiro Iwamatsu #define CONFIG_PHYLIB 56f0261243SNobuhiro Iwamatsu #define CONFIG_PHY_MICREL 57f0261243SNobuhiro Iwamatsu #define CONFIG_BITBANGMII 58f0261243SNobuhiro Iwamatsu #define CONFIG_BITBANGMII_MULTI 59f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 60f0261243SNobuhiro Iwamatsu 616a994e5bSNobuhiro Iwamatsu /* Board Clock */ 626a994e5bSNobuhiro Iwamatsu #define RMOBILE_XTAL_CLK 20000000u 636a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 646a994e5bSNobuhiro Iwamatsu #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) 656a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_TMU_CLK_DIV 4 666a994e5bSNobuhiro Iwamatsu 676a994e5bSNobuhiro Iwamatsu /* I2C */ 686a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C 696a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH 706a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SLAVE 0x7F 716a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3 726a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED0 400000 736a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED1 400000 746a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED2 400000 756a994e5bSNobuhiro Iwamatsu #define CONFIG_SH_I2C_DATA_HIGH 4 766a994e5bSNobuhiro Iwamatsu #define CONFIG_SH_I2C_DATA_LOW 5 776a994e5bSNobuhiro Iwamatsu #define CONFIG_SH_I2C_CLOCK 10000000 786a994e5bSNobuhiro Iwamatsu 796a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 806a994e5bSNobuhiro Iwamatsu 81d3ee73fcSNobuhiro Iwamatsu /* USB */ 82d3ee73fcSNobuhiro Iwamatsu #define CONFIG_USB_STORAGE 83d3ee73fcSNobuhiro Iwamatsu #define CONFIG_USB_EHCI 84d3ee73fcSNobuhiro Iwamatsu #define CONFIG_USB_EHCI_RMOBILE 85d3ee73fcSNobuhiro Iwamatsu #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 86d3ee73fcSNobuhiro Iwamatsu 878e2e5886SNobuhiro Iwamatsu /* Module stop status bits */ 888e2e5886SNobuhiro Iwamatsu /* INTC-RT */ 898e2e5886SNobuhiro Iwamatsu #define CONFIG_SMSTP0_ENA 0x00400000 908e2e5886SNobuhiro Iwamatsu /* MSIF */ 918e2e5886SNobuhiro Iwamatsu #define CONFIG_SMSTP2_ENA 0x00002000 928e2e5886SNobuhiro Iwamatsu /* INTC-SYS, IRQC */ 938e2e5886SNobuhiro Iwamatsu #define CONFIG_SMSTP4_ENA 0x00000180 948e2e5886SNobuhiro Iwamatsu /* SCIF0 */ 958e2e5886SNobuhiro Iwamatsu #define CONFIG_SMSTP7_ENA 0x00200000 968e2e5886SNobuhiro Iwamatsu 97e2abab69SNobuhiro Iwamatsu /* SDHI */ 98e2abab69SNobuhiro Iwamatsu #define CONFIG_MMC 99e2abab69SNobuhiro Iwamatsu #define CONFIG_GENERIC_MMC 100e2abab69SNobuhiro Iwamatsu #define CONFIG_SH_SDHI_FREQ 97500000 101e2abab69SNobuhiro Iwamatsu 1026a994e5bSNobuhiro Iwamatsu #endif /* __GOSE_H */ 103