xref: /rk3399_rockchip-uboot/include/configs/gose.h (revision 1490eb89f4697b02cfb8f826d2f5eaf37edcbd47)
16a994e5bSNobuhiro Iwamatsu /*
26a994e5bSNobuhiro Iwamatsu  * include/configs/gose.h
36a994e5bSNobuhiro Iwamatsu  *
46a994e5bSNobuhiro Iwamatsu  * Copyright (C) 2014 Renesas Electronics Corporation
56a994e5bSNobuhiro Iwamatsu  *
66a994e5bSNobuhiro Iwamatsu  * SPDX-License-Identifier: GPL-2.0
76a994e5bSNobuhiro Iwamatsu  */
86a994e5bSNobuhiro Iwamatsu 
96a994e5bSNobuhiro Iwamatsu #ifndef __GOSE_H
106a994e5bSNobuhiro Iwamatsu #define __GOSE_H
116a994e5bSNobuhiro Iwamatsu 
126a994e5bSNobuhiro Iwamatsu #undef DEBUG
136a994e5bSNobuhiro Iwamatsu #define CONFIG_R8A7793
14*1cc95f6eSNobuhiro Iwamatsu #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Gose"
156a994e5bSNobuhiro Iwamatsu 
165ca6dfe6SNobuhiro Iwamatsu #include "rcar-gen2-common.h"
176a994e5bSNobuhiro Iwamatsu 
18*1cc95f6eSNobuhiro Iwamatsu #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
196a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE	0x70000000
206a994e5bSNobuhiro Iwamatsu #else
216a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE	0xE6304000
226a994e5bSNobuhiro Iwamatsu #endif
236a994e5bSNobuhiro Iwamatsu 
246a994e5bSNobuhiro Iwamatsu /* STACK */
25*1cc95f6eSNobuhiro Iwamatsu #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
266a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_INIT_SP_ADDR		0x7003FFFC
276a994e5bSNobuhiro Iwamatsu #else
286a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_INIT_SP_ADDR		0xE633FFFC
296a994e5bSNobuhiro Iwamatsu #endif
306a994e5bSNobuhiro Iwamatsu 
316a994e5bSNobuhiro Iwamatsu #define STACK_AREA_SIZE			0xC000
326a994e5bSNobuhiro Iwamatsu #define LOW_LEVEL_MERAM_STACK	\
336a994e5bSNobuhiro Iwamatsu 	(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
346a994e5bSNobuhiro Iwamatsu 
356a994e5bSNobuhiro Iwamatsu /* MEMORY */
365ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_SDRAM_BASE		0x40000000
375ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_SDRAM_SIZE		0x40000000
385ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_UBOOT_SDRAM_SIZE	0x20000000
396a994e5bSNobuhiro Iwamatsu 
40f0261243SNobuhiro Iwamatsu /* SH Ether */
41f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER
42f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_USE_PORT	0
43f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_ADDR	0x1
44f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
45f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_CACHE_WRITEBACK
46f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_CACHE_INVALIDATE
47f0261243SNobuhiro Iwamatsu #define CONFIG_BITBANGMII
48f0261243SNobuhiro Iwamatsu #define CONFIG_BITBANGMII_MULTI
49f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
50f0261243SNobuhiro Iwamatsu 
516a994e5bSNobuhiro Iwamatsu /* Board Clock */
526a994e5bSNobuhiro Iwamatsu #define RMOBILE_XTAL_CLK	20000000u
536a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
546a994e5bSNobuhiro Iwamatsu #define CONFIG_SH_TMU_CLK_FREQ	(CONFIG_SYS_CLK_FREQ / 2)
556a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_TMU_CLK_DIV	4
566a994e5bSNobuhiro Iwamatsu 
576a994e5bSNobuhiro Iwamatsu /* I2C */
586a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C
596a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH
606a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SLAVE	0x7F
616a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	3
626a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED0	400000
636a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED1	400000
646a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED2	400000
656a994e5bSNobuhiro Iwamatsu #define CONFIG_SH_I2C_DATA_HIGH	4
666a994e5bSNobuhiro Iwamatsu #define CONFIG_SH_I2C_DATA_LOW	5
676a994e5bSNobuhiro Iwamatsu #define CONFIG_SH_I2C_CLOCK	10000000
686a994e5bSNobuhiro Iwamatsu 
696a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
706a994e5bSNobuhiro Iwamatsu 
71d3ee73fcSNobuhiro Iwamatsu /* USB */
72d3ee73fcSNobuhiro Iwamatsu #define CONFIG_USB_EHCI_RMOBILE
73d3ee73fcSNobuhiro Iwamatsu #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
74d3ee73fcSNobuhiro Iwamatsu 
758e2e5886SNobuhiro Iwamatsu /* Module stop status bits */
768e2e5886SNobuhiro Iwamatsu /* INTC-RT */
778e2e5886SNobuhiro Iwamatsu #define CONFIG_SMSTP0_ENA	0x00400000
788e2e5886SNobuhiro Iwamatsu /* MSIF */
798e2e5886SNobuhiro Iwamatsu #define CONFIG_SMSTP2_ENA	0x00002000
808e2e5886SNobuhiro Iwamatsu /* INTC-SYS, IRQC */
818e2e5886SNobuhiro Iwamatsu #define CONFIG_SMSTP4_ENA	0x00000180
828e2e5886SNobuhiro Iwamatsu /* SCIF0 */
838e2e5886SNobuhiro Iwamatsu #define CONFIG_SMSTP7_ENA	0x00200000
848e2e5886SNobuhiro Iwamatsu 
85e2abab69SNobuhiro Iwamatsu /* SDHI */
86e2abab69SNobuhiro Iwamatsu #define CONFIG_SH_SDHI_FREQ		97500000
87e2abab69SNobuhiro Iwamatsu 
886a994e5bSNobuhiro Iwamatsu #endif	/* __GOSE_H */
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