1 /* 2 * (C) Copyright 2011, Stefano Babic <sbabic@denx.de> 3 * 4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 5 * 6 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 7 * 8 * Configuration for the flea3 board. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 #include <asm/arch/imx-regs.h> 17 18 /* High Level Configuration Options */ 19 #define CONFIG_MX35 20 21 #define CONFIG_SYS_DCACHE_OFF 22 #define CONFIG_SYS_CACHELINE_SIZE 32 23 24 #define CONFIG_DISPLAY_CPUINFO 25 26 /* Only in case the value is not present in mach-types.h */ 27 #ifndef MACH_TYPE_FLEA3 28 #define MACH_TYPE_FLEA3 3668 29 #endif 30 31 #define CONFIG_MACH_TYPE MACH_TYPE_FLEA3 32 33 /* Set TEXT at the beginning of the NOR flash */ 34 #define CONFIG_SYS_TEXT_BASE 0xA0000000 35 36 /* This is required to setup the ESDC controller */ 37 #define CONFIG_BOARD_EARLY_INIT_F 38 39 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 40 #define CONFIG_REVISION_TAG 41 #define CONFIG_SETUP_MEMORY_TAGS 42 #define CONFIG_INITRD_TAG 43 44 /* 45 * Size of malloc() pool 46 */ 47 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) 48 49 /* 50 * Hardware drivers 51 */ 52 #define CONFIG_SYS_I2C 53 #define CONFIG_SYS_I2C_MXC 54 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 55 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 56 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 57 #define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */ 58 #define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe 59 #define CONFIG_MXC_SPI 60 #define CONFIG_MXC_GPIO 61 62 /* 63 * UART (console) 64 */ 65 #define CONFIG_MXC_UART 66 #define CONFIG_MXC_UART_BASE UART3_BASE 67 68 /* allow to overwrite serial and ethaddr */ 69 #define CONFIG_ENV_OVERWRITE 70 #define CONFIG_CONS_INDEX 1 71 #define CONFIG_BAUDRATE 115200 72 73 /* 74 * Command definition 75 */ 76 #define CONFIG_BOOTP_SUBNETMASK 77 #define CONFIG_BOOTP_GATEWAY 78 #define CONFIG_BOOTP_DNS 79 80 #define CONFIG_CMD_NAND 81 #define CONFIG_CMD_CACHE 82 83 #define CONFIG_CMD_MII 84 #define CONFIG_NET_RETRY_COUNT 100 85 86 #define CONFIG_BOOTDELAY 3 87 88 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 89 90 91 /* 92 * Ethernet on SOC (FEC) 93 */ 94 #define CONFIG_FEC_MXC 95 #define IMX_FEC_BASE FEC_BASE_ADDR 96 #define CONFIG_PHYLIB 97 #define CONFIG_PHY_MICREL 98 #define CONFIG_FEC_MXC_PHYADDR 0x1 99 100 #define CONFIG_MII 101 102 #define CONFIG_ARP_TIMEOUT 200UL 103 104 /* 105 * Miscellaneous configurable options 106 */ 107 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 108 #define CONFIG_CMDLINE_EDITING 109 110 #define CONFIG_AUTO_COMPLETE 111 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 112 /* Print Buffer Size */ 113 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 114 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 115 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 116 117 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 118 #define CONFIG_SYS_MEMTEST_END 0x10000 119 120 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 121 122 /* 123 * Physical Memory Map 124 */ 125 #define CONFIG_NR_DRAM_BANKS 1 126 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 127 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 128 129 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR 130 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000) 131 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2) 132 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 133 GENERATED_GBL_DATA_SIZE) 134 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 135 CONFIG_SYS_GBL_DATA_OFFSET) 136 137 /* 138 * MTD Command for mtdparts 139 */ 140 #define CONFIG_CMD_MTDPARTS 141 #define CONFIG_MTD_DEVICE 142 #define CONFIG_FLASH_CFI_MTD 143 #define CONFIG_MTD_PARTITIONS 144 #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0" 145 #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:50m(root1)," \ 146 "32m(rootfb)," \ 147 "64m(pcache)," \ 148 "64m(app1)," \ 149 "10m(app2),-(spool);" \ 150 "physmap-flash.0:512k(u-boot),64k(env1)," \ 151 "64k(env2),3776k(kernel1),3776k(kernel2)" 152 153 /* 154 * FLASH and environment organization 155 */ 156 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR 157 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 158 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 159 /* Monitor at beginning of flash */ 160 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 161 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 162 163 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 164 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 165 166 /* Address and size of Redundant Environment Sector */ 167 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 168 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 169 170 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ 171 CONFIG_SYS_MONITOR_LEN) 172 173 #define CONFIG_ENV_IS_IN_FLASH 174 175 /* 176 * CFI FLASH driver setup 177 */ 178 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 179 #define CONFIG_FLASH_CFI_DRIVER 180 181 /* A non-standard buffered write algorithm */ 182 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ 183 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 184 185 /* 186 * NAND FLASH driver setup 187 */ 188 #define CONFIG_NAND_MXC 189 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR) 190 #define CONFIG_SYS_MAX_NAND_DEVICE 1 191 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR) 192 #define CONFIG_MXC_NAND_HWECC 193 #define CONFIG_SYS_NAND_LARGEPAGE 194 195 /* 196 * Default environment and default scripts 197 * to update uboot and load kernel 198 */ 199 200 #define CONFIG_HOSTNAME flea3 201 #define CONFIG_EXTRA_ENV_SETTINGS \ 202 "netdev=eth0\0" \ 203 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 204 "nfsroot=${serverip}:${rootpath}\0" \ 205 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 206 "addip_sta=setenv bootargs ${bootargs} " \ 207 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 208 ":${hostname}:${netdev}:off panic=1\0" \ 209 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 210 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 211 "else run addip_sta;fi\0" \ 212 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 213 "addtty=setenv bootargs ${bootargs}" \ 214 " console=ttymxc2,${baudrate}\0" \ 215 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 216 "loadaddr=80800000\0" \ 217 "kernel_addr_r=80800000\0" \ 218 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 219 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 220 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \ 221 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 222 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 223 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 224 "bootm ${kernel_addr}\0" \ 225 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 226 "run nfsargs addip addtty addmtd addmisc;" \ 227 "bootm ${kernel_addr_r}\0" \ 228 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ 229 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ 230 "net_self=if run net_self_load;then " \ 231 "run ramargs addip addtty addmtd addmisc;" \ 232 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ 233 "else echo Images not loades;fi\0" \ 234 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \ 235 "load=tftp ${loadaddr} ${u-boot}\0" \ 236 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \ 237 "update=protect off ${uboot_addr} +40000;" \ 238 "erase ${uboot_addr} +40000;" \ 239 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ 240 "upd=if run load;then echo Updating u-boot;if run update;" \ 241 "then echo U-Boot updated;" \ 242 "else echo Error updating u-boot !;" \ 243 "echo Board without bootloader !!;" \ 244 "fi;" \ 245 "else echo U-Boot not downloaded..exiting;fi\0" \ 246 "bootcmd=run net_nfs\0" 247 248 #endif /* __CONFIG_H */ 249