xref: /rk3399_rockchip-uboot/include/configs/embestmx6boards.h (revision 7254d92ebcedf9dc8dfe76a8d310faf46f46274f)
1 /*
2  * Copyright (C) 2014 Eukréa Electromatique
3  * Author: Eric Bénard <eric@eukrea.com>
4  *
5  * Configuration settings for the Embest RIoTboard
6  *
7  * based on mx6*sabre*.h which are :
8  * Copyright (C) 2012 Freescale Semiconductor, Inc.
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef __RIOTBOARD_CONFIG_H
14 #define __RIOTBOARD_CONFIG_H
15 
16 #include <asm/arch/imx-regs.h>
17 #include <asm/imx-common/gpio.h>
18 
19 #include "mx6_common.h"
20 #include <linux/sizes.h>
21 
22 #define CONFIG_SYS_GENERIC_BOARD
23 
24 #define CONFIG_MXC_UART_BASE		UART2_BASE
25 #define CONFIG_CONSOLE_DEV		"ttymxc1"
26 #define CONFIG_MMCROOT			"/dev/mmcblk1p2"
27 
28 #define PHYS_SDRAM_SIZE		(1u * 1024 * 1024 * 1024)
29 
30 #define CONFIG_MX6
31 
32 #define CONFIG_DISPLAY_CPUINFO
33 #define CONFIG_DISPLAY_BOARDINFO
34 
35 #define CONFIG_CMDLINE_TAG
36 #define CONFIG_SETUP_MEMORY_TAGS
37 #define CONFIG_INITRD_TAG
38 #define CONFIG_REVISION_TAG
39 #define CONFIG_IMX6_THERMAL
40 
41 /* Size of malloc() pool */
42 #define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
43 
44 #define CONFIG_BOARD_EARLY_INIT_F
45 #define CONFIG_BOARD_LATE_INIT
46 #define CONFIG_MXC_GPIO
47 
48 #define CONFIG_MXC_UART
49 
50 #define CONFIG_CMD_FUSE
51 #ifdef CONFIG_CMD_FUSE
52 #define CONFIG_MXC_OCOTP
53 #endif
54 
55 /* I2C Configs */
56 #define CONFIG_CMD_I2C
57 #define CONFIG_SYS_I2C
58 #define CONFIG_SYS_I2C_MXC
59 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
60 #define CONFIG_SYS_I2C_SPEED		100000
61 
62 /* USB Configs */
63 #define CONFIG_CMD_USB
64 #define CONFIG_USB_EHCI
65 #define CONFIG_USB_EHCI_MX6
66 #define CONFIG_USB_STORAGE
67 #define CONFIG_USB_HOST_ETHER
68 #define CONFIG_USB_ETHER_ASIX
69 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
70 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */
71 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
72 #define CONFIG_MXC_USB_FLAGS	0
73 
74 /* MMC Configs */
75 #define CONFIG_FSL_ESDHC
76 #define CONFIG_FSL_USDHC
77 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
78 
79 #define CONFIG_MMC
80 #define CONFIG_CMD_MMC
81 #define CONFIG_GENERIC_MMC
82 #define CONFIG_BOUNCE_BUFFER
83 
84 #define CONFIG_FEC_MXC
85 #define CONFIG_MII
86 #define IMX_FEC_BASE			ENET_BASE_ADDR
87 #define CONFIG_FEC_XCV_TYPE		RGMII
88 #define CONFIG_ETHPRIME			"FEC"
89 #define CONFIG_FEC_MXC_PHYADDR		4
90 
91 #define CONFIG_PHYLIB
92 #define CONFIG_PHY_ATHEROS
93 
94 #define CONFIG_CMD_SF
95 #ifdef CONFIG_CMD_SF
96 #define CONFIG_SPI_FLASH
97 #define CONFIG_SPI_FLASH_SST
98 #define CONFIG_MXC_SPI
99 #define CONFIG_SF_DEFAULT_BUS		0
100 #define CONFIG_SF_DEFAULT_CS		0
101 #define CONFIG_SF_DEFAULT_SPEED		20000000
102 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
103 #endif
104 
105 /* allow to overwrite serial and ethaddr */
106 #define CONFIG_ENV_OVERWRITE
107 #define CONFIG_CONS_INDEX              1
108 #define CONFIG_BAUDRATE                        115200
109 
110 /* Command definition */
111 #include <config_cmd_default.h>
112 #undef CONFIG_CMD_FPGA
113 
114 #define CONFIG_CMD_BMODE
115 #define CONFIG_CMD_SETEXPR
116 #undef CONFIG_CMD_IMLS
117 
118 #define CONFIG_LOADADDR                        0x12000000
119 #define CONFIG_SYS_TEXT_BASE           0x17800000
120 
121 #define CONFIG_ARP_TIMEOUT     200UL
122 
123 /* Miscellaneous configurable options */
124 #define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
125 #define CONFIG_SYS_CBSIZE              256
126 
127 /* Print Buffer Size */
128 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
129 #define CONFIG_SYS_MAXARGS             16
130 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
131 
132 #define CONFIG_SYS_MEMTEST_START       0x10000000
133 #define CONFIG_SYS_MEMTEST_END         0x10010000
134 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
135 
136 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
137 
138 #define CONFIG_STACKSIZE               (128 * 1024)
139 
140 /* Physical Memory Map */
141 #define CONFIG_NR_DRAM_BANKS           1
142 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
143 
144 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
145 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
146 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
147 
148 #define CONFIG_SYS_INIT_SP_OFFSET \
149 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
150 #define CONFIG_SYS_INIT_SP_ADDR \
151 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
152 
153 /* FLASH and environment organization */
154 #define CONFIG_SYS_NO_FLASH
155 
156 #define CONFIG_ENV_SIZE			(8 * 1024)
157 
158 #if defined(CONFIG_ENV_IS_IN_MMC)
159 /* RiOTboard */
160 #define CONFIG_FDTFILE	"imx6dl-riotboard.dtb"
161 #define CONFIG_SYS_FSL_USDHC_NUM	3
162 #define CONFIG_SYS_MMC_ENV_DEV		2	/* SDHC4 */
163 #define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
164 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
165 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
166 /* MarSBoard */
167 #define CONFIG_FDTFILE	"imx6q-marsboard.dtb"
168 #define CONFIG_SYS_FSL_USDHC_NUM	2
169 #define CONFIG_ENV_OFFSET		(768 * 1024)
170 #define CONFIG_ENV_SECT_SIZE		(8 * 1024)
171 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
172 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
173 #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
174 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
175 #endif
176 
177 #ifndef CONFIG_SYS_DCACHE_OFF
178 #define CONFIG_CMD_CACHE
179 #endif
180 
181 /* Framebuffer */
182 #define CONFIG_VIDEO
183 #define CONFIG_VIDEO_IPUV3
184 #define CONFIG_CFB_CONSOLE
185 #define CONFIG_VGA_AS_SINGLE_DEVICE
186 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
187 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
188 #define CONFIG_VIDEO_BMP_RLE8
189 #define CONFIG_SPLASH_SCREEN
190 #define CONFIG_SPLASH_SCREEN_ALIGN
191 #define CONFIG_BMP_16BPP
192 #define CONFIG_VIDEO_LOGO
193 #define CONFIG_VIDEO_BMP_LOGO
194 #define CONFIG_IPUV3_CLK 260000000
195 #define CONFIG_IMX_HDMI
196 #define CONFIG_IMX_VIDEO_SKIP
197 
198 #include <config_distro_defaults.h>
199 
200 /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
201  * 1M script, 1M pxe and the ramdisk at the end */
202 #define MEM_LAYOUT_ENV_SETTINGS \
203 	"bootm_size=0x10000000\0" \
204 	"kernel_addr_r=0x12000000\0" \
205 	"fdt_addr_r=0x13000000\0" \
206 	"scriptaddr=0x13100000\0" \
207 	"pxefile_addr_r=0x13200000\0" \
208 	"ramdisk_addr_r=0x13300000\0"
209 
210 #define BOOT_TARGET_DEVICES(func) \
211 	func(MMC, mmc, 0) \
212 	func(MMC, mmc, 1) \
213 	func(MMC, mmc, 2) \
214 	func(USB, usb, 0) \
215 	func(PXE, pxe, na) \
216 	func(DHCP, dhcp, na)
217 
218 #include <config_distro_bootcmd.h>
219 
220 #define CONSOLE_STDIN_SETTINGS \
221 	"stdin=serial\0"
222 
223 #define CONSOLE_STDOUT_SETTINGS \
224 	"stdout=serial\0" \
225 	"stderr=serial\0"
226 
227 #define CONSOLE_ENV_SETTINGS \
228 	CONSOLE_STDIN_SETTINGS \
229 	CONSOLE_STDOUT_SETTINGS
230 
231 #define CONFIG_EXTRA_ENV_SETTINGS \
232 	CONSOLE_ENV_SETTINGS \
233 	MEM_LAYOUT_ENV_SETTINGS \
234 	"fdtfile=" CONFIG_FDTFILE "\0" \
235 	BOOTENV
236 
237 #endif                         /* __RIOTBOARD_CONFIG_H */
238