1 /* 2 * Copyright (C) 2014 Eukréa Electromatique 3 * Author: Eric Bénard <eric@eukrea.com> 4 * 5 * Configuration settings for the Embest RIoTboard 6 * 7 * based on mx6*sabre*.h which are : 8 * Copyright (C) 2012 Freescale Semiconductor, Inc. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __RIOTBOARD_CONFIG_H 14 #define __RIOTBOARD_CONFIG_H 15 16 #include "mx6_common.h" 17 18 #define CONFIG_MXC_UART_BASE UART2_BASE 19 #define CONFIG_CONSOLE_DEV "ttymxc1" 20 #define CONFIG_MMCROOT "/dev/mmcblk1p2" 21 22 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) 23 24 #define CONFIG_IMX6_THERMAL 25 26 /* Size of malloc() pool */ 27 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) 28 29 #define CONFIG_BOARD_EARLY_INIT_F 30 #define CONFIG_BOARD_LATE_INIT 31 32 #define CONFIG_MXC_UART 33 34 #define CONFIG_CMD_FUSE 35 #ifdef CONFIG_CMD_FUSE 36 #define CONFIG_MXC_OCOTP 37 #endif 38 39 /* I2C Configs */ 40 #define CONFIG_CMD_I2C 41 #define CONFIG_SYS_I2C 42 #define CONFIG_SYS_I2C_MXC 43 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 44 #define CONFIG_SYS_I2C_SPEED 100000 45 46 /* USB Configs */ 47 #define CONFIG_CMD_USB 48 #define CONFIG_USB_EHCI 49 #define CONFIG_USB_EHCI_MX6 50 #define CONFIG_USB_STORAGE 51 #define CONFIG_USB_HOST_ETHER 52 #define CONFIG_USB_ETHER_ASIX 53 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 54 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 55 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 56 #define CONFIG_MXC_USB_FLAGS 0 57 58 /* MMC Configs */ 59 #define CONFIG_FSL_ESDHC 60 #define CONFIG_FSL_USDHC 61 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 62 63 #define CONFIG_MMC 64 #define CONFIG_CMD_MMC 65 #define CONFIG_GENERIC_MMC 66 #define CONFIG_BOUNCE_BUFFER 67 68 #define CONFIG_FEC_MXC 69 #define CONFIG_MII 70 #define IMX_FEC_BASE ENET_BASE_ADDR 71 #define CONFIG_FEC_XCV_TYPE RGMII 72 #define CONFIG_ETHPRIME "FEC" 73 #define CONFIG_FEC_MXC_PHYADDR 4 74 75 #define CONFIG_PHYLIB 76 #define CONFIG_PHY_ATHEROS 77 78 #define CONFIG_CMD_SF 79 #ifdef CONFIG_CMD_SF 80 #define CONFIG_SPI_FLASH 81 #define CONFIG_SPI_FLASH_SST 82 #define CONFIG_MXC_SPI 83 #define CONFIG_SF_DEFAULT_BUS 0 84 #define CONFIG_SF_DEFAULT_CS 0 85 #define CONFIG_SF_DEFAULT_SPEED 20000000 86 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 87 #endif 88 89 /* Command definition */ 90 #undef CONFIG_CMD_FPGA 91 92 #define CONFIG_CMD_BMODE 93 #define CONFIG_CMD_SETEXPR 94 95 #define CONFIG_ARP_TIMEOUT 200UL 96 97 /* Print Buffer Size */ 98 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 99 100 #define CONFIG_SYS_MEMTEST_START 0x10000000 101 #define CONFIG_SYS_MEMTEST_END 0x10010000 102 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 103 104 #define CONFIG_STACKSIZE (128 * 1024) 105 106 /* Physical Memory Map */ 107 #define CONFIG_NR_DRAM_BANKS 1 108 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 109 110 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 111 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 112 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 113 114 #define CONFIG_SYS_INIT_SP_OFFSET \ 115 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 116 #define CONFIG_SYS_INIT_SP_ADDR \ 117 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 118 119 /* Environment organization */ 120 #define CONFIG_ENV_SIZE (8 * 1024) 121 122 #if defined(CONFIG_ENV_IS_IN_MMC) 123 /* RiOTboard */ 124 #define CONFIG_FDTFILE "imx6dl-riotboard.dtb" 125 #define CONFIG_SYS_FSL_USDHC_NUM 3 126 #define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */ 127 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 128 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 129 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) 130 /* MarSBoard */ 131 #define CONFIG_FDTFILE "imx6q-marsboard.dtb" 132 #define CONFIG_SYS_FSL_USDHC_NUM 2 133 #define CONFIG_ENV_OFFSET (768 * 1024) 134 #define CONFIG_ENV_SECT_SIZE (8 * 1024) 135 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 136 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 137 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 138 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 139 #endif 140 141 #ifndef CONFIG_SYS_DCACHE_OFF 142 #define CONFIG_CMD_CACHE 143 #endif 144 145 /* Framebuffer */ 146 #define CONFIG_VIDEO 147 #define CONFIG_VIDEO_IPUV3 148 #define CONFIG_CFB_CONSOLE 149 #define CONFIG_VGA_AS_SINGLE_DEVICE 150 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 151 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 152 #define CONFIG_VIDEO_BMP_RLE8 153 #define CONFIG_SPLASH_SCREEN 154 #define CONFIG_SPLASH_SCREEN_ALIGN 155 #define CONFIG_BMP_16BPP 156 #define CONFIG_VIDEO_LOGO 157 #define CONFIG_VIDEO_BMP_LOGO 158 #define CONFIG_IPUV3_CLK 260000000 159 #define CONFIG_IMX_HDMI 160 #define CONFIG_IMX_VIDEO_SKIP 161 162 #include <config_distro_defaults.h> 163 164 /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt, 165 * 1M script, 1M pxe and the ramdisk at the end */ 166 #define MEM_LAYOUT_ENV_SETTINGS \ 167 "bootm_size=0x10000000\0" \ 168 "kernel_addr_r=0x12000000\0" \ 169 "fdt_addr_r=0x13000000\0" \ 170 "scriptaddr=0x13100000\0" \ 171 "pxefile_addr_r=0x13200000\0" \ 172 "ramdisk_addr_r=0x13300000\0" 173 174 #define BOOT_TARGET_DEVICES(func) \ 175 func(MMC, mmc, 0) \ 176 func(MMC, mmc, 1) \ 177 func(MMC, mmc, 2) \ 178 func(USB, usb, 0) \ 179 func(PXE, pxe, na) \ 180 func(DHCP, dhcp, na) 181 182 #include <config_distro_bootcmd.h> 183 184 #define CONSOLE_STDIN_SETTINGS \ 185 "stdin=serial\0" 186 187 #define CONSOLE_STDOUT_SETTINGS \ 188 "stdout=serial\0" \ 189 "stderr=serial\0" 190 191 #define CONSOLE_ENV_SETTINGS \ 192 CONSOLE_STDIN_SETTINGS \ 193 CONSOLE_STDOUT_SETTINGS 194 195 #define CONFIG_EXTRA_ENV_SETTINGS \ 196 CONSOLE_ENV_SETTINGS \ 197 MEM_LAYOUT_ENV_SETTINGS \ 198 "fdtfile=" CONFIG_FDTFILE "\0" \ 199 BOOTENV 200 201 #endif /* __RIOTBOARD_CONFIG_H */ 202