xref: /rk3399_rockchip-uboot/include/configs/embestmx6boards.h (revision e51c1e8eced7f1661994bd3e1caf0ca032455b3e)
13cbeb0f0SEric Benard /*
23cbeb0f0SEric Benard  * Copyright (C) 2014 Eukréa Electromatique
33cbeb0f0SEric Benard  * Author: Eric Bénard <eric@eukrea.com>
43cbeb0f0SEric Benard  *
53cbeb0f0SEric Benard  * Configuration settings for the Embest RIoTboard
63cbeb0f0SEric Benard  *
73cbeb0f0SEric Benard  * based on mx6*sabre*.h which are :
83cbeb0f0SEric Benard  * Copyright (C) 2012 Freescale Semiconductor, Inc.
93cbeb0f0SEric Benard  *
103cbeb0f0SEric Benard  * SPDX-License-Identifier:	GPL-2.0+
113cbeb0f0SEric Benard  */
123cbeb0f0SEric Benard 
133cbeb0f0SEric Benard #ifndef __RIOTBOARD_CONFIG_H
143cbeb0f0SEric Benard #define __RIOTBOARD_CONFIG_H
153cbeb0f0SEric Benard 
163cbeb0f0SEric Benard #define CONFIG_MXC_UART_BASE		UART2_BASE
17fa4a7a43SFabio Estevam #define CONFIG_CONSOLE_DEV		"ttymxc1"
183cbeb0f0SEric Benard #define CONFIG_MMCROOT			"/dev/mmcblk1p2"
193cbeb0f0SEric Benard 
203cbeb0f0SEric Benard #define PHYS_SDRAM_SIZE		(1u * 1024 * 1024 * 1024)
213cbeb0f0SEric Benard 
22223d91ccSNikolay Dimitrov #define CONFIG_IMX6_THERMAL
233cbeb0f0SEric Benard 
243cbeb0f0SEric Benard /* Size of malloc() pool */
253cbeb0f0SEric Benard #define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
263cbeb0f0SEric Benard 
273cbeb0f0SEric Benard #define CONFIG_BOARD_EARLY_INIT_F
283cbeb0f0SEric Benard #define CONFIG_BOARD_LATE_INIT
293cbeb0f0SEric Benard 
303cbeb0f0SEric Benard #define CONFIG_MXC_UART
313cbeb0f0SEric Benard 
323cbeb0f0SEric Benard #define CONFIG_CMD_FUSE
333cbeb0f0SEric Benard #ifdef CONFIG_CMD_FUSE
343cbeb0f0SEric Benard #define CONFIG_MXC_OCOTP
353cbeb0f0SEric Benard #endif
363cbeb0f0SEric Benard 
373cbeb0f0SEric Benard /* I2C Configs */
383cbeb0f0SEric Benard #define CONFIG_CMD_I2C
393cbeb0f0SEric Benard #define CONFIG_SYS_I2C
403cbeb0f0SEric Benard #define CONFIG_SYS_I2C_MXC
41f8cb101eSYork Sun #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
423cbeb0f0SEric Benard #define CONFIG_SYS_I2C_SPEED		100000
433cbeb0f0SEric Benard 
443cbeb0f0SEric Benard /* USB Configs */
453cbeb0f0SEric Benard #define CONFIG_CMD_USB
463cbeb0f0SEric Benard #define CONFIG_USB_EHCI
473cbeb0f0SEric Benard #define CONFIG_USB_EHCI_MX6
483cbeb0f0SEric Benard #define CONFIG_USB_STORAGE
493cbeb0f0SEric Benard #define CONFIG_USB_HOST_ETHER
503cbeb0f0SEric Benard #define CONFIG_USB_ETHER_ASIX
513cbeb0f0SEric Benard #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
523cbeb0f0SEric Benard #define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */
533cbeb0f0SEric Benard #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
543cbeb0f0SEric Benard #define CONFIG_MXC_USB_FLAGS	0
553cbeb0f0SEric Benard 
563cbeb0f0SEric Benard /* MMC Configs */
573cbeb0f0SEric Benard #define CONFIG_SYS_FSL_ESDHC_ADDR      0
583cbeb0f0SEric Benard 
593cbeb0f0SEric Benard #define CONFIG_FEC_MXC
603cbeb0f0SEric Benard #define CONFIG_MII
613cbeb0f0SEric Benard #define IMX_FEC_BASE			ENET_BASE_ADDR
623cbeb0f0SEric Benard #define CONFIG_FEC_XCV_TYPE		RGMII
633cbeb0f0SEric Benard #define CONFIG_ETHPRIME			"FEC"
643cbeb0f0SEric Benard #define CONFIG_FEC_MXC_PHYADDR		4
653cbeb0f0SEric Benard 
663cbeb0f0SEric Benard #define CONFIG_PHYLIB
673cbeb0f0SEric Benard #define CONFIG_PHY_ATHEROS
683cbeb0f0SEric Benard 
693cbeb0f0SEric Benard #define CONFIG_CMD_SF
703cbeb0f0SEric Benard #ifdef CONFIG_CMD_SF
713cbeb0f0SEric Benard #define CONFIG_SPI_FLASH
723cbeb0f0SEric Benard #define CONFIG_SPI_FLASH_SST
733cbeb0f0SEric Benard #define CONFIG_MXC_SPI
743cbeb0f0SEric Benard #define CONFIG_SF_DEFAULT_BUS		0
75155fa9afSNikita Kiryanov #define CONFIG_SF_DEFAULT_CS		0
763cbeb0f0SEric Benard #define CONFIG_SF_DEFAULT_SPEED		20000000
773cbeb0f0SEric Benard #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
783cbeb0f0SEric Benard #endif
793cbeb0f0SEric Benard 
803cbeb0f0SEric Benard /* Command definition */
81729d2a34SIain Paton #undef CONFIG_CMD_FPGA
823cbeb0f0SEric Benard 
833cbeb0f0SEric Benard #define CONFIG_CMD_BMODE
843cbeb0f0SEric Benard #define CONFIG_CMD_SETEXPR
853cbeb0f0SEric Benard 
863cbeb0f0SEric Benard #define CONFIG_ARP_TIMEOUT     200UL
873cbeb0f0SEric Benard 
883cbeb0f0SEric Benard /* Print Buffer Size */
893cbeb0f0SEric Benard #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
903cbeb0f0SEric Benard 
913cbeb0f0SEric Benard #define CONFIG_SYS_MEMTEST_START       0x10000000
923cbeb0f0SEric Benard #define CONFIG_SYS_MEMTEST_END         0x10010000
933cbeb0f0SEric Benard #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
943cbeb0f0SEric Benard 
953cbeb0f0SEric Benard #define CONFIG_STACKSIZE               (128 * 1024)
963cbeb0f0SEric Benard 
973cbeb0f0SEric Benard /* Physical Memory Map */
983cbeb0f0SEric Benard #define CONFIG_NR_DRAM_BANKS           1
993cbeb0f0SEric Benard #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
1003cbeb0f0SEric Benard 
1013cbeb0f0SEric Benard #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
1023cbeb0f0SEric Benard #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
1033cbeb0f0SEric Benard #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
1043cbeb0f0SEric Benard 
1053cbeb0f0SEric Benard #define CONFIG_SYS_INIT_SP_OFFSET \
1063cbeb0f0SEric Benard 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
1073cbeb0f0SEric Benard #define CONFIG_SYS_INIT_SP_ADDR \
1083cbeb0f0SEric Benard 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
1093cbeb0f0SEric Benard 
110056845c2SPeter Robinson /* Environment organization */
1113cbeb0f0SEric Benard #define CONFIG_ENV_SIZE			(8 * 1024)
1123cbeb0f0SEric Benard 
1133cbeb0f0SEric Benard #if defined(CONFIG_ENV_IS_IN_MMC)
1143cbeb0f0SEric Benard /* RiOTboard */
115c86efd85SIain Paton #define CONFIG_FDTFILE	"imx6dl-riotboard.dtb"
1163cbeb0f0SEric Benard #define CONFIG_SYS_FSL_USDHC_NUM	3
1173cbeb0f0SEric Benard #define CONFIG_SYS_MMC_ENV_DEV		2	/* SDHC4 */
1183cbeb0f0SEric Benard #define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
1193cbeb0f0SEric Benard #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
1203cbeb0f0SEric Benard #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
1213cbeb0f0SEric Benard /* MarSBoard */
122c86efd85SIain Paton #define CONFIG_FDTFILE	"imx6q-marsboard.dtb"
1233cbeb0f0SEric Benard #define CONFIG_SYS_FSL_USDHC_NUM	2
1243cbeb0f0SEric Benard #define CONFIG_ENV_OFFSET		(768 * 1024)
1253cbeb0f0SEric Benard #define CONFIG_ENV_SECT_SIZE		(8 * 1024)
1263cbeb0f0SEric Benard #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
1273cbeb0f0SEric Benard #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
1283cbeb0f0SEric Benard #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
1293cbeb0f0SEric Benard #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
1303cbeb0f0SEric Benard #endif
1313cbeb0f0SEric Benard 
1323cbeb0f0SEric Benard #ifndef CONFIG_SYS_DCACHE_OFF
1333cbeb0f0SEric Benard #define CONFIG_CMD_CACHE
1343cbeb0f0SEric Benard #endif
1353cbeb0f0SEric Benard 
1363cbeb0f0SEric Benard /* Framebuffer */
1373cbeb0f0SEric Benard #define CONFIG_VIDEO
1383cbeb0f0SEric Benard #define CONFIG_VIDEO_IPUV3
1393cbeb0f0SEric Benard #define CONFIG_CFB_CONSOLE
1403cbeb0f0SEric Benard #define CONFIG_VGA_AS_SINGLE_DEVICE
1413cbeb0f0SEric Benard #define CONFIG_SYS_CONSOLE_IS_IN_ENV
1423cbeb0f0SEric Benard #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
1433cbeb0f0SEric Benard #define CONFIG_VIDEO_BMP_RLE8
1443cbeb0f0SEric Benard #define CONFIG_SPLASH_SCREEN
1453cbeb0f0SEric Benard #define CONFIG_SPLASH_SCREEN_ALIGN
1463cbeb0f0SEric Benard #define CONFIG_BMP_16BPP
1473cbeb0f0SEric Benard #define CONFIG_VIDEO_LOGO
1483cbeb0f0SEric Benard #define CONFIG_VIDEO_BMP_LOGO
1493cbeb0f0SEric Benard #define CONFIG_IPUV3_CLK 260000000
1503cbeb0f0SEric Benard #define CONFIG_IMX_HDMI
1513cbeb0f0SEric Benard #define CONFIG_IMX_VIDEO_SKIP
1523cbeb0f0SEric Benard 
153729d2a34SIain Paton #include <config_distro_defaults.h>
154*e51c1e8eSPeter Robinson #include "mx6_common.h"
155729d2a34SIain Paton 
156c86efd85SIain Paton /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
157c86efd85SIain Paton  * 1M script, 1M pxe and the ramdisk at the end */
158c86efd85SIain Paton #define MEM_LAYOUT_ENV_SETTINGS \
159c86efd85SIain Paton 	"bootm_size=0x10000000\0" \
160c86efd85SIain Paton 	"kernel_addr_r=0x12000000\0" \
161c86efd85SIain Paton 	"fdt_addr_r=0x13000000\0" \
162c86efd85SIain Paton 	"scriptaddr=0x13100000\0" \
163c86efd85SIain Paton 	"pxefile_addr_r=0x13200000\0" \
164c86efd85SIain Paton 	"ramdisk_addr_r=0x13300000\0"
165c86efd85SIain Paton 
166c86efd85SIain Paton #define BOOT_TARGET_DEVICES(func) \
167c86efd85SIain Paton 	func(MMC, mmc, 0) \
168c86efd85SIain Paton 	func(MMC, mmc, 1) \
169c86efd85SIain Paton 	func(MMC, mmc, 2) \
170c86efd85SIain Paton 	func(USB, usb, 0) \
171c86efd85SIain Paton 	func(PXE, pxe, na) \
172c86efd85SIain Paton 	func(DHCP, dhcp, na)
173c86efd85SIain Paton 
174c86efd85SIain Paton #include <config_distro_bootcmd.h>
175c86efd85SIain Paton 
176c86efd85SIain Paton #define CONSOLE_STDIN_SETTINGS \
177c86efd85SIain Paton 	"stdin=serial\0"
178c86efd85SIain Paton 
179c86efd85SIain Paton #define CONSOLE_STDOUT_SETTINGS \
180c86efd85SIain Paton 	"stdout=serial\0" \
181c86efd85SIain Paton 	"stderr=serial\0"
182c86efd85SIain Paton 
183c86efd85SIain Paton #define CONSOLE_ENV_SETTINGS \
184c86efd85SIain Paton 	CONSOLE_STDIN_SETTINGS \
185c86efd85SIain Paton 	CONSOLE_STDOUT_SETTINGS
186c86efd85SIain Paton 
187c86efd85SIain Paton #define CONFIG_EXTRA_ENV_SETTINGS \
188c86efd85SIain Paton 	CONSOLE_ENV_SETTINGS \
189c86efd85SIain Paton 	MEM_LAYOUT_ENV_SETTINGS \
190c86efd85SIain Paton 	"fdtfile=" CONFIG_FDTFILE "\0" \
191c86efd85SIain Paton 	BOOTENV
192c86efd85SIain Paton 
1933cbeb0f0SEric Benard #endif                         /* __RIOTBOARD_CONFIG_H */
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