1 /* 2 * Copyright (C) Stefano Babic <sbabic@denx.de> 3 * 4 * Configuration settings for the E+L i.MX6Q DO82 board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __EL6Q_COMMON_CONFIG_H 10 #define __EL6Q_COMMON_CONFIG_H 11 12 #define CONFIG_BOARD_NAME EL6Q 13 14 #include <config_distro_defaults.h> 15 #include "mx6_common.h" 16 17 #define CONFIG_IMX_THERMAL 18 19 /* Size of malloc() pool */ 20 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) 21 22 #define CONFIG_BOARD_EARLY_INIT_F 23 #define CONFIG_BOARD_LATE_INIT 24 25 #define CONFIG_MXC_UART 26 27 #ifdef CONFIG_SPL 28 #define CONFIG_SPL_MMC_SUPPORT 29 #define CONFIG_SPL_SPI_SUPPORT 30 #define CONFIG_SPL_SPI_FLASH_SUPPORT 31 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 32 #define CONFIG_SPL_SPI_LOAD 33 #include "imx6_spl.h" 34 #endif 35 36 /* MMC Configs */ 37 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 38 #define CONFIG_SYS_FSL_USDHC_NUM 2 39 40 /* I2C config */ 41 #define CONFIG_SYS_I2C 42 #define CONFIG_SYS_I2C_MXC 43 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 44 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 45 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 46 #define CONFIG_SYS_I2C_SPEED 100000 47 48 /* PMIC */ 49 #define CONFIG_POWER 50 #define CONFIG_POWER_I2C 51 #define CONFIG_POWER_PFUZE100 52 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 53 54 /* Commands */ 55 #define CONFIG_MXC_SPI 56 #define CONFIG_SF_DEFAULT_BUS 3 57 #define CONFIG_SF_DEFAULT_CS 0 58 #define CONFIG_SF_DEFAULT_SPEED 20000000 59 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 60 61 /* allow to overwrite serial and ethaddr */ 62 #define CONFIG_ENV_OVERWRITE 63 #define CONFIG_MXC_UART_BASE UART2_BASE 64 #define CONFIG_BAUDRATE 115200 65 66 /* Command definition */ 67 68 #define CONFIG_CMD_BMODE 69 #define CONFIG_CMD_BOOTZ 70 #undef CONFIG_CMD_IMLS 71 72 #define CONFIG_BOARD_NAME EL6Q 73 74 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 75 #define CONFIG_EXTRA_ENV_SETTINGS \ 76 "board="__stringify(CONFIG_BOARD_NAME)"\0" \ 77 "cma_size="__stringify(EL6Q_CMA_SIZE)"\0" \ 78 "chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0" \ 79 "console=" CONFIG_CONSOLE_DEV "\0" \ 80 "fdtfile=undefined\0" \ 81 "fdt_high=0xffffffff\0" \ 82 "fdt_addr_r=0x18000000\0" \ 83 "fdt_addr=0x18000000\0" \ 84 "findfdt=setenv fdtfile " CONFIG_DEFAULT_FDT_FILE "\0" \ 85 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 86 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ 87 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 88 BOOTENV 89 90 #define BOOT_TARGET_DEVICES(func) \ 91 func(MMC, mmc, 0) \ 92 func(MMC, mmc, 1) \ 93 func(PXE, PXE, na) \ 94 func(DHCP, dhcp, na) 95 96 #define CONFIG_BOOTCOMMAND \ 97 "run findfdt; " \ 98 "run distro_bootcmd" 99 100 #include <config_distro_bootcmd.h> 101 102 #define CONFIG_ARP_TIMEOUT 200UL 103 104 #define CONFIG_CMD_MEMTEST 105 106 #define CONFIG_SYS_MEMTEST_START 0x10000000 107 #define CONFIG_SYS_MEMTEST_END 0x10800000 108 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 109 110 #define CONFIG_STACKSIZE (128 * 1024) 111 112 /* Physical Memory Map */ 113 #define CONFIG_NR_DRAM_BANKS 1 114 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 115 116 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 117 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 118 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 119 120 #define CONFIG_SYS_INIT_SP_OFFSET \ 121 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 122 #define CONFIG_SYS_INIT_SP_ADDR \ 123 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 124 125 /* FLASH and environment organization */ 126 #define CONFIG_SYS_NO_FLASH 127 128 #define CONFIG_ENV_SIZE (8 * 1024) 129 130 #define CONFIG_ENV_IS_IN_MMC 131 132 #if defined(CONFIG_ENV_IS_IN_MMC) 133 #define CONFIG_SYS_MMC_ENV_DEV 1 134 #define CONFIG_SYS_MMC_ENV_PART 2 135 #define CONFIG_ENV_OFFSET 0x0 136 #endif 137 138 #endif /* __EL6Q_COMMON_CONFIG_H */ 139