xref: /rk3399_rockchip-uboot/include/configs/edminiv2.h (revision ce9c227cc71afc3b4c78dcc0a565c40d4ad943e4)
1*ce9c227cSAlbert Aribaud /*
2*ce9c227cSAlbert Aribaud  * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
3*ce9c227cSAlbert Aribaud  *
4*ce9c227cSAlbert Aribaud  * Based on original Kirkwood support which is
5*ce9c227cSAlbert Aribaud  * (C) Copyright 2009
6*ce9c227cSAlbert Aribaud  * Marvell Semiconductor <www.marvell.com>
7*ce9c227cSAlbert Aribaud  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
8*ce9c227cSAlbert Aribaud  *
9*ce9c227cSAlbert Aribaud  * See file CREDITS for list of people who contributed to this
10*ce9c227cSAlbert Aribaud  * project.
11*ce9c227cSAlbert Aribaud  *
12*ce9c227cSAlbert Aribaud  * This program is free software; you can redistribute it and/or
13*ce9c227cSAlbert Aribaud  * modify it under the terms of the GNU General Public License as
14*ce9c227cSAlbert Aribaud  * published by the Free Software Foundation; either version 2 of
15*ce9c227cSAlbert Aribaud  * the License, or (at your option) any later version.
16*ce9c227cSAlbert Aribaud  *
17*ce9c227cSAlbert Aribaud  * This program is distributed in the hope that it will be useful,
18*ce9c227cSAlbert Aribaud  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19*ce9c227cSAlbert Aribaud  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20*ce9c227cSAlbert Aribaud  * GNU General Public License for more details.
21*ce9c227cSAlbert Aribaud  *
22*ce9c227cSAlbert Aribaud  * You should have received a copy of the GNU General Public License
23*ce9c227cSAlbert Aribaud  * along with this program; if not, write to the Free Software
24*ce9c227cSAlbert Aribaud  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
25*ce9c227cSAlbert Aribaud  * MA 02110-1301 USA
26*ce9c227cSAlbert Aribaud  */
27*ce9c227cSAlbert Aribaud 
28*ce9c227cSAlbert Aribaud #ifndef _CONFIG_EDMINIV2_H
29*ce9c227cSAlbert Aribaud #define _CONFIG_EDMINIV2_H
30*ce9c227cSAlbert Aribaud 
31*ce9c227cSAlbert Aribaud /*
32*ce9c227cSAlbert Aribaud  * Version number information
33*ce9c227cSAlbert Aribaud  */
34*ce9c227cSAlbert Aribaud 
35*ce9c227cSAlbert Aribaud #define CONFIG_IDENT_STRING	" EDMiniV2"
36*ce9c227cSAlbert Aribaud 
37*ce9c227cSAlbert Aribaud /*
38*ce9c227cSAlbert Aribaud  * High Level Configuration Options (easy to change)
39*ce9c227cSAlbert Aribaud  */
40*ce9c227cSAlbert Aribaud 
41*ce9c227cSAlbert Aribaud #define CONFIG_MARVELL		1
42*ce9c227cSAlbert Aribaud #define CONFIG_ARM926EJS	1	/* Basic Architecture */
43*ce9c227cSAlbert Aribaud #define CONFIG_FEROCEON		1	/* CPU Core subversion */
44*ce9c227cSAlbert Aribaud #define CONFIG_ORION5X		1	/* SOC Family Name */
45*ce9c227cSAlbert Aribaud #define CONFIG_88F5182		1	/* SOC Name */
46*ce9c227cSAlbert Aribaud #define CONFIG_MACH_EDMINIV2	1	/* Machine type */
47*ce9c227cSAlbert Aribaud 
48*ce9c227cSAlbert Aribaud /*
49*ce9c227cSAlbert Aribaud  * CLKs configurations
50*ce9c227cSAlbert Aribaud  */
51*ce9c227cSAlbert Aribaud 
52*ce9c227cSAlbert Aribaud #define CONFIG_SYS_HZ		1000
53*ce9c227cSAlbert Aribaud 
54*ce9c227cSAlbert Aribaud /*
55*ce9c227cSAlbert Aribaud  * Board-specific values for Orion5x MPP low level init:
56*ce9c227cSAlbert Aribaud  * - MPPs 12 to 15 are SATA LEDs (mode 5)
57*ce9c227cSAlbert Aribaud  * - Others are GPIO/unused (mode 3 for MPP0, mode 5 for
58*ce9c227cSAlbert Aribaud  *   MPP16 to MPP19, mode 0 for others
59*ce9c227cSAlbert Aribaud  */
60*ce9c227cSAlbert Aribaud 
61*ce9c227cSAlbert Aribaud #define ORION5X_MPP0_7		0x00000003
62*ce9c227cSAlbert Aribaud #define ORION5X_MPP8_15		0x55550000
63*ce9c227cSAlbert Aribaud #define ORION5X_MPP16_23	0x00000000
64*ce9c227cSAlbert Aribaud 
65*ce9c227cSAlbert Aribaud /*
66*ce9c227cSAlbert Aribaud  * Board-specific values for Orion5x GPIO low level init:
67*ce9c227cSAlbert Aribaud  * - GPIO3 is input (RTC interrupt)
68*ce9c227cSAlbert Aribaud  * - GPIO16 is Power LED control (0 = on, 1 = off)
69*ce9c227cSAlbert Aribaud  * - GPIO17 is Power LED source select (0 = CPLD, 1 = GPIO16)
70*ce9c227cSAlbert Aribaud  * - GPIO18 is Power Button status (0 = Released, 1 = Pressed)
71*ce9c227cSAlbert Aribaud  * - Last GPIO is 26, further bits are supposed to be 0.
72*ce9c227cSAlbert Aribaud  * Enable mask has ones for INPUT, 0 for OUTPUT.
73*ce9c227cSAlbert Aribaud  * Default is LED ON.
74*ce9c227cSAlbert Aribaud  */
75*ce9c227cSAlbert Aribaud 
76*ce9c227cSAlbert Aribaud #define ORION5X_GPIO_OUT_ENABLE	0x03fcffff
77*ce9c227cSAlbert Aribaud #define ORION5X_GPIO_OUT_VALUE	0x03fcffff
78*ce9c227cSAlbert Aribaud 
79*ce9c227cSAlbert Aribaud /*
80*ce9c227cSAlbert Aribaud  * NS16550 Configuration
81*ce9c227cSAlbert Aribaud  */
82*ce9c227cSAlbert Aribaud 
83*ce9c227cSAlbert Aribaud #define CONFIG_SYS_NS16550
84*ce9c227cSAlbert Aribaud #define CONFIG_SYS_NS16550_SERIAL
85*ce9c227cSAlbert Aribaud #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
86*ce9c227cSAlbert Aribaud #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
87*ce9c227cSAlbert Aribaud #define CONFIG_SYS_NS16550_COM1		ORION5X_UART0_BASE
88*ce9c227cSAlbert Aribaud 
89*ce9c227cSAlbert Aribaud /*
90*ce9c227cSAlbert Aribaud  * Serial Port configuration
91*ce9c227cSAlbert Aribaud  * The following definitions let you select what serial you want to use
92*ce9c227cSAlbert Aribaud  * for your console driver.
93*ce9c227cSAlbert Aribaud  */
94*ce9c227cSAlbert Aribaud 
95*ce9c227cSAlbert Aribaud #define CONFIG_CONS_INDEX	1	/*Console on UART0 */
96*ce9c227cSAlbert Aribaud #define CONFIG_BAUDRATE			115200
97*ce9c227cSAlbert Aribaud #define CONFIG_SYS_BAUDRATE_TABLE \
98*ce9c227cSAlbert Aribaud 	{ 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 }
99*ce9c227cSAlbert Aribaud 
100*ce9c227cSAlbert Aribaud /*
101*ce9c227cSAlbert Aribaud  * FLASH configuration
102*ce9c227cSAlbert Aribaud  */
103*ce9c227cSAlbert Aribaud 
104*ce9c227cSAlbert Aribaud #define CONFIG_SYS_FLASH_CFI
105*ce9c227cSAlbert Aribaud #define CONFIG_FLASH_CFI_DRIVER
106*ce9c227cSAlbert Aribaud #define CONFIG_FLASH_CFI_LEGACY
107*ce9c227cSAlbert Aribaud #define CONFIG_SYS_MAX_FLASH_BANKS	1  /* max num of flash banks       */
108*ce9c227cSAlbert Aribaud #define CONFIG_SYS_MAX_FLASH_SECT	11 /* max num of sects on one chip */
109*ce9c227cSAlbert Aribaud #define CONFIG_SYS_FLASH_BASE		0xfff80000
110*ce9c227cSAlbert Aribaud #define CONFIG_SYS_FLASH_SECTSZ \
111*ce9c227cSAlbert Aribaud 	{16384, 8192, 8192, 32768, \
112*ce9c227cSAlbert Aribaud 	 65536, 65536, 65536, 65536, 65536, 65536, 65536}
113*ce9c227cSAlbert Aribaud 
114*ce9c227cSAlbert Aribaud /* auto boot */
115*ce9c227cSAlbert Aribaud #define CONFIG_BOOTDELAY	3	/* default enable autoboot */
116*ce9c227cSAlbert Aribaud 
117*ce9c227cSAlbert Aribaud /*
118*ce9c227cSAlbert Aribaud  * For booting Linux, the board info and command line data
119*ce9c227cSAlbert Aribaud  * have to be in the first 8 MB of memory, since this is
120*ce9c227cSAlbert Aribaud  * the maximum mapped by the Linux kernel during initialization.
121*ce9c227cSAlbert Aribaud  */
122*ce9c227cSAlbert Aribaud #define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs  */
123*ce9c227cSAlbert Aribaud #define CONFIG_INITRD_TAG	1	/* enable INITRD tag */
124*ce9c227cSAlbert Aribaud #define CONFIG_SETUP_MEMORY_TAGS 1	/* enable memory tag */
125*ce9c227cSAlbert Aribaud 
126*ce9c227cSAlbert Aribaud #define	CONFIG_SYS_PROMPT	"EDMiniV2> "	/* Command Prompt */
127*ce9c227cSAlbert Aribaud #define	CONFIG_SYS_CBSIZE	1024	/* Console I/O Buff Size */
128*ce9c227cSAlbert Aribaud #define	CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE \
129*ce9c227cSAlbert Aribaud 		+sizeof(CONFIG_SYS_PROMPT) + 16)	/* Print Buff */
130*ce9c227cSAlbert Aribaud /*
131*ce9c227cSAlbert Aribaud  * Commands configuration - using default command set for now
132*ce9c227cSAlbert Aribaud  */
133*ce9c227cSAlbert Aribaud #include <config_cmd_default.h>
134*ce9c227cSAlbert Aribaud /*
135*ce9c227cSAlbert Aribaud  * Disabling some default commands for staggered bring-up
136*ce9c227cSAlbert Aribaud  */
137*ce9c227cSAlbert Aribaud #undef CONFIG_CMD_BOOTD	/* no bootd since no net */
138*ce9c227cSAlbert Aribaud #undef CONFIG_CMD_NET	/* no net since no eth */
139*ce9c227cSAlbert Aribaud #undef CONFIG_CMD_NFS	/* no NFS since no net */
140*ce9c227cSAlbert Aribaud 
141*ce9c227cSAlbert Aribaud /*
142*ce9c227cSAlbert Aribaud  *  Environment variables configurations
143*ce9c227cSAlbert Aribaud  */
144*ce9c227cSAlbert Aribaud #define CONFIG_ENV_IS_IN_FLASH		1
145*ce9c227cSAlbert Aribaud #define CONFIG_ENV_SECT_SIZE		0x2000	/* 16K */
146*ce9c227cSAlbert Aribaud #define CONFIG_ENV_SIZE			0x2000
147*ce9c227cSAlbert Aribaud #define CONFIG_ENV_OFFSET		0x4000	/* env starts here */
148*ce9c227cSAlbert Aribaud 
149*ce9c227cSAlbert Aribaud /*
150*ce9c227cSAlbert Aribaud  * Size of malloc() pool
151*ce9c227cSAlbert Aribaud  */
152*ce9c227cSAlbert Aribaud #define CONFIG_SYS_MALLOC_LEN	(1024 * 128) /* 128kB for malloc() */
153*ce9c227cSAlbert Aribaud /* size in bytes reserved for initial data */
154*ce9c227cSAlbert Aribaud #define CONFIG_SYS_GBL_DATA_SIZE	128
155*ce9c227cSAlbert Aribaud 
156*ce9c227cSAlbert Aribaud /*
157*ce9c227cSAlbert Aribaud  * Other required minimal configurations
158*ce9c227cSAlbert Aribaud  */
159*ce9c227cSAlbert Aribaud #define CONFIG_CONSOLE_INFO_QUIET	/* some code reduction */
160*ce9c227cSAlbert Aribaud #define CONFIG_ARCH_CPU_INIT		/* call arch_cpu_init() */
161*ce9c227cSAlbert Aribaud #define CONFIG_ARCH_MISC_INIT		/* call arch_misc_init() */
162*ce9c227cSAlbert Aribaud #define CONFIG_DISPLAY_CPUINFO		/* Display cpu info */
163*ce9c227cSAlbert Aribaud #define CONFIG_NR_DRAM_BANKS		1
164*ce9c227cSAlbert Aribaud 
165*ce9c227cSAlbert Aribaud #define CONFIG_STACKSIZE		0x00100000
166*ce9c227cSAlbert Aribaud #define CONFIG_SYS_LOAD_ADDR		0x00800000
167*ce9c227cSAlbert Aribaud #define CONFIG_SYS_MEMTEST_START	0x00400000
168*ce9c227cSAlbert Aribaud #define CONFIG_SYS_MEMTEST_END		0x007fffff
169*ce9c227cSAlbert Aribaud #define CONFIG_SYS_RESET_ADDRESS	0xffff0000
170*ce9c227cSAlbert Aribaud #define CONFIG_SYS_MAXARGS		16
171*ce9c227cSAlbert Aribaud 
172*ce9c227cSAlbert Aribaud #endif /* _CONFIG_EDMINIV2_H */
173