1 /* 2 * Configuation settings for the Renesas Solutions ECOVEC board 3 * 4 * Copyright (C) 2009 - 2011 Renesas Solutions Corp. 5 * Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori@renesas.com> 6 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __ECOVEC_H 12 #define __ECOVEC_H 13 14 /* 15 * Address Interface BusWidth 16 *----------------------------------------- 17 * 0x0000_0000 U-Boot 16bit 18 * 0x0004_0000 Linux romImage 16bit 19 * 0x0014_0000 MTD for Linux 16bit 20 * 0x0400_0000 Internal I/O 16/32bit 21 * 0x0800_0000 DRAM 32bit 22 * 0x1800_0000 MFI 16bit 23 */ 24 25 #undef DEBUG 26 #define CONFIG_SH4A 1 27 #define CONFIG_CPU_SH7724 1 28 #define CONFIG_BOARD_LATE_INIT 1 29 #define CONFIG_ECOVEC 1 30 31 #define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000 32 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 33 34 #define CONFIG_CMD_FLASH 35 #define CONFIG_CMD_MEMORY 36 #define CONFIG_CMD_NET 37 #define CONFIG_CMD_PING 38 #define CONFIG_CMD_MII 39 #define CONFIG_CMD_NFS 40 #define CONFIG_CMD_SDRAM 41 #define CONFIG_CMD_ENV 42 #define CONFIG_CMD_USB 43 #define CONFIG_CMD_FAT 44 #define CONFIG_CMD_EXT2 45 #define CONFIG_CMD_SAVEENV 46 47 #define CONFIG_USB_STORAGE 48 #define CONFIG_DOS_PARTITION 49 50 #define CONFIG_BAUDRATE 115200 51 #define CONFIG_BOOTDELAY 3 52 #define CONFIG_BOOTARGS "console=ttySC0,115200" 53 54 #define CONFIG_VERSION_VARIABLE 55 #undef CONFIG_SHOW_BOOT_PROGRESS 56 57 /* I2C */ 58 #define CONFIG_CMD_I2C 59 #define CONFIG_SYS_I2C 60 #define CONFIG_SYS_I2C_SH 61 #define CONFIG_SYS_I2C_SLAVE 0x7F 62 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 2 63 #define CONFIG_SYS_I2C_SH_BASE0 0xA4470000 64 #define CONFIG_SYS_I2C_SH_SPEED0 100000 65 #define CONFIG_SYS_I2C_SH_BASE1 0xA4750000 66 #define CONFIG_SYS_I2C_SH_SPEED1 100000 67 #define CONFIG_SH_I2C_DATA_HIGH 4 68 #define CONFIG_SH_I2C_DATA_LOW 5 69 #define CONFIG_SH_I2C_CLOCK 41666666 70 71 /* Ether */ 72 #define CONFIG_SH_ETHER 1 73 #define CONFIG_SH_ETHER_USE_PORT (0) 74 #define CONFIG_SH_ETHER_PHY_ADDR (0x1f) 75 #define CONFIG_PHY_SMSC 1 76 #define CONFIG_PHYLIB 77 #define CONFIG_BITBANGMII 78 #define CONFIG_BITBANGMII_MULTI 79 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII 80 81 /* USB / R8A66597 */ 82 #define CONFIG_USB_R8A66597_HCD 83 #define CONFIG_R8A66597_BASE_ADDR 0xA4D80000 84 #define CONFIG_R8A66597_XTAL 0x0000 /* 12MHz */ 85 #define CONFIG_R8A66597_LDRV 0x8000 /* 3.3V */ 86 #define CONFIG_R8A66597_ENDIAN 0x0000 /* little */ 87 #define CONFIG_SUPERH_ON_CHIP_R8A66597 88 89 /* undef to save memory */ 90 #define CONFIG_SYS_LONGHELP 91 /* Monitor Command Prompt */ 92 /* Buffer size for input from the Console */ 93 #define CONFIG_SYS_CBSIZE 256 94 /* Buffer size for Console output */ 95 #define CONFIG_SYS_PBSIZE 256 96 /* max args accepted for monitor commands */ 97 #define CONFIG_SYS_MAXARGS 16 98 /* Buffer size for Boot Arguments passed to kernel */ 99 #define CONFIG_SYS_BARGSIZE 512 100 /* List of legal baudrate settings for this board */ 101 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 102 103 /* SCIF */ 104 #define CONFIG_SCIF_CONSOLE 1 105 #define CONFIG_SCIF 1 106 #define CONFIG_CONS_SCIF0 1 107 108 /* Suppress display of console information at boot */ 109 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 110 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 111 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 112 113 /* SDRAM */ 114 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 115 #define CONFIG_SYS_SDRAM_SIZE (256 * 1024 * 1024) 116 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 117 118 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 119 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 200 * 1024 * 1024) 120 /* Enable alternate, more extensive, memory test */ 121 #undef CONFIG_SYS_ALT_MEMTEST 122 /* Scratch address used by the alternate memory test */ 123 #undef CONFIG_SYS_MEMTEST_SCRATCH 124 125 /* Enable temporary baudrate change while serial download */ 126 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 127 128 /* FLASH */ 129 #define CONFIG_FLASH_CFI_DRIVER 1 130 #define CONFIG_SYS_FLASH_CFI 131 #undef CONFIG_SYS_FLASH_QUIET_TEST 132 #define CONFIG_SYS_FLASH_EMPTY_INFO 133 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 134 #define CONFIG_SYS_MAX_FLASH_SECT 512 135 136 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 137 #define CONFIG_SYS_MAX_FLASH_BANKS 1 138 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 139 140 /* Timeout for Flash erase operations (in ms) */ 141 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 142 /* Timeout for Flash write operations (in ms) */ 143 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 144 /* Timeout for Flash set sector lock bit operations (in ms) */ 145 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 146 /* Timeout for Flash clear lock bit operations (in ms) */ 147 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 148 149 /* 150 * Use hardware flash sectors protection instead 151 * of U-Boot software protection 152 */ 153 #undef CONFIG_SYS_FLASH_PROTECTION 154 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 155 156 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 157 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 158 /* Monitor size */ 159 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 160 /* Size of DRAM reserved for malloc() use */ 161 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 162 /* size in bytes reserved for initial data */ 163 #define CONFIG_SYS_GBL_DATA_SIZE (256) 164 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 165 166 /* ENV setting */ 167 #define CONFIG_ENV_IS_IN_FLASH 168 #define CONFIG_ENV_OVERWRITE 1 169 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 170 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 171 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 172 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 173 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 174 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 175 176 /* Board Clock */ 177 #define CONFIG_SYS_CLK_FREQ 41666666 178 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 179 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 180 #define CONFIG_SYS_TMU_CLK_DIV 4 181 182 #endif /* __ECOVEC_H */ 183